[linux-2.6-block.git] / arch / arm / include / asm / pgtable.h

/*
 *  arch/arm/include/asm/pgtable.h
 *
 *  Copyright (C) 1995-2002 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef _ASMARM_PGTABLE_H
#define _ASMARM_PGTABLE_H

#include <linux/const.h>
#include <asm/proc-fns.h>

#ifndef CONFIG_MMU

#include <asm-generic/4level-fixup.h>
#include <asm/pgtable-nommu.h>

#else

#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopud.h>
#include <asm/memory.h>
#include <asm/pgtable-hwdef.h>


#include <asm/tlbflush.h>

#ifdef CONFIG_ARM_LPAE
#include <asm/pgtable-3level.h>
#else
#include <asm/pgtable-2level.h>
#endif

/*
 * Just any arbitrary offset to the start of the vmalloc VM area: the
 * current 8MB value just means that there will be a 8MB "hole" after the
 * physical memory until the kernel virtual memory starts.  That means that
 * any out-of-bounds memory accesses will hopefully be caught.
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;)
 */
#define VMALLOC_OFFSET		(8*1024*1024)
#define VMALLOC_START		(((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END		0xff800000UL

#define LIBRARY_TEXT_START	0x0c000000

#ifndef __ASSEMBLY__
extern void __pte_error(const char *file, int line, pte_t);
extern void __pmd_error(const char *file, int line, pmd_t);
extern void __pgd_error(const char *file, int line, pgd_t);

#define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte)
#define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd)
#define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd)

/*
 * This is the lowest virtual address we can permit any user space
 * mapping to be mapped at.  This is particularly important for
 * non-high vector CPUs.
 */
#define FIRST_USER_ADDRESS	(PAGE_SIZE * 2)

/*
 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
 * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
 * page shared between user and kernel).
 */
#ifdef CONFIG_ARM_LPAE
#define USER_PGTABLES_CEILING	TASK_SIZE
#endif

/*
 * The pgprot_* and protection_map entries will be fixed up in runtime
 * to include the cachable and bufferable bits based on memory policy,
 * as well as any architecture dependent bits like global/ASID and SMP
 * shared mapping bits.
 */
#define _L_PTE_DEFAULT	L_PTE_PRESENT | L_PTE_YOUNG

extern pgprot_t		pgprot_user;
extern pgprot_t		pgprot_kernel;
extern pgprot_t		pgprot_hyp_device;
extern pgprot_t		pgprot_s2;
extern pgprot_t		pgprot_s2_device;

#define _MOD_PROT(p, b)	__pgprot(pgprot_val(p) | (b))

#define PAGE_NONE		_MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
#define PAGE_SHARED		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
#define PAGE_SHARED_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER)
#define PAGE_COPY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
#define PAGE_COPY_EXEC		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
#define PAGE_READONLY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
#define PAGE_READONLY_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
#define PAGE_KERNEL		_MOD_PROT(pgprot_kernel, L_PTE_XN)
#define PAGE_KERNEL_EXEC	pgprot_kernel
#define PAGE_HYP		_MOD_PROT(pgprot_kernel, L_PTE_HYP | L_PTE_XN)
#define PAGE_HYP_EXEC		_MOD_PROT(pgprot_kernel, L_PTE_HYP | L_PTE_RDONLY)
#define PAGE_HYP_RO		_MOD_PROT(pgprot_kernel, L_PTE_HYP | L_PTE_RDONLY | L_PTE_XN)
#define PAGE_HYP_DEVICE		_MOD_PROT(pgprot_hyp_device, L_PTE_HYP)
#define PAGE_S2			_MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY | L_PTE_XN)
#define PAGE_S2_DEVICE		_MOD_PROT(pgprot_s2_device, L_PTE_S2_RDONLY | L_PTE_XN)

#define __PAGE_NONE		__pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
#define __PAGE_SHARED		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
#define __PAGE_SHARED_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER)
#define __PAGE_COPY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
#define __PAGE_COPY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
#define __PAGE_READONLY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
#define __PAGE_READONLY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)

#define __pgprot_modify(prot,mask,bits)		\
	__pgprot((pgprot_val(prot) & ~(mask)) | (bits))

#define pgprot_noncached(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)

#define pgprot_writecombine(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)

#define pgprot_stronglyordered(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)

#define pgprot_device(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED | L_PTE_SHARED | L_PTE_DIRTY | L_PTE_XN)

#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
#define pgprot_dmacoherent(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
#define __HAVE_PHYS_MEM_ACCESS_PROT
struct file;
extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
				     unsigned long size, pgprot_t vma_prot);
#else
#define pgprot_dmacoherent(prot) \
	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
#endif

#endif /* __ASSEMBLY__ */

/*
 * The table below defines the page protection levels that we insert into our
 * Linux page table version.  These get translated into the best that the
 * architecture can perform.  Note that on most ARM hardware:
 *  1) We cannot do execute protection
 *  2) If we could do execute protection, then read is implied
 *  3) write implies read permissions
 */
#define __P000  __PAGE_NONE
#define __P001  __PAGE_READONLY
#define __P010  __PAGE_COPY
#define __P011  __PAGE_COPY
#define __P100  __PAGE_READONLY_EXEC
#define __P101  __PAGE_READONLY_EXEC
#define __P110  __PAGE_COPY_EXEC
#define __P111  __PAGE_COPY_EXEC

#define __S000  __PAGE_NONE
#define __S001  __PAGE_READONLY
#define __S010  __PAGE_SHARED
#define __S011  __PAGE_SHARED
#define __S100  __PAGE_READONLY_EXEC
#define __S101  __PAGE_READONLY_EXEC
#define __S110  __PAGE_SHARED_EXEC
#define __S111  __PAGE_SHARED_EXEC

#ifndef __ASSEMBLY__
/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern struct page *empty_zero_page;
#define ZERO_PAGE(vaddr)	(empty_zero_page)


extern pgd_t swapper_pg_dir[PTRS_PER_PGD];

/* to find an entry in a page-table-directory */
#define pgd_index(addr)		((addr) >> PGDIR_SHIFT)

#define pgd_offset(mm, addr)	((mm)->pgd + pgd_index(addr))

/* to find an entry in a kernel page-table-directory */
#define pgd_offset_k(addr)	pgd_offset(&init_mm, addr)

#define pmd_none(pmd)		(!pmd_val(pmd))

static inline pte_t *pmd_page_vaddr(pmd_t pmd)
{
	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
}

#define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))

#ifndef CONFIG_HIGHPTE
#define __pte_map(pmd)		pmd_page_vaddr(*(pmd))
#define __pte_unmap(pte)	do { } while (0)
#else
#define __pte_map(pmd)		(pte_t *)kmap_atomic(pmd_page(*(pmd)))
#define __pte_unmap(pte)	kunmap_atomic(pte)
#endif

#define pte_index(addr)		(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))

#define pte_offset_kernel(pmd,addr)	(pmd_page_vaddr(*(pmd)) + pte_index(addr))

#define pte_offset_map(pmd,addr)	(__pte_map(pmd) + pte_index(addr))
#define pte_unmap(pte)			__pte_unmap(pte)

#define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
#define pfn_pte(pfn,prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))

#define pte_page(pte)		pfn_to_page(pte_pfn(pte))
#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page), prot)

#define pte_clear(mm,addr,ptep)	set_pte_ext(ptep, __pte(0), 0)

#define pte_isset(pte, val)	((u32)(val) == (val) ? pte_val(pte) & (val) \
						: !!(pte_val(pte) & (val)))
#define pte_isclear(pte, val)	(!(pte_val(pte) & (val)))

#define pte_none(pte)		(!pte_val(pte))
#define pte_present(pte)	(pte_isset((pte), L_PTE_PRESENT))
#define pte_valid(pte)		(pte_isset((pte), L_PTE_VALID))
#define pte_accessible(mm, pte)	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
#define pte_write(pte)		(pte_isclear((pte), L_PTE_RDONLY))
#define pte_dirty(pte)		(pte_isset((pte), L_PTE_DIRTY))
#define pte_young(pte)		(pte_isset((pte), L_PTE_YOUNG))
#define pte_exec(pte)		(pte_isclear((pte), L_PTE_XN))

#define pte_valid_user(pte)	\
	(pte_valid(pte) && pte_isset((pte), L_PTE_USER) && pte_young(pte))

static inline bool pte_access_permitted(pte_t pte, bool write)
{
	pteval_t mask = L_PTE_PRESENT | L_PTE_USER;
	pteval_t needed = mask;

	if (write)
		mask |= L_PTE_RDONLY;

	return (pte_val(pte) & mask) == needed;
}
#define pte_access_permitted pte_access_permitted

#if __LINUX_ARM_ARCH__ < 6
static inline void __sync_icache_dcache(pte_t pteval)
{
}
#else
extern void __sync_icache_dcache(pte_t pteval);
#endif

static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
			      pte_t *ptep, pte_t pteval)
{
	unsigned long ext = 0;

	if (addr < TASK_SIZE && pte_valid_user(pteval)) {
		if (!pte_special(pteval))
			__sync_icache_dcache(pteval);
		ext |= PTE_EXT_NG;
	}

	set_pte_ext(ptep, pteval, ext);
}

static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
{
	pte_val(pte) &= ~pgprot_val(prot);
	return pte;
}

static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
{
	pte_val(pte) |= pgprot_val(prot);
	return pte;
}

static inline pte_t pte_wrprotect(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(L_PTE_RDONLY));
}

static inline pte_t pte_mkclean(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(L_PTE_DIRTY));
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(L_PTE_DIRTY));
}

static inline pte_t pte_mkold(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(L_PTE_YOUNG));
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(L_PTE_YOUNG));
}

static inline pte_t pte_mkexec(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(L_PTE_XN));
}

static inline pte_t pte_mknexec(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(L_PTE_XN));
}

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER |
		L_PTE_NONE | L_PTE_VALID;
	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
	return pte;
}

/*
 * Encode and decode a swap entry.  Swap entries are stored in the Linux
 * page tables as follows:
 *
 *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
 *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 *   <--------------- offset ------------------------> < type -> 0 0
 *
 * This gives us up to 31 swap files and 128GB per swap file.  Note that
 * the offset field is always non-zero.
 */
#define __SWP_TYPE_SHIFT	2
#define __SWP_TYPE_BITS		5
#define __SWP_TYPE_MASK		((1 << __SWP_TYPE_BITS) - 1)
#define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)

#define __swp_type(x)		(((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
#define __swp_offset(x)		((x).val >> __SWP_OFFSET_SHIFT)
#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })

#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })

/*
 * It is an error for the kernel to have more swap files than we can
 * encode in the PTEs.  This ensures that we know when MAX_SWAPFILES
 * is increased beyond what we presently support.
 */
#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)

/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
/* FIXME: this is not correct */
#define kern_addr_valid(addr)	(1)

#include <asm-generic/pgtable.h>

/*
 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
 */
#define HAVE_ARCH_UNMAPPED_AREA
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN

#define pgtable_cache_init() do { } while (0)

#endif /* !__ASSEMBLY__ */

#endif /* CONFIG_MMU */

#endif /* _ASMARM_PGTABLE_H */
Commit	Line	Data
1da177e4	1	/*
4baa9922	2	* arch/arm/include/asm/pgtable.h
1da177e4 LT	3	*
	4	* Copyright (C) 1995-2002 Russell King
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10	#ifndef _ASMARM_PGTABLE_H
	11	#define _ASMARM_PGTABLE_H
	12
f6e3354d	13	#include <linux/const.h>
002547b4 RK	14	#include <asm/proc-fns.h>
	15
	16	#ifndef CONFIG_MMU
	17
a32618d2	18	#include <asm-generic/4level-fixup.h>
a1ce3928	19	#include <asm/pgtable-nommu.h>
002547b4 RK	20
002547b4 RK	21	#else
1da177e4	22
9849a569	23	#define __ARCH_USE_5LEVEL_HACK
a32618d2	24	#include <asm-generic/pgtable-nopud.h>
1da177e4	25	#include <asm/memory.h>
ad1ae2fe	26	#include <asm/pgtable-hwdef.h>
1da177e4	27
8d962507 CM	28
	29	#include <asm/tlbflush.h>
	30
dcfdae04 CM	31	#ifdef CONFIG_ARM_LPAE
	32	#include <asm/pgtable-3level.h>
	33	#else
17f57211	34	#include <asm/pgtable-2level.h>
dcfdae04	35	#endif
17f57211	36
5c3073e6 RK	37	/*
	38	* Just any arbitrary offset to the start of the vmalloc VM area: the
	39	* current 8MB value just means that there will be a 8MB "hole" after the
	40	* physical memory until the kernel virtual memory starts. That means that
	41	* any out-of-bounds memory accesses will hopefully be caught.
	42	* The vmalloc() routines leaves a hole of 4kB between each vmalloced
	43	* area for the same reason. ;)
5c3073e6	44	*/
5c3073e6 RK	45	#define VMALLOC_OFFSET (810241024)
5c3073e6 RK	46	#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
6ff09660	47	#define VMALLOC_END 0xff800000UL
5c3073e6	48
1da177e4 LT	49	#define LIBRARY_TEXT_START 0x0c000000
	50
	51	#ifndef __ASSEMBLY__
69529c0e RK	52	extern void __pte_error(const char *file, int line, pte_t);
	53	extern void __pmd_error(const char *file, int line, pmd_t);
	54	extern void __pgd_error(const char *file, int line, pgd_t);
1da177e4	55
69529c0e RK	56	#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte)
	57	#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd)
	58	#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd)
1da177e4	59
6119be0b HD	60	/*
	61	* This is the lowest virtual address we can permit any user space
	62	* mapping to be mapped at. This is particularly important for
	63	* non-high vector CPUs.
	64	*/
d8aa712c	65	#define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
6119be0b	66
104ad3b3 CM	67	/*
	68	* Use TASK_SIZE as the ceiling argument for free_pgtables() and
	69	* free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
	70	* page shared between user and kernel).
	71	*/
	72	#ifdef CONFIG_ARM_LPAE
	73	#define USER_PGTABLES_CEILING TASK_SIZE
	74	#endif
	75
1da177e4	76	/*
44b18693 I	77	* The pgprot_* and protection_map entries will be fixed up in runtime
	78	* to include the cachable and bufferable bits based on memory policy,
	79	* as well as any architecture dependent bits like global/ASID and SMP
	80	* shared mapping bits.
1da177e4	81	*/
bb30f36f	82	#define _L_PTE_DEFAULT L_PTE_PRESENT \| L_PTE_YOUNG
1da177e4	83
44b18693	84	extern pgprot_t pgprot_user;
1da177e4	85	extern pgprot_t pgprot_kernel;
cc577c26 CD	86	extern pgprot_t pgprot_hyp_device;
	87	extern pgprot_t pgprot_s2;
	88	extern pgprot_t pgprot_s2_device;
1da177e4	89
8ec53663	90	#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) \| (b))
1da177e4	91
26ffd0d4	92	#define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_XN \| L_PTE_RDONLY \| L_PTE_NONE)
36bb94ba RK	93	#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER \| L_PTE_XN)
	94	#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER)
	95	#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER \| L_PTE_RDONLY \| L_PTE_XN)
	96	#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER \| L_PTE_RDONLY)
	97	#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER \| L_PTE_RDONLY \| L_PTE_XN)
	98	#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER \| L_PTE_RDONLY)
9522d7e4 RK	99	#define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
9522d7e4 RK	100	#define PAGE_KERNEL_EXEC pgprot_kernel
0996353f	101	#define PAGE_HYP _MOD_PROT(pgprot_kernel, L_PTE_HYP \| L_PTE_XN)
59002705	102	#define PAGE_HYP_EXEC _MOD_PROT(pgprot_kernel, L_PTE_HYP \| L_PTE_RDONLY)
74a6b888	103	#define PAGE_HYP_RO _MOD_PROT(pgprot_kernel, L_PTE_HYP \| L_PTE_RDONLY \| L_PTE_XN)
cc577c26	104	#define PAGE_HYP_DEVICE _MOD_PROT(pgprot_hyp_device, L_PTE_HYP)
d0e22b4a MZ	105	#define PAGE_S2 _MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY \| L_PTE_XN)
d0e22b4a MZ	106	#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_S2_RDONLY \| L_PTE_XN)
9522d7e4	107
26ffd0d4	108	#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT \| L_PTE_RDONLY \| L_PTE_XN \| L_PTE_NONE)
36bb94ba RK	109	#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT \| L_PTE_USER \| L_PTE_XN)
	110	#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT \| L_PTE_USER)
	111	#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT \| L_PTE_USER \| L_PTE_RDONLY \| L_PTE_XN)
	112	#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT \| L_PTE_USER \| L_PTE_RDONLY)
	113	#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT \| L_PTE_USER \| L_PTE_RDONLY \| L_PTE_XN)
	114	#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT \| L_PTE_USER \| L_PTE_RDONLY)
44b18693	115
eb9b2b69 RK	116	#define __pgprot_modify(prot,mask,bits) \
	117	__pgprot((pgprot_val(prot) & ~(mask)) \| (bits))
	118
	119	#define pgprot_noncached(prot) \
	120	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
	121
	122	#define pgprot_writecombine(prot) \
	123	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
	124
8fb54284 SS	125	#define pgprot_stronglyordered(prot) \
	126	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
	127
58ca3382 VW	128	#define pgprot_device(prot) \
	129	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED \| L_PTE_SHARED \| L_PTE_DIRTY \| L_PTE_XN)
	130
eb9b2b69 RK	131	#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
eb9b2b69 RK	132	#define pgprot_dmacoherent(prot) \
9522d7e4	133	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE \| L_PTE_XN)
eb9b2b69 RK	134	#define __HAVE_PHYS_MEM_ACCESS_PROT
	135	struct file;
	136	extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
	137	unsigned long size, pgprot_t vma_prot);
	138	#else
	139	#define pgprot_dmacoherent(prot) \
9522d7e4	140	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED \| L_PTE_XN)
eb9b2b69 RK	141	#endif
eb9b2b69 RK	142
1da177e4 LT	143	#endif /* __ASSEMBLY__ */
	144
	145	/*
	146	* The table below defines the page protection levels that we insert into our
	147	* Linux page table version. These get translated into the best that the
	148	* architecture can perform. Note that on most ARM hardware:
	149	* 1) We cannot do execute protection
	150	* 2) If we could do execute protection, then read is implied
	151	* 3) write implies read permissions
	152	*/
44b18693 I	153	#define __P000 __PAGE_NONE
	154	#define __P001 __PAGE_READONLY
	155	#define __P010 __PAGE_COPY
	156	#define __P011 __PAGE_COPY
8ec53663 RK	157	#define __P100 __PAGE_READONLY_EXEC
	158	#define __P101 __PAGE_READONLY_EXEC
	159	#define __P110 __PAGE_COPY_EXEC
	160	#define __P111 __PAGE_COPY_EXEC
44b18693 I	161
	162	#define __S000 __PAGE_NONE
	163	#define __S001 __PAGE_READONLY
	164	#define __S010 __PAGE_SHARED
	165	#define __S011 __PAGE_SHARED
8ec53663 RK	166	#define __S100 __PAGE_READONLY_EXEC
	167	#define __S101 __PAGE_READONLY_EXEC
	168	#define __S110 __PAGE_SHARED_EXEC
	169	#define __S111 __PAGE_SHARED_EXEC
1da177e4 LT	170
	171	#ifndef __ASSEMBLY__
	172	/*
	173	* ZERO_PAGE is a global shared page that is always zero: used
	174	* for zero-mapped memory areas etc..
	175	*/
	176	extern struct page *empty_zero_page;
	177	#define ZERO_PAGE(vaddr) (empty_zero_page)
	178
4eec4b13 RK	179
	180	extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
	181
	182	/* to find an entry in a page-table-directory */
	183	#define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
	184
	185	#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
	186
	187	/* to find an entry in a kernel page-table-directory */
	188	#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
	189
b510b049	190	#define pmd_none(pmd) (!pmd_val(pmd))
b510b049 RK	191
	192	static inline pte_t *pmd_page_vaddr(pmd_t pmd)
	193	{
d7c5d0dc	194	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
b510b049 RK	195	}
b510b049 RK	196
d7c5d0dc	197	#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
b510b049	198
65cec8e3	199	#ifndef CONFIG_HIGHPTE
b510b049	200	#define __pte_map(pmd) pmd_page_vaddr(*(pmd))
ece0e2b6	201	#define __pte_unmap(pte) do { } while (0)
65cec8e3	202	#else
d30e45ee RK	203	#define __pte_map(pmd) (pte_t )kmap_atomic(pmd_page((pmd)))
d30e45ee RK	204	#define __pte_unmap(pte) kunmap_atomic(pte)
65cec8e3	205	#endif
1da177e4	206
b510b049 RK	207	#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	208
	209	#define pte_offset_kernel(pmd,addr) (pmd_page_vaddr(*(pmd)) + pte_index(addr))
	210
	211	#define pte_offset_map(pmd,addr) (__pte_map(pmd) + pte_index(addr))
	212	#define pte_unmap(pte) __pte_unmap(pte)
	213
d7c5d0dc	214	#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
cae6292b	215	#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) \| pgprot_val(prot))
b510b049 RK	216
	217	#define pte_page(pte) pfn_to_page(pte_pfn(pte))
	218	#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
	219
b510b049	220	#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
ad1ae2fe	221
f2950706 SC	222	#define pte_isset(pte, val) ((u32)(val) == (val) ? pte_val(pte) & (val) \
	223	: !!(pte_val(pte) & (val)))
	224	#define pte_isclear(pte, val) (!(pte_val(pte) & (val)))
	225
47f12043	226	#define pte_none(pte) (!pte_val(pte))
f2950706 SC	227	#define pte_present(pte) (pte_isset((pte), L_PTE_PRESENT))
f2950706 SC	228	#define pte_valid(pte) (pte_isset((pte), L_PTE_VALID))
1971188a	229	#define pte_accessible(mm, pte) (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
f2950706 SC	230	#define pte_write(pte) (pte_isclear((pte), L_PTE_RDONLY))
	231	#define pte_dirty(pte) (pte_isset((pte), L_PTE_DIRTY))
	232	#define pte_young(pte) (pte_isset((pte), L_PTE_YOUNG))
	233	#define pte_exec(pte) (pte_isclear((pte), L_PTE_XN))
47f12043	234
1971188a	235	#define pte_valid_user(pte) \
f2950706	236	(pte_valid(pte) && pte_isset((pte), L_PTE_USER) && pte_young(pte))
47f12043	237
1ee5e87f RK	238	static inline bool pte_access_permitted(pte_t pte, bool write)
	239	{
	240	pteval_t mask = L_PTE_PRESENT \| L_PTE_USER;
	241	pteval_t needed = mask;
	242
	243	if (write)
	244	mask \|= L_PTE_RDONLY;
	245
	246	return (pte_val(pte) & mask) == needed;
	247	}
	248	#define pte_access_permitted pte_access_permitted
	249
6012191a CM	250	#if __LINUX_ARM_ARCH__ < 6
	251	static inline void __sync_icache_dcache(pte_t pteval)
	252	{
	253	}
	254	#else
	255	extern void __sync_icache_dcache(pte_t pteval);
	256	#endif
	257
	258	static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
	259	pte_t *ptep, pte_t pteval)
	260	{
47f12043 WD	261	unsigned long ext = 0;
47f12043 WD	262
1971188a	263	if (addr < TASK_SIZE && pte_valid_user(pteval)) {
bd951303 SC	264	if (!pte_special(pteval))
bd951303 SC	265	__sync_icache_dcache(pteval);
47f12043	266	ext \|= PTE_EXT_NG;
6012191a	267	}
1da177e4	268
47f12043 WD	269	set_pte_ext(ptep, pteval, ext);
47f12043 WD	270	}
6012191a	271
1f92f77a JL	272	static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
	273	{
	274	pte_val(pte) &= ~pgprot_val(prot);
	275	return pte;
	276	}
	277
	278	static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
	279	{
	280	pte_val(pte) \|= pgprot_val(prot);
	281	return pte;
	282	}
	283
	284	static inline pte_t pte_wrprotect(pte_t pte)
	285	{
	286	return set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
	287	}
	288
	289	static inline pte_t pte_mkwrite(pte_t pte)
	290	{
	291	return clear_pte_bit(pte, __pgprot(L_PTE_RDONLY));
	292	}
	293
	294	static inline pte_t pte_mkclean(pte_t pte)
	295	{
	296	return clear_pte_bit(pte, __pgprot(L_PTE_DIRTY));
	297	}
	298
	299	static inline pte_t pte_mkdirty(pte_t pte)
	300	{
	301	return set_pte_bit(pte, __pgprot(L_PTE_DIRTY));
	302	}
	303
	304	static inline pte_t pte_mkold(pte_t pte)
	305	{
	306	return clear_pte_bit(pte, __pgprot(L_PTE_YOUNG));
	307	}
	308
	309	static inline pte_t pte_mkyoung(pte_t pte)
	310	{
	311	return set_pte_bit(pte, __pgprot(L_PTE_YOUNG));
	312	}
	313
	314	static inline pte_t pte_mkexec(pte_t pte)
	315	{
	316	return clear_pte_bit(pte, __pgprot(L_PTE_XN));
	317	}
	318
	319	static inline pte_t pte_mknexec(pte_t pte)
	320	{
	321	return set_pte_bit(pte, __pgprot(L_PTE_XN));
	322	}
1da177e4	323
1da177e4 LT	324	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4 LT	325	{
69dde4c5 CM	326	const pteval_t mask = L_PTE_XN \| L_PTE_RDONLY \| L_PTE_USER \|
69dde4c5 CM	327	L_PTE_NONE \| L_PTE_VALID;
1da177e4 LT	328	pte_val(pte) = (pte_val(pte) & ~mask) \| (pgprot_val(newprot) & mask);
	329	return pte;
	330	}
	331
fb93a1c7 RK	332	/*
	333	* Encode and decode a swap entry. Swap entries are stored in the Linux
	334	* page tables as follows:
	335	*
	336	* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
	337	* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
b007ea79	338	* <--------------- offset ------------------------> < type -> 0 0
1da177e4	339	*
b007ea79	340	* This gives us up to 31 swap files and 128GB per swap file. Note that
fb93a1c7	341	* the offset field is always non-zero.
1da177e4	342	*/
b007ea79	343	#define __SWP_TYPE_SHIFT 2
f5f2025e	344	#define __SWP_TYPE_BITS 5
fb93a1c7 RK	345	#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
	346	#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
	347
	348	#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
	349	#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
	350	#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) \| ((offset) << __SWP_OFFSET_SHIFT) })
	351
1da177e4 LT	352	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	353	#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
	354
fb93a1c7 RK	355	/*
	356	* It is an error for the kernel to have more swap files than we can
	357	* encode in the PTEs. This ensures that we know when MAX_SWAPFILES
	358	* is increased beyond what we presently support.
	359	*/
	360	#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
	361
1da177e4 LT	362	/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
	363	/* FIXME: this is not correct */
	364	#define kern_addr_valid(addr) (1)
	365
	366	#include <asm-generic/pgtable.h>
	367
	368	/*
	369	* We provide our own arch_get_unmapped_area to cope with VIPT caches.
	370	*/
	371	#define HAVE_ARCH_UNMAPPED_AREA
7dbaa466	372	#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4	373
1da177e4 LT	374	#define pgtable_cache_init() do { } while (0)
	375
	376	#endif /* !__ASSEMBLY__ */
	377
002547b4 RK	378	#endif /* CONFIG_MMU */
002547b4 RK	379
1da177e4	380	#endif /* _ASMARM_PGTABLE_H */