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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
002547b4 | 2 | /* |
4baa9922 | 3 | * arch/arm/include/asm/pgtable-nommu.h |
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4 | * |
5 | * Copyright (C) 1995-2002 Russell King | |
6 | * Copyright (C) 2004 Hyok S. Choi | |
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7 | */ |
8 | #ifndef _ASMARM_PGTABLE_NOMMU_H | |
9 | #define _ASMARM_PGTABLE_NOMMU_H | |
10 | ||
11 | #ifndef __ASSEMBLY__ | |
12 | ||
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13 | #include <linux/slab.h> |
14 | #include <asm/processor.h> | |
15 | #include <asm/page.h> | |
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16 | |
17 | /* | |
18 | * Trivial page table functions. | |
19 | */ | |
20 | #define pgd_present(pgd) (1) | |
21 | #define pgd_none(pgd) (0) | |
22 | #define pgd_bad(pgd) (0) | |
23 | #define pgd_clear(pgdp) | |
24 | #define kern_addr_valid(addr) (1) | |
25 | #define pmd_offset(a, b) ((void *)0) | |
26 | /* FIXME */ | |
27 | /* | |
28 | * PMD_SHIFT determines the size of the area a second-level page table can map | |
29 | * PGDIR_SHIFT determines what a third-level page table entry can map | |
30 | */ | |
31 | #define PGDIR_SHIFT 21 | |
32 | ||
33 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | |
34 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | |
35 | /* FIXME */ | |
36 | ||
37 | #define PAGE_NONE __pgprot(0) | |
38 | #define PAGE_SHARED __pgprot(0) | |
39 | #define PAGE_COPY __pgprot(0) | |
40 | #define PAGE_READONLY __pgprot(0) | |
41 | #define PAGE_KERNEL __pgprot(0) | |
42 | ||
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43 | #define swapper_pg_dir ((pgd_t *) 0) |
44 | ||
45 | #define __swp_type(x) (0) | |
46 | #define __swp_offset(x) (0) | |
47 | #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) | |
48 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | |
49 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | |
50 | ||
51 | ||
52 | typedef pte_t *pte_addr_t; | |
53 | ||
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54 | /* |
55 | * ZERO_PAGE is a global shared page that is always zero: used | |
56 | * for zero-mapped memory areas etc.. | |
57 | */ | |
58 | #define ZERO_PAGE(vaddr) (virt_to_page(0)) | |
59 | ||
60 | /* | |
61 | * Mark the prot value as uncacheable and unbufferable. | |
62 | */ | |
e2fce0a2 AB |
63 | #define pgprot_noncached(prot) (prot) |
64 | #define pgprot_writecombine(prot) (prot) | |
7ef4783e | 65 | #define pgprot_device(prot) (prot) |
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66 | |
67 | ||
68 | /* | |
69 | * These would be in other places but having them here reduces the diffs. | |
70 | */ | |
71 | extern unsigned int kobjsize(const void *objp); | |
002547b4 | 72 | |
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73 | /* |
74 | * All 32bit addresses are effectively valid for vmalloc... | |
75 | * Sort of meaningless for non-VM targets. | |
76 | */ | |
c931b4f6 FB |
77 | #define VMALLOC_START 0UL |
78 | #define VMALLOC_END 0xffffffffUL | |
002547b4 | 79 | |
d016bf7e | 80 | #define FIRST_USER_ADDRESS 0UL |
002547b4 | 81 | |
92df7851 GU |
82 | #include <asm-generic/pgtable.h> |
83 | ||
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84 | #else |
85 | ||
86 | /* | |
87 | * dummy tlb and user structures. | |
88 | */ | |
89 | #define v3_tlb_fns (0) | |
90 | #define v4_tlb_fns (0) | |
91 | #define v4wb_tlb_fns (0) | |
92 | #define v4wbi_tlb_fns (0) | |
7b4c965a | 93 | #define v6wbi_tlb_fns (0) |
2eb8c82b | 94 | #define v7wbi_tlb_fns (0) |
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95 | |
96 | #define v3_user_fns (0) | |
97 | #define v4_user_fns (0) | |
98 | #define v4_mc_user_fns (0) | |
99 | #define v4wb_user_fns (0) | |
100 | #define v4wt_user_fns (0) | |
101 | #define v6_user_fns (0) | |
102 | #define xscale_mc_user_fns (0) | |
103 | ||
104 | #endif /*__ASSEMBLY__*/ | |
105 | ||
106 | #endif /* _ASMARM_PGTABLE_H */ |