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45051539 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
33f663ff CM |
2 | /* |
3 | * arch/arm/include/asm/outercache.h | |
4 | * | |
5 | * Copyright (C) 2010 ARM Ltd. | |
6 | * Written by Catalin Marinas <catalin.marinas@arm.com> | |
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7 | */ |
8 | ||
9 | #ifndef __ASM_OUTERCACHE_H | |
10 | #define __ASM_OUTERCACHE_H | |
11 | ||
ad6b9c9d WD |
12 | #include <linux/types.h> |
13 | ||
c6d1a2d0 TF |
14 | struct l2x0_regs; |
15 | ||
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16 | struct outer_cache_fns { |
17 | void (*inv_range)(unsigned long, unsigned long); | |
18 | void (*clean_range)(unsigned long, unsigned long); | |
19 | void (*flush_range)(unsigned long, unsigned long); | |
ae360a78 | 20 | void (*flush_all)(void); |
ae360a78 | 21 | void (*disable)(void); |
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22 | #ifdef CONFIG_OUTER_CACHE_SYNC |
23 | void (*sync)(void); | |
24 | #endif | |
91c2ebb9 | 25 | void (*resume)(void); |
8abd259f RK |
26 | |
27 | /* This is an ARM L2C thing */ | |
8abd259f | 28 | void (*write_sec)(unsigned long, unsigned); |
c6d1a2d0 | 29 | void (*configure)(const struct l2x0_regs *); |
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30 | }; |
31 | ||
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32 | extern struct outer_cache_fns outer_cache; |
33 | ||
0b53c11d | 34 | #ifdef CONFIG_OUTER_CACHE |
bc4f94d8 RK |
35 | /** |
36 | * outer_inv_range - invalidate range of outer cache lines | |
37 | * @start: starting physical address, inclusive | |
38 | * @end: end physical address, exclusive | |
39 | */ | |
ad6b9c9d | 40 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
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41 | { |
42 | if (outer_cache.inv_range) | |
43 | outer_cache.inv_range(start, end); | |
44 | } | |
bc4f94d8 RK |
45 | |
46 | /** | |
47 | * outer_clean_range - clean dirty outer cache lines | |
48 | * @start: starting physical address, inclusive | |
49 | * @end: end physical address, exclusive | |
50 | */ | |
ad6b9c9d | 51 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
33f663ff CM |
52 | { |
53 | if (outer_cache.clean_range) | |
54 | outer_cache.clean_range(start, end); | |
55 | } | |
bc4f94d8 RK |
56 | |
57 | /** | |
58 | * outer_flush_range - clean and invalidate outer cache lines | |
59 | * @start: starting physical address, inclusive | |
60 | * @end: end physical address, exclusive | |
61 | */ | |
ad6b9c9d | 62 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
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63 | { |
64 | if (outer_cache.flush_range) | |
65 | outer_cache.flush_range(start, end); | |
66 | } | |
67 | ||
bc4f94d8 RK |
68 | /** |
69 | * outer_flush_all - clean and invalidate all cache lines in the outer cache | |
70 | * | |
71 | * Note: depending on implementation, this may not be atomic - it must | |
72 | * only be called with interrupts disabled and no other active outer | |
73 | * cache masters. | |
74 | * | |
75 | * It is intended that this function is only used by implementations | |
76 | * needing to override the outer_cache.disable() method due to security. | |
77 | * (Some implementations perform this as a clean followed by an invalidate.) | |
78 | */ | |
ae360a78 TG |
79 | static inline void outer_flush_all(void) |
80 | { | |
81 | if (outer_cache.flush_all) | |
82 | outer_cache.flush_all(); | |
83 | } | |
84 | ||
bc4f94d8 RK |
85 | /** |
86 | * outer_disable - clean, invalidate and disable the outer cache | |
87 | * | |
88 | * Disable the outer cache, ensuring that any data contained in the outer | |
89 | * cache is pushed out to lower levels of system memory. The note and | |
90 | * conditions above concerning outer_flush_all() applies here. | |
91 | */ | |
1f1d5b74 | 92 | extern void outer_disable(void); |
ae360a78 | 93 | |
bc4f94d8 RK |
94 | /** |
95 | * outer_resume - restore the cache configuration and re-enable outer cache | |
96 | * | |
97 | * Restore any configuration that the cache had when previously enabled, | |
98 | * and re-enable the outer cache. | |
99 | */ | |
91c2ebb9 BS |
100 | static inline void outer_resume(void) |
101 | { | |
102 | if (outer_cache.resume) | |
103 | outer_cache.resume(); | |
104 | } | |
105 | ||
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106 | #else |
107 | ||
ad6b9c9d | 108 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 109 | { } |
ad6b9c9d | 110 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 111 | { } |
ad6b9c9d | 112 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 113 | { } |
ae360a78 | 114 | static inline void outer_flush_all(void) { } |
ae360a78 | 115 | static inline void outer_disable(void) { } |
4e79a62d | 116 | static inline void outer_resume(void) { } |
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117 | |
118 | #endif | |
119 | ||
120 | #endif /* __ASM_OUTERCACHE_H */ |