[linux-2.6-block.git] / arch / arm / include / asm / irqflags.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ARM_IRQFLAGS_H
#define __ASM_ARM_IRQFLAGS_H

#ifdef __KERNEL__

#include <asm/ptrace.h>

/*
 * CPU interrupt mask handling.
 */
#ifdef CONFIG_CPU_V7M
#define IRQMASK_REG_NAME_R "primask"
#define IRQMASK_REG_NAME_W "primask"
#define IRQMASK_I_BIT	1
#else
#define IRQMASK_REG_NAME_R "cpsr"
#define IRQMASK_REG_NAME_W "cpsr_c"
#define IRQMASK_I_BIT	PSR_I_BIT
#endif

#if __LINUX_ARM_ARCH__ >= 6

#define arch_local_irq_save arch_local_irq_save
static inline unsigned long arch_local_irq_save(void)
{
	unsigned long flags;

	asm volatile(
		"	mrs	%0, " IRQMASK_REG_NAME_R "	@ arch_local_irq_save\n"
		"	cpsid	i"
		: "=r" (flags) : : "memory", "cc");
	return flags;
}

#define arch_local_irq_enable arch_local_irq_enable
static inline void arch_local_irq_enable(void)
{
	asm volatile(
		"	cpsie i			@ arch_local_irq_enable"
		:
		:
		: "memory", "cc");
}

#define arch_local_irq_disable arch_local_irq_disable
static inline void arch_local_irq_disable(void)
{
	asm volatile(
		"	cpsid i			@ arch_local_irq_disable"
		:
		:
		: "memory", "cc");
}

#define local_fiq_enable()  __asm__("cpsie f	@ __stf" : : : "memory", "cc")
#define local_fiq_disable() __asm__("cpsid f	@ __clf" : : : "memory", "cc")

#ifndef CONFIG_CPU_V7M
#define local_abt_enable()  __asm__("cpsie a	@ __sta" : : : "memory", "cc")
#define local_abt_disable() __asm__("cpsid a	@ __cla" : : : "memory", "cc")
#else
#define local_abt_enable()	do { } while (0)
#define local_abt_disable()	do { } while (0)
#endif
#else

/*
 * Save the current interrupt enable state & disable IRQs
 */
#define arch_local_irq_save arch_local_irq_save
static inline unsigned long arch_local_irq_save(void)
{
	unsigned long flags, temp;

	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_save\n"
		"	orr	%1, %0, #128\n"
		"	msr	cpsr_c, %1"
		: "=r" (flags), "=r" (temp)
		:
		: "memory", "cc");
	return flags;
}

/*
 * Enable IRQs
 */
#define arch_local_irq_enable arch_local_irq_enable
static inline void arch_local_irq_enable(void)
{
	unsigned long temp;
	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_enable\n"
		"	bic	%0, %0, #128\n"
		"	msr	cpsr_c, %0"
		: "=r" (temp)
		:
		: "memory", "cc");
}

/*
 * Disable IRQs
 */
#define arch_local_irq_disable arch_local_irq_disable
static inline void arch_local_irq_disable(void)
{
	unsigned long temp;
	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_disable\n"
		"	orr	%0, %0, #128\n"
		"	msr	cpsr_c, %0"
		: "=r" (temp)
		:
		: "memory", "cc");
}

/*
 * Enable FIQs
 */
#define local_fiq_enable()					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ stf\n"		\
"	bic	%0, %0, #64\n"					\
"	msr	cpsr_c, %0"					\
	: "=r" (temp)						\
	:							\
	: "memory", "cc");					\
	})

/*
 * Disable FIQs
 */
#define local_fiq_disable()					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ clf\n"		\
"	orr	%0, %0, #64\n"					\
"	msr	cpsr_c, %0"					\
	: "=r" (temp)						\
	:							\
	: "memory", "cc");					\
	})

#define local_abt_enable()	do { } while (0)
#define local_abt_disable()	do { } while (0)
#endif

/*
 * Save the current interrupt enable state.
 */
#define arch_local_save_flags arch_local_save_flags
static inline unsigned long arch_local_save_flags(void)
{
	unsigned long flags;
	asm volatile(
		"	mrs	%0, " IRQMASK_REG_NAME_R "	@ local_save_flags"
		: "=r" (flags) : : "memory", "cc");
	return flags;
}

/*
 * restore saved IRQ & FIQ state
 */
#define arch_local_irq_restore arch_local_irq_restore
static inline void arch_local_irq_restore(unsigned long flags)
{
	asm volatile(
		"	msr	" IRQMASK_REG_NAME_W ", %0	@ local_irq_restore"
		:
		: "r" (flags)
		: "memory", "cc");
}

#define arch_irqs_disabled_flags arch_irqs_disabled_flags
static inline int arch_irqs_disabled_flags(unsigned long flags)
{
	return flags & IRQMASK_I_BIT;
}

#include <asm-generic/irqflags.h>

#endif /* ifdef __KERNEL__ */
#endif /* ifndef __ASM_ARM_IRQFLAGS_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
7ad1bcb2 RK	2	#ifndef __ASM_ARM_IRQFLAGS_H
	3	#define __ASM_ARM_IRQFLAGS_H
	4
	5	#ifdef __KERNEL__
	6
	7	#include <asm/ptrace.h>
	8
	9	/*
	10	* CPU interrupt mask handling.
	11	*/
55bdd694 CM	12	#ifdef CONFIG_CPU_V7M
	13	#define IRQMASK_REG_NAME_R "primask"
	14	#define IRQMASK_REG_NAME_W "primask"
	15	#define IRQMASK_I_BIT 1
	16	#else
	17	#define IRQMASK_REG_NAME_R "cpsr"
	18	#define IRQMASK_REG_NAME_W "cpsr_c"
	19	#define IRQMASK_I_BIT PSR_I_BIT
	20	#endif
	21
7ad1bcb2 RK	22	#if __LINUX_ARM_ARCH__ >= 6
7ad1bcb2 RK	23
6fb18ac9	24	#define arch_local_irq_save arch_local_irq_save
df9ee292 DH	25	static inline unsigned long arch_local_irq_save(void)
	26	{
	27	unsigned long flags;
	28
	29	asm volatile(
55bdd694	30	" mrs %0, " IRQMASK_REG_NAME_R " @ arch_local_irq_save\n"
df9ee292 DH	31	" cpsid i"
	32	: "=r" (flags) : : "memory", "cc");
	33	return flags;
	34	}
	35
6fb18ac9	36	#define arch_local_irq_enable arch_local_irq_enable
df9ee292 DH	37	static inline void arch_local_irq_enable(void)
	38	{
	39	asm volatile(
	40	" cpsie i @ arch_local_irq_enable"
	41	:
	42	:
	43	: "memory", "cc");
	44	}
	45
6fb18ac9	46	#define arch_local_irq_disable arch_local_irq_disable
df9ee292 DH	47	static inline void arch_local_irq_disable(void)
	48	{
	49	asm volatile(
	50	" cpsid i @ arch_local_irq_disable"
	51	:
	52	:
	53	: "memory", "cc");
	54	}
7ad1bcb2	55
7ad1bcb2 RK	56	#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
7ad1bcb2 RK	57	#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
bbeb9209 LS	58
	59	#ifndef CONFIG_CPU_V7M
	60	#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
	61	#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
	62	#else
	63	#define local_abt_enable() do { } while (0)
	64	#define local_abt_disable() do { } while (0)
	65	#endif
7ad1bcb2 RK	66	#else
	67
	68	/*
	69	* Save the current interrupt enable state & disable IRQs
	70	*/
6fb18ac9	71	#define arch_local_irq_save arch_local_irq_save
df9ee292 DH	72	static inline unsigned long arch_local_irq_save(void)
	73	{
	74	unsigned long flags, temp;
	75
	76	asm volatile(
	77	" mrs %0, cpsr @ arch_local_irq_save\n"
	78	" orr %1, %0, #128\n"
	79	" msr cpsr_c, %1"
	80	: "=r" (flags), "=r" (temp)
	81	:
	82	: "memory", "cc");
	83	return flags;
	84	}
	85
7ad1bcb2 RK	86	/*
	87	* Enable IRQs
	88	*/
6fb18ac9	89	#define arch_local_irq_enable arch_local_irq_enable
df9ee292 DH	90	static inline void arch_local_irq_enable(void)
	91	{
	92	unsigned long temp;
	93	asm volatile(
	94	" mrs %0, cpsr @ arch_local_irq_enable\n"
	95	" bic %0, %0, #128\n"
	96	" msr cpsr_c, %0"
	97	: "=r" (temp)
	98	:
	99	: "memory", "cc");
	100	}
7ad1bcb2 RK	101
	102	/*
	103	* Disable IRQs
	104	*/
6fb18ac9	105	#define arch_local_irq_disable arch_local_irq_disable
df9ee292 DH	106	static inline void arch_local_irq_disable(void)
	107	{
	108	unsigned long temp;
	109	asm volatile(
	110	" mrs %0, cpsr @ arch_local_irq_disable\n"
	111	" orr %0, %0, #128\n"
	112	" msr cpsr_c, %0"
	113	: "=r" (temp)
	114	:
	115	: "memory", "cc");
	116	}
7ad1bcb2 RK	117
	118	/*
	119	* Enable FIQs
	120	*/
	121	#define local_fiq_enable() \
	122	({ \
	123	unsigned long temp; \
	124	__asm__ __volatile__( \
	125	"mrs %0, cpsr @ stf\n" \
	126	" bic %0, %0, #64\n" \
	127	" msr cpsr_c, %0" \
	128	: "=r" (temp) \
	129	: \
	130	: "memory", "cc"); \
	131	})
	132
	133	/*
	134	* Disable FIQs
	135	*/
	136	#define local_fiq_disable() \
	137	({ \
	138	unsigned long temp; \
	139	__asm__ __volatile__( \
	140	"mrs %0, cpsr @ clf\n" \
	141	" orr %0, %0, #64\n" \
	142	" msr cpsr_c, %0" \
	143	: "=r" (temp) \
	144	: \
	145	: "memory", "cc"); \
	146	})
	147
bbeb9209 LS	148	#define local_abt_enable() do { } while (0)
bbeb9209 LS	149	#define local_abt_disable() do { } while (0)
7ad1bcb2 RK	150	#endif
	151
	152	/*
	153	* Save the current interrupt enable state.
	154	*/
6fb18ac9	155	#define arch_local_save_flags arch_local_save_flags
df9ee292 DH	156	static inline unsigned long arch_local_save_flags(void)
	157	{
	158	unsigned long flags;
	159	asm volatile(
55bdd694	160	" mrs %0, " IRQMASK_REG_NAME_R " @ local_save_flags"
df9ee292 DH	161	: "=r" (flags) : : "memory", "cc");
	162	return flags;
	163	}
7ad1bcb2 RK	164
	165	/*
	166	* restore saved IRQ & FIQ state
	167	*/
6fb18ac9	168	#define arch_local_irq_restore arch_local_irq_restore
df9ee292 DH	169	static inline void arch_local_irq_restore(unsigned long flags)
	170	{
	171	asm volatile(
55bdd694	172	" msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
df9ee292 DH	173	:
	174	: "r" (flags)
	175	: "memory", "cc");
	176	}
7ad1bcb2	177
6fb18ac9	178	#define arch_irqs_disabled_flags arch_irqs_disabled_flags
df9ee292 DH	179	static inline int arch_irqs_disabled_flags(unsigned long flags)
df9ee292 DH	180	{
55bdd694	181	return flags & IRQMASK_I_BIT;
df9ee292	182	}
7ad1bcb2	183
6fb18ac9 DT	184	#include <asm-generic/irqflags.h>
6fb18ac9 DT	185
55bdd694 CM	186	#endif /* ifdef __KERNEL__ */
55bdd694 CM	187	#endif /* ifndef __ASM_ARM_IRQFLAGS_H */