projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 753790e7 RK |
2 | /* |
| 3 | * arch/arm/include/asm/glue-cache.h | |
| 4 | * | |
| 5 | * Copyright (C) 1999-2002 Russell King | |
| 753790e7 RK |
6 | */ |
| 7 | #ifndef ASM_GLUE_CACHE_H | |
| 8 | #define ASM_GLUE_CACHE_H | |
| 9 | ||
| 10 | #include <asm/glue.h> | |
| 11 | ||
| 12 | /* | |
| 13 | * Cache Model | |
| 14 | * =========== | |
| 15 | */ | |
| 16 | #undef _CACHE | |
| 17 | #undef MULTI_CACHE | |
| 18 | ||
| 753790e7 RK |
19 | #if defined(CONFIG_CPU_CACHE_V4) |
| 20 | # ifdef _CACHE | |
| 21 | # define MULTI_CACHE 1 | |
| 22 | # else | |
| 23 | # define _CACHE v4 | |
| 24 | # endif | |
| 25 | #endif | |
| 26 | ||
| 27 | #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ | |
| 28 | defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ | |
| 29 | defined(CONFIG_CPU_ARM1026) | |
| 30 | # define MULTI_CACHE 1 | |
| 31 | #endif | |
| 32 | ||
| 33 | #if defined(CONFIG_CPU_FA526) | |
| 34 | # ifdef _CACHE | |
| 35 | # define MULTI_CACHE 1 | |
| 36 | # else | |
| 37 | # define _CACHE fa | |
| 38 | # endif | |
| 39 | #endif | |
| 40 | ||
| 41 | #if defined(CONFIG_CPU_ARM926T) | |
| 42 | # ifdef _CACHE | |
| 43 | # define MULTI_CACHE 1 | |
| 44 | # else | |
| 45 | # define _CACHE arm926 | |
| 46 | # endif | |
| 47 | #endif | |
| 48 | ||
| 49 | #if defined(CONFIG_CPU_ARM940T) | |
| 50 | # ifdef _CACHE | |
| 51 | # define MULTI_CACHE 1 | |
| 52 | # else | |
| 53 | # define _CACHE arm940 | |
| 54 | # endif | |
| 55 | #endif | |
| 56 | ||
| 57 | #if defined(CONFIG_CPU_ARM946E) | |
| 58 | # ifdef _CACHE | |
| 59 | # define MULTI_CACHE 1 | |
| 60 | # else | |
| 61 | # define _CACHE arm946 | |
| 62 | # endif | |
| 63 | #endif | |
| 64 | ||
| 65 | #if defined(CONFIG_CPU_CACHE_V4WB) | |
| 66 | # ifdef _CACHE | |
| 67 | # define MULTI_CACHE 1 | |
| 68 | # else | |
| 69 | # define _CACHE v4wb | |
| 70 | # endif | |
| 71 | #endif | |
| 72 | ||
| 73 | #if defined(CONFIG_CPU_XSCALE) | |
| 74 | # ifdef _CACHE | |
| 75 | # define MULTI_CACHE 1 | |
| 76 | # else | |
| 77 | # define _CACHE xscale | |
| 78 | # endif | |
| 79 | #endif | |
| 80 | ||
| 81 | #if defined(CONFIG_CPU_XSC3) | |
| 82 | # ifdef _CACHE | |
| 83 | # define MULTI_CACHE 1 | |
| 84 | # else | |
| 85 | # define _CACHE xsc3 | |
| 86 | # endif | |
| 87 | #endif | |
| 88 | ||
| 89 | #if defined(CONFIG_CPU_MOHAWK) | |
| 90 | # ifdef _CACHE | |
| 91 | # define MULTI_CACHE 1 | |
| 92 | # else | |
| 93 | # define _CACHE mohawk | |
| 94 | # endif | |
| 95 | #endif | |
| 96 | ||
| 97 | #if defined(CONFIG_CPU_FEROCEON) | |
| 98 | # define MULTI_CACHE 1 | |
| 99 | #endif | |
| 100 | ||
| bd1274dc | 101 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) |
| a67e1ce1 | 102 | # ifdef _CACHE |
| 753790e7 | 103 | # define MULTI_CACHE 1 |
| a67e1ce1 RK |
104 | # else |
| 105 | # define _CACHE v6 | |
| 106 | # endif | |
| 753790e7 RK |
107 | #endif |
| 108 | ||
| 109 | #if defined(CONFIG_CPU_V7) | |
| a67e1ce1 | 110 | # ifdef _CACHE |
| 753790e7 | 111 | # define MULTI_CACHE 1 |
| a67e1ce1 RK |
112 | # else |
| 113 | # define _CACHE v7 | |
| 114 | # endif | |
| 753790e7 RK |
115 | #endif |
| 116 | ||
| f6f9be1c FF |
117 | #if defined(CONFIG_CACHE_B15_RAC) |
| 118 | # define MULTI_CACHE 1 | |
| 119 | #endif | |
| 120 | ||
| b4d20eff LW |
121 | #ifdef CONFIG_CPU_CACHE_NOP |
| 122 | # define MULTI_CACHE 1 | |
| 123 | #endif | |
| 124 | ||
| 55bdd694 | 125 | #if defined(CONFIG_CPU_V7M) |
| 55bdd694 | 126 | # define MULTI_CACHE 1 |
| 55bdd694 CM |
127 | #endif |
| 128 | ||
| 753790e7 | 129 | #if !defined(_CACHE) && !defined(MULTI_CACHE) |
| 25985edc | 130 | #error Unknown cache maintenance model |
| 753790e7 RK |
131 | #endif |
| 132 | ||
| 133 | #ifndef MULTI_CACHE | |
| 134 | #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) | |
| 135 | #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) | |
| b4d20eff LW |
136 | /* This function only has a dedicated assembly callback on the v7 cache */ |
| 137 | #ifdef CONFIG_CPU_CACHE_V7 | |
| 031bd879 | 138 | #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis) |
| b4d20eff LW |
139 | #else |
| 140 | #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_all) | |
| 141 | #endif | |
| 753790e7 RK |
142 | #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) |
| 143 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) | |
| 144 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) | |
| 145 | #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) | |
| 146 | #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) | |
| 147 | ||
| 753790e7 RK |
148 | #define dmac_flush_range __glue(_CACHE,_dma_flush_range) |
| 149 | #endif | |
| 150 | ||
| 151 | #endif |