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1da177e4 LT |
1 | #ifndef __ASM_ARM_DMA_H |
2 | #define __ASM_ARM_DMA_H | |
3 | ||
b9c78022 | 4 | #include <asm/memory.h> |
1da177e4 | 5 | |
d4c6fc99 RK |
6 | /* |
7 | * This is the maximum virtual address which can be DMA'd from. | |
8 | */ | |
9 | #ifndef MAX_DMA_ADDRESS | |
10 | #define MAX_DMA_ADDRESS 0xffffffff | |
11 | #endif | |
12 | ||
dcea83ad RK |
13 | #ifdef CONFIG_ISA_DMA_API |
14 | /* | |
15 | * This is used to support drivers written for the x86 ISA DMA API. | |
16 | * It should not be re-used except for that purpose. | |
17 | */ | |
18 | #include <linux/spinlock.h> | |
19 | #include <asm/system.h> | |
20 | #include <asm/scatterlist.h> | |
21 | ||
f40b121d | 22 | #include <mach/isa-dma.h> |
dcea83ad | 23 | |
bc6447b8 RK |
24 | /* |
25 | * The DMA modes reflect the settings for the ISA DMA controller | |
26 | */ | |
27 | #define DMA_MODE_MASK 0xcc | |
1da177e4 | 28 | |
bc6447b8 RK |
29 | #define DMA_MODE_READ 0x44 |
30 | #define DMA_MODE_WRITE 0x48 | |
31 | #define DMA_MODE_CASCADE 0xc0 | |
32 | #define DMA_AUTOINIT 0x10 | |
1da177e4 LT |
33 | |
34 | extern spinlock_t dma_spin_lock; | |
35 | ||
36 | static inline unsigned long claim_dma_lock(void) | |
37 | { | |
38 | unsigned long flags; | |
39 | spin_lock_irqsave(&dma_spin_lock, flags); | |
40 | return flags; | |
41 | } | |
42 | ||
43 | static inline void release_dma_lock(unsigned long flags) | |
44 | { | |
45 | spin_unlock_irqrestore(&dma_spin_lock, flags); | |
46 | } | |
47 | ||
48 | /* Clear the 'DMA Pointer Flip Flop'. | |
49 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. | |
50 | */ | |
1df81302 | 51 | #define clear_dma_ff(chan) |
1da177e4 LT |
52 | |
53 | /* Set only the page register bits of the transfer address. | |
54 | * | |
55 | * NOTE: This is an architecture specific function, and should | |
56 | * be hidden from the drivers | |
57 | */ | |
1df81302 | 58 | extern void set_dma_page(unsigned int chan, char pagenr); |
1da177e4 LT |
59 | |
60 | /* Request a DMA channel | |
61 | * | |
62 | * Some architectures may need to do allocate an interrupt | |
63 | */ | |
1df81302 | 64 | extern int request_dma(unsigned int chan, const char * device_id); |
1da177e4 LT |
65 | |
66 | /* Free a DMA channel | |
67 | * | |
68 | * Some architectures may need to do free an interrupt | |
69 | */ | |
1df81302 | 70 | extern void free_dma(unsigned int chan); |
1da177e4 LT |
71 | |
72 | /* Enable DMA for this channel | |
73 | * | |
74 | * On some architectures, this may have other side effects like | |
75 | * enabling an interrupt and setting the DMA registers. | |
76 | */ | |
1df81302 | 77 | extern void enable_dma(unsigned int chan); |
1da177e4 LT |
78 | |
79 | /* Disable DMA for this channel | |
80 | * | |
81 | * On some architectures, this may have other side effects like | |
82 | * disabling an interrupt or whatever. | |
83 | */ | |
1df81302 | 84 | extern void disable_dma(unsigned int chan); |
1da177e4 LT |
85 | |
86 | /* Test whether the specified channel has an active DMA transfer | |
87 | */ | |
1df81302 | 88 | extern int dma_channel_active(unsigned int chan); |
1da177e4 LT |
89 | |
90 | /* Set the DMA scatter gather list for this channel | |
91 | * | |
92 | * This should not be called if a DMA channel is enabled, | |
93 | * especially since some DMA architectures don't update the | |
94 | * DMA address immediately, but defer it to the enable_dma(). | |
95 | */ | |
1df81302 | 96 | extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); |
1da177e4 LT |
97 | |
98 | /* Set the DMA address for this channel | |
99 | * | |
100 | * This should not be called if a DMA channel is enabled, | |
101 | * especially since some DMA architectures don't update the | |
102 | * DMA address immediately, but defer it to the enable_dma(). | |
103 | */ | |
1df81302 RK |
104 | extern void __set_dma_addr(unsigned int chan, void *addr); |
105 | #define set_dma_addr(chan, addr) \ | |
106 | __set_dma_addr(chan, bus_to_virt(addr)) | |
1da177e4 LT |
107 | |
108 | /* Set the DMA byte count for this channel | |
109 | * | |
110 | * This should not be called if a DMA channel is enabled, | |
111 | * especially since some DMA architectures don't update the | |
112 | * DMA count immediately, but defer it to the enable_dma(). | |
113 | */ | |
1df81302 | 114 | extern void set_dma_count(unsigned int chan, unsigned long count); |
1da177e4 LT |
115 | |
116 | /* Set the transfer direction for this channel | |
117 | * | |
118 | * This should not be called if a DMA channel is enabled, | |
119 | * especially since some DMA architectures don't update the | |
120 | * DMA transfer direction immediately, but defer it to the | |
121 | * enable_dma(). | |
122 | */ | |
f0ffc816 | 123 | extern void set_dma_mode(unsigned int chan, unsigned int mode); |
1da177e4 LT |
124 | |
125 | /* Set the transfer speed for this channel | |
126 | */ | |
1df81302 | 127 | extern void set_dma_speed(unsigned int chan, int cycle_ns); |
1da177e4 LT |
128 | |
129 | /* Get DMA residue count. After a DMA transfer, this | |
130 | * should return zero. Reading this while a DMA transfer is | |
131 | * still in progress will return unpredictable results. | |
132 | * If called before the channel has been used, it may return 1. | |
133 | * Otherwise, it returns the number of _bytes_ left to transfer. | |
134 | */ | |
1df81302 | 135 | extern int get_dma_residue(unsigned int chan); |
1da177e4 LT |
136 | |
137 | #ifndef NO_DMA | |
138 | #define NO_DMA 255 | |
139 | #endif | |
140 | ||
f892027c PH |
141 | #endif /* CONFIG_ISA_DMA_API */ |
142 | ||
1da177e4 LT |
143 | #ifdef CONFIG_PCI |
144 | extern int isa_dma_bridge_buggy; | |
145 | #else | |
146 | #define isa_dma_bridge_buggy (0) | |
147 | #endif | |
148 | ||
dcea83ad | 149 | #endif /* __ASM_ARM_DMA_H */ |