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1da177e4 LT |
1 | #ifndef ASMARM_DMA_MAPPING_H |
2 | #define ASMARM_DMA_MAPPING_H | |
3 | ||
4 | #ifdef __KERNEL__ | |
5 | ||
98ed7d4b | 6 | #include <linux/mm_types.h> |
dee9ba82 | 7 | #include <linux/scatterlist.h> |
f99d6034 | 8 | #include <linux/dma-attrs.h> |
24056f52 | 9 | #include <linux/dma-debug.h> |
1da177e4 | 10 | |
1fe53268 | 11 | #include <asm-generic/dma-coherent.h> |
98ed7d4b RK |
12 | #include <asm/memory.h> |
13 | ||
553ac788 | 14 | #define DMA_ERROR_CODE (~0) |
2dc6a016 | 15 | extern struct dma_map_ops arm_dma_ops; |
dd37e940 | 16 | extern struct dma_map_ops arm_coherent_dma_ops; |
2dc6a016 MS |
17 | |
18 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) | |
19 | { | |
20 | if (dev && dev->archdata.dma_ops) | |
21 | return dev->archdata.dma_ops; | |
22 | return &arm_dma_ops; | |
23 | } | |
24 | ||
25 | static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops) | |
26 | { | |
27 | BUG_ON(!dev); | |
28 | dev->archdata.dma_ops = ops; | |
29 | } | |
30 | ||
31 | #include <asm-generic/dma-mapping-common.h> | |
32 | ||
33 | static inline int dma_set_mask(struct device *dev, u64 mask) | |
34 | { | |
35 | return get_dma_ops(dev)->set_dma_mask(dev, mask); | |
36 | } | |
553ac788 | 37 | |
9eedd963 RK |
38 | #ifdef __arch_page_to_dma |
39 | #error Please update to __arch_pfn_to_dma | |
40 | #endif | |
41 | ||
98ed7d4b | 42 | /* |
9eedd963 RK |
43 | * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private |
44 | * functions used internally by the DMA-mapping API to provide DMA | |
45 | * addresses. They must not be used by drivers. | |
98ed7d4b | 46 | */ |
9eedd963 RK |
47 | #ifndef __arch_pfn_to_dma |
48 | static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn) | |
58edb515 | 49 | { |
9eedd963 | 50 | return (dma_addr_t)__pfn_to_bus(pfn); |
58edb515 | 51 | } |
98ed7d4b | 52 | |
9eedd963 | 53 | static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) |
ef1baed8 | 54 | { |
9eedd963 | 55 | return __bus_to_pfn(addr); |
ef1baed8 RK |
56 | } |
57 | ||
98ed7d4b RK |
58 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
59 | { | |
01f461a3 | 60 | return (void *)__bus_to_virt((unsigned long)addr); |
98ed7d4b RK |
61 | } |
62 | ||
63 | static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) | |
64 | { | |
65 | return (dma_addr_t)__virt_to_bus((unsigned long)(addr)); | |
66 | } | |
67 | #else | |
9eedd963 | 68 | static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn) |
98ed7d4b | 69 | { |
9eedd963 | 70 | return __arch_pfn_to_dma(dev, pfn); |
98ed7d4b RK |
71 | } |
72 | ||
9eedd963 | 73 | static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) |
ef1baed8 | 74 | { |
9eedd963 | 75 | return __arch_dma_to_pfn(dev, addr); |
ef1baed8 RK |
76 | } |
77 | ||
98ed7d4b RK |
78 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
79 | { | |
80 | return __arch_dma_to_virt(dev, addr); | |
81 | } | |
82 | ||
83 | static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) | |
84 | { | |
85 | return __arch_virt_to_dma(dev, addr); | |
86 | } | |
87 | #endif | |
1fe53268 | 88 | |
1da177e4 LT |
89 | /* |
90 | * DMA errors are defined by all-bits-set in the DMA address. | |
91 | */ | |
8d8bb39b | 92 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
1da177e4 | 93 | { |
553ac788 | 94 | return dma_addr == DMA_ERROR_CODE; |
1da177e4 LT |
95 | } |
96 | ||
f454aa6b RK |
97 | /* |
98 | * Dummy noncoherent implementation. We don't provide a dma_cache_sync | |
99 | * function so drivers using this API are highlighted with build warnings. | |
100 | */ | |
3216a97b RK |
101 | static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, |
102 | dma_addr_t *handle, gfp_t gfp) | |
f454aa6b RK |
103 | { |
104 | return NULL; | |
105 | } | |
106 | ||
3216a97b RK |
107 | static inline void dma_free_noncoherent(struct device *dev, size_t size, |
108 | void *cpu_addr, dma_addr_t handle) | |
f454aa6b RK |
109 | { |
110 | } | |
111 | ||
15237e1f MS |
112 | extern int dma_supported(struct device *dev, u64 mask); |
113 | ||
1da177e4 | 114 | /** |
f99d6034 | 115 | * arm_dma_alloc - allocate consistent memory for DMA |
1da177e4 LT |
116 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
117 | * @size: required memory size | |
118 | * @handle: bus-specific DMA address | |
f99d6034 | 119 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 | 120 | * |
f99d6034 MS |
121 | * Allocate some memory for a device for performing DMA. This function |
122 | * allocates pages, and will return the CPU-viewed address, and sets @handle | |
123 | * to be the device-viewed address. | |
1da177e4 | 124 | */ |
f99d6034 MS |
125 | extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, |
126 | gfp_t gfp, struct dma_attrs *attrs); | |
127 | ||
128 | #define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL) | |
129 | ||
130 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, | |
131 | dma_addr_t *dma_handle, gfp_t flag, | |
132 | struct dma_attrs *attrs) | |
133 | { | |
134 | struct dma_map_ops *ops = get_dma_ops(dev); | |
135 | void *cpu_addr; | |
136 | BUG_ON(!ops); | |
137 | ||
138 | cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); | |
139 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); | |
140 | return cpu_addr; | |
141 | } | |
1da177e4 LT |
142 | |
143 | /** | |
f99d6034 | 144 | * arm_dma_free - free memory allocated by arm_dma_alloc |
1da177e4 LT |
145 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
146 | * @size: size of memory originally requested in dma_alloc_coherent | |
147 | * @cpu_addr: CPU-view address returned from dma_alloc_coherent | |
148 | * @handle: device-view address returned from dma_alloc_coherent | |
f99d6034 | 149 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 LT |
150 | * |
151 | * Free (and unmap) a DMA buffer previously allocated by | |
f99d6034 | 152 | * arm_dma_alloc(). |
1da177e4 LT |
153 | * |
154 | * References to memory and mappings associated with cpu_addr/handle | |
155 | * during and after this call executing are illegal. | |
156 | */ | |
f99d6034 MS |
157 | extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr, |
158 | dma_addr_t handle, struct dma_attrs *attrs); | |
159 | ||
160 | #define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL) | |
161 | ||
162 | static inline void dma_free_attrs(struct device *dev, size_t size, | |
163 | void *cpu_addr, dma_addr_t dma_handle, | |
164 | struct dma_attrs *attrs) | |
165 | { | |
166 | struct dma_map_ops *ops = get_dma_ops(dev); | |
167 | BUG_ON(!ops); | |
168 | ||
169 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); | |
170 | ops->free(dev, size, cpu_addr, dma_handle, attrs); | |
171 | } | |
1da177e4 LT |
172 | |
173 | /** | |
f99d6034 | 174 | * arm_dma_mmap - map a coherent DMA allocation into user space |
1da177e4 LT |
175 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
176 | * @vma: vm_area_struct describing requested user mapping | |
177 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent | |
178 | * @handle: device-view address returned from dma_alloc_coherent | |
179 | * @size: size of memory originally requested in dma_alloc_coherent | |
f99d6034 | 180 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 LT |
181 | * |
182 | * Map a coherent DMA buffer previously allocated by dma_alloc_coherent | |
183 | * into user space. The coherent DMA buffer must not be freed by the | |
184 | * driver until the user space mapping has been released. | |
185 | */ | |
f99d6034 MS |
186 | extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, |
187 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
188 | struct dma_attrs *attrs); | |
1da177e4 | 189 | |
f99d6034 MS |
190 | static inline void *dma_alloc_writecombine(struct device *dev, size_t size, |
191 | dma_addr_t *dma_handle, gfp_t flag) | |
192 | { | |
193 | DEFINE_DMA_ATTRS(attrs); | |
194 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); | |
195 | return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs); | |
196 | } | |
1da177e4 | 197 | |
f99d6034 MS |
198 | static inline void dma_free_writecombine(struct device *dev, size_t size, |
199 | void *cpu_addr, dma_addr_t dma_handle) | |
200 | { | |
201 | DEFINE_DMA_ATTRS(attrs); | |
202 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); | |
203 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); | |
204 | } | |
205 | ||
6e5267aa MS |
206 | /* |
207 | * This can be called during early boot to increase the size of the atomic | |
208 | * coherent DMA pool above the default value of 256KiB. It must be called | |
209 | * before postcore_initcall. | |
210 | */ | |
211 | extern void __init init_dma_coherent_pool_size(unsigned long size); | |
212 | ||
99d1717d JM |
213 | /* |
214 | * This can be called during boot to increase the size of the consistent | |
215 | * DMA region above it's default value of 2MB. It must be called before the | |
216 | * memory allocator is initialised, i.e. before any core_initcall. | |
217 | */ | |
e9da6e99 | 218 | static inline void init_consistent_dma_size(unsigned long size) { } |
99d1717d | 219 | |
8c8a0ec5 RK |
220 | /* |
221 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" | |
222 | * and utilize bounce buffers as needed to work around limited DMA windows. | |
223 | * | |
224 | * On the SA-1111, a bug limits DMA to only certain regions of RAM. | |
225 | * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) | |
226 | * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) | |
227 | * | |
228 | * The following are helper functions used by the dmabounce subystem | |
229 | * | |
230 | */ | |
231 | ||
232 | /** | |
233 | * dmabounce_register_dev | |
234 | * | |
235 | * @dev: valid struct device pointer | |
236 | * @small_buf_size: size of buffers to use with small buffer pool | |
237 | * @large_buf_size: size of buffers to use with large buffer pool (can be 0) | |
0703ed2a | 238 | * @needs_bounce_fn: called to determine whether buffer needs bouncing |
8c8a0ec5 RK |
239 | * |
240 | * This function should be called by low-level platform code to register | |
241 | * a device as requireing DMA buffer bouncing. The function will allocate | |
242 | * appropriate DMA pools for the device. | |
8c8a0ec5 | 243 | */ |
3216a97b | 244 | extern int dmabounce_register_dev(struct device *, unsigned long, |
0703ed2a | 245 | unsigned long, int (*)(struct device *, dma_addr_t, size_t)); |
8c8a0ec5 RK |
246 | |
247 | /** | |
248 | * dmabounce_unregister_dev | |
249 | * | |
250 | * @dev: valid struct device pointer | |
251 | * | |
252 | * This function should be called by low-level platform code when device | |
253 | * that was previously registered with dmabounce_register_dev is removed | |
254 | * from the system. | |
255 | * | |
256 | */ | |
257 | extern void dmabounce_unregister_dev(struct device *); | |
258 | ||
8c8a0ec5 | 259 | |
24056f52 | 260 | |
afd1a321 RK |
261 | /* |
262 | * The scatter list versions of the above methods. | |
1da177e4 | 263 | */ |
2dc6a016 MS |
264 | extern int arm_dma_map_sg(struct device *, struct scatterlist *, int, |
265 | enum dma_data_direction, struct dma_attrs *attrs); | |
266 | extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int, | |
267 | enum dma_data_direction, struct dma_attrs *attrs); | |
268 | extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int, | |
3216a97b | 269 | enum dma_data_direction); |
2dc6a016 | 270 | extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int, |
3216a97b | 271 | enum dma_data_direction); |
dc2832e1 MS |
272 | extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, |
273 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
274 | struct dma_attrs *attrs); | |
1da177e4 | 275 | |
1da177e4 LT |
276 | #endif /* __KERNEL__ */ |
277 | #endif |