projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 9f97da78 DH |
2 | #ifndef __ASM_BARRIER_H |
| 3 | #define __ASM_BARRIER_H | |
| 4 | ||
| 5 | #ifndef __ASSEMBLY__ | |
| 6 | ||
| 7 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); | |
| 8 | ||
| 9 | #if __LINUX_ARM_ARCH__ >= 7 || \ | |
| 10 | (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K)) | |
| 11 | #define sev() __asm__ __volatile__ ("sev" : : : "memory") | |
| 12 | #define wfe() __asm__ __volatile__ ("wfe" : : : "memory") | |
| 13 | #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") | |
| 14 | #endif | |
| 15 | ||
| 16 | #if __LINUX_ARM_ARCH__ >= 7 | |
| 3ea12806 WD |
17 | #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") |
| 18 | #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") | |
| 19 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") | |
| 9f97da78 | 20 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 |
| 3ea12806 | 21 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 9f97da78 | 22 | : : "r" (0) : "memory") |
| 3ea12806 | 23 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 9f97da78 | 24 | : : "r" (0) : "memory") |
| 3ea12806 | 25 | #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ |
| 9f97da78 DH |
26 | : : "r" (0) : "memory") |
| 27 | #elif defined(CONFIG_CPU_FA526) | |
| 3ea12806 | 28 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 9f97da78 | 29 | : : "r" (0) : "memory") |
| 3ea12806 | 30 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 9f97da78 | 31 | : : "r" (0) : "memory") |
| 3ea12806 | 32 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
| 9f97da78 | 33 | #else |
| 3ea12806 WD |
34 | #define isb(x) __asm__ __volatile__ ("" : : : "memory") |
| 35 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ | |
| 9f97da78 | 36 | : : "r" (0) : "memory") |
| 3ea12806 | 37 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
| 9f97da78 DH |
38 | #endif |
| 39 | ||
| f8130906 | 40 | #ifdef CONFIG_ARM_HEAVY_MB |
| 4e1f8a6f | 41 | extern void (*soc_mb)(void); |
| f8130906 RK |
42 | extern void arm_heavy_mb(void); |
| 43 | #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0) | |
| 44 | #else | |
| 45 | #define __arm_heavy_mb(x...) dsb(x) | |
| 46 | #endif | |
| 47 | ||
| 520319de | 48 | #if defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) |
| f8130906 | 49 | #define mb() __arm_heavy_mb() |
| 9f97da78 | 50 | #define rmb() dsb() |
| f8130906 | 51 | #define wmb() __arm_heavy_mb(st) |
| 1077fa36 AD |
52 | #define dma_rmb() dmb(osh) |
| 53 | #define dma_wmb() dmb(oshst) | |
| 9f97da78 | 54 | #else |
| 48aa820f RH |
55 | #define mb() barrier() |
| 56 | #define rmb() barrier() | |
| 57 | #define wmb() barrier() | |
| 1077fa36 AD |
58 | #define dma_rmb() barrier() |
| 59 | #define dma_wmb() barrier() | |
| 9f97da78 DH |
60 | #endif |
| 61 | ||
| 2b1f3de1 MT |
62 | #define __smp_mb() dmb(ish) |
| 63 | #define __smp_rmb() __smp_mb() | |
| 64 | #define __smp_wmb() dmb(ishst) | |
| 9f97da78 | 65 | |
| 335390d6 | 66 | #include <asm-generic/barrier.h> |
| 030d0178 | 67 | |
| 9f97da78 DH |
68 | #endif /* !__ASSEMBLY__ */ |
| 69 | #endif /* __ASM_BARRIER_H */ |