Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f30c2269 | 2 | * linux/arch/arm/common/sa1111.c |
1da177e4 LT |
3 | * |
4 | * SA1111 support | |
5 | * | |
6 | * Original code by John Dorsey | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This file contains all generic SA1111 support. | |
13 | * | |
14 | * All initialization functions provided here are intended to be called | |
15 | * from machine specific code with proper arguments when required. | |
16 | */ | |
1da177e4 LT |
17 | #include <linux/module.h> |
18 | #include <linux/init.h> | |
36d31213 | 19 | #include <linux/irq.h> |
1da177e4 LT |
20 | #include <linux/kernel.h> |
21 | #include <linux/delay.h> | |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/ioport.h> | |
d052d1be | 24 | #include <linux/platform_device.h> |
1da177e4 LT |
25 | #include <linux/slab.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/dma-mapping.h> | |
97d654f8 | 28 | #include <linux/clk.h> |
fced80c7 | 29 | #include <linux/io.h> |
1da177e4 | 30 | |
a09e64fb | 31 | #include <mach/hardware.h> |
1da177e4 | 32 | #include <asm/mach/irq.h> |
36d31213 | 33 | #include <asm/mach-types.h> |
45e109d0 | 34 | #include <asm/sizes.h> |
1da177e4 LT |
35 | |
36 | #include <asm/hardware/sa1111.h> | |
37 | ||
19851c58 EM |
38 | /* SA1111 IRQs */ |
39 | #define IRQ_GPAIN0 (0) | |
40 | #define IRQ_GPAIN1 (1) | |
41 | #define IRQ_GPAIN2 (2) | |
42 | #define IRQ_GPAIN3 (3) | |
43 | #define IRQ_GPBIN0 (4) | |
44 | #define IRQ_GPBIN1 (5) | |
45 | #define IRQ_GPBIN2 (6) | |
46 | #define IRQ_GPBIN3 (7) | |
47 | #define IRQ_GPBIN4 (8) | |
48 | #define IRQ_GPBIN5 (9) | |
49 | #define IRQ_GPCIN0 (10) | |
50 | #define IRQ_GPCIN1 (11) | |
51 | #define IRQ_GPCIN2 (12) | |
52 | #define IRQ_GPCIN3 (13) | |
53 | #define IRQ_GPCIN4 (14) | |
54 | #define IRQ_GPCIN5 (15) | |
55 | #define IRQ_GPCIN6 (16) | |
56 | #define IRQ_GPCIN7 (17) | |
57 | #define IRQ_MSTXINT (18) | |
58 | #define IRQ_MSRXINT (19) | |
59 | #define IRQ_MSSTOPERRINT (20) | |
60 | #define IRQ_TPTXINT (21) | |
61 | #define IRQ_TPRXINT (22) | |
62 | #define IRQ_TPSTOPERRINT (23) | |
63 | #define SSPXMTINT (24) | |
64 | #define SSPRCVINT (25) | |
65 | #define SSPROR (26) | |
66 | #define AUDXMTDMADONEA (32) | |
67 | #define AUDRCVDMADONEA (33) | |
68 | #define AUDXMTDMADONEB (34) | |
69 | #define AUDRCVDMADONEB (35) | |
70 | #define AUDTFSR (36) | |
71 | #define AUDRFSR (37) | |
72 | #define AUDTUR (38) | |
73 | #define AUDROR (39) | |
74 | #define AUDDTS (40) | |
75 | #define AUDRDD (41) | |
76 | #define AUDSTO (42) | |
77 | #define IRQ_USBPWR (43) | |
78 | #define IRQ_HCIM (44) | |
79 | #define IRQ_HCIBUFFACC (45) | |
80 | #define IRQ_HCIRMTWKP (46) | |
81 | #define IRQ_NHCIMFCIR (47) | |
82 | #define IRQ_USB_PORT_RESUME (48) | |
83 | #define IRQ_S0_READY_NINT (49) | |
84 | #define IRQ_S1_READY_NINT (50) | |
85 | #define IRQ_S0_CD_VALID (51) | |
86 | #define IRQ_S1_CD_VALID (52) | |
87 | #define IRQ_S0_BVD1_STSCHG (53) | |
88 | #define IRQ_S1_BVD1_STSCHG (54) | |
36d31213 | 89 | #define SA1111_IRQ_NR (55) |
19851c58 | 90 | |
29c140b6 RK |
91 | extern void sa1110_mb_enable(void); |
92 | extern void sa1110_mb_disable(void); | |
1da177e4 LT |
93 | |
94 | /* | |
95 | * We keep the following data for the overall SA1111. Note that the | |
96 | * struct device and struct resource are "fake"; they should be supplied | |
97 | * by the bus above us. However, in the interests of getting all SA1111 | |
98 | * drivers converted over to the device model, we provide this as an | |
99 | * anchor point for all the other drivers. | |
100 | */ | |
101 | struct sa1111 { | |
102 | struct device *dev; | |
97d654f8 | 103 | struct clk *clk; |
1da177e4 LT |
104 | unsigned long phys; |
105 | int irq; | |
19851c58 | 106 | int irq_base; /* base for cascaded on-chip IRQs */ |
1da177e4 LT |
107 | spinlock_t lock; |
108 | void __iomem *base; | |
ae99ddbc | 109 | struct sa1111_platform_data *pdata; |
93160c63 RW |
110 | #ifdef CONFIG_PM |
111 | void *saved_state; | |
112 | #endif | |
1da177e4 LT |
113 | }; |
114 | ||
115 | /* | |
116 | * We _really_ need to eliminate this. Its only users | |
117 | * are the PWM and DMA checking code. | |
118 | */ | |
119 | static struct sa1111 *g_sa1111; | |
120 | ||
121 | struct sa1111_dev_info { | |
122 | unsigned long offset; | |
123 | unsigned long skpcr_mask; | |
124 | unsigned int devid; | |
125 | unsigned int irq[6]; | |
126 | }; | |
127 | ||
128 | static struct sa1111_dev_info sa1111_devices[] = { | |
129 | { | |
130 | .offset = SA1111_USB, | |
131 | .skpcr_mask = SKPCR_UCLKEN, | |
132 | .devid = SA1111_DEVID_USB, | |
133 | .irq = { | |
134 | IRQ_USBPWR, | |
135 | IRQ_HCIM, | |
136 | IRQ_HCIBUFFACC, | |
137 | IRQ_HCIRMTWKP, | |
138 | IRQ_NHCIMFCIR, | |
139 | IRQ_USB_PORT_RESUME | |
140 | }, | |
141 | }, | |
142 | { | |
143 | .offset = 0x0600, | |
144 | .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, | |
145 | .devid = SA1111_DEVID_SAC, | |
146 | .irq = { | |
147 | AUDXMTDMADONEA, | |
148 | AUDXMTDMADONEB, | |
149 | AUDRCVDMADONEA, | |
150 | AUDRCVDMADONEB | |
151 | }, | |
152 | }, | |
153 | { | |
154 | .offset = 0x0800, | |
155 | .skpcr_mask = SKPCR_SCLKEN, | |
156 | .devid = SA1111_DEVID_SSP, | |
157 | }, | |
158 | { | |
159 | .offset = SA1111_KBD, | |
160 | .skpcr_mask = SKPCR_PTCLKEN, | |
e5c0fc41 | 161 | .devid = SA1111_DEVID_PS2_KBD, |
1da177e4 LT |
162 | .irq = { |
163 | IRQ_TPRXINT, | |
164 | IRQ_TPTXINT | |
165 | }, | |
166 | }, | |
167 | { | |
168 | .offset = SA1111_MSE, | |
169 | .skpcr_mask = SKPCR_PMCLKEN, | |
e5c0fc41 | 170 | .devid = SA1111_DEVID_PS2_MSE, |
1da177e4 LT |
171 | .irq = { |
172 | IRQ_MSRXINT, | |
173 | IRQ_MSTXINT | |
174 | }, | |
175 | }, | |
176 | { | |
177 | .offset = 0x1800, | |
178 | .skpcr_mask = 0, | |
179 | .devid = SA1111_DEVID_PCMCIA, | |
180 | .irq = { | |
181 | IRQ_S0_READY_NINT, | |
182 | IRQ_S0_CD_VALID, | |
183 | IRQ_S0_BVD1_STSCHG, | |
184 | IRQ_S1_READY_NINT, | |
185 | IRQ_S1_CD_VALID, | |
186 | IRQ_S1_BVD1_STSCHG, | |
187 | }, | |
188 | }, | |
189 | }; | |
190 | ||
191 | /* | |
192 | * SA1111 interrupt support. Since clearing an IRQ while there are | |
193 | * active IRQs causes the interrupt output to pulse, the upper levels | |
194 | * will call us again if there are more interrupts to process. | |
195 | */ | |
196 | static void | |
10dd5ce2 | 197 | sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
198 | { |
199 | unsigned int stat0, stat1, i; | |
6845664a | 200 | struct sa1111 *sachip = irq_get_handler_data(irq); |
19851c58 | 201 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
1da177e4 | 202 | |
19851c58 EM |
203 | stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); |
204 | stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); | |
1da177e4 | 205 | |
19851c58 | 206 | sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); |
1da177e4 | 207 | |
8231e741 | 208 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
1da177e4 | 209 | |
19851c58 | 210 | sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); |
1da177e4 LT |
211 | |
212 | if (stat0 == 0 && stat1 == 0) { | |
0cd61b68 | 213 | do_bad_IRQ(irq, desc); |
1da177e4 LT |
214 | return; |
215 | } | |
216 | ||
19851c58 | 217 | for (i = 0; stat0; i++, stat0 >>= 1) |
1da177e4 | 218 | if (stat0 & 1) |
19851c58 | 219 | generic_handle_irq(i + sachip->irq_base); |
1da177e4 | 220 | |
19851c58 | 221 | for (i = 32; stat1; i++, stat1 >>= 1) |
1da177e4 | 222 | if (stat1 & 1) |
19851c58 | 223 | generic_handle_irq(i + sachip->irq_base); |
1da177e4 LT |
224 | |
225 | /* For level-based interrupts */ | |
8231e741 | 226 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
1da177e4 LT |
227 | } |
228 | ||
19851c58 EM |
229 | #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) |
230 | #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) | |
1da177e4 | 231 | |
8231e741 | 232 | static void sa1111_ack_irq(struct irq_data *d) |
1da177e4 LT |
233 | { |
234 | } | |
235 | ||
8231e741 | 236 | static void sa1111_mask_lowirq(struct irq_data *d) |
1da177e4 | 237 | { |
8231e741 | 238 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 239 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
1da177e4 LT |
240 | unsigned long ie0; |
241 | ||
242 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
8231e741 | 243 | ie0 &= ~SA1111_IRQMASK_LO(d->irq); |
1da177e4 LT |
244 | writel(ie0, mapbase + SA1111_INTEN0); |
245 | } | |
246 | ||
8231e741 | 247 | static void sa1111_unmask_lowirq(struct irq_data *d) |
1da177e4 | 248 | { |
8231e741 | 249 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 250 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
1da177e4 LT |
251 | unsigned long ie0; |
252 | ||
253 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
8231e741 | 254 | ie0 |= SA1111_IRQMASK_LO(d->irq); |
1da177e4 LT |
255 | sa1111_writel(ie0, mapbase + SA1111_INTEN0); |
256 | } | |
257 | ||
258 | /* | |
259 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
260 | * (INTSET) which claims to do this. However, in practice no amount of | |
261 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
262 | * be triggered. In fact, its very difficult, if not impossible to get | |
263 | * INTSET to re-trigger the interrupt. | |
264 | */ | |
8231e741 | 265 | static int sa1111_retrigger_lowirq(struct irq_data *d) |
1da177e4 | 266 | { |
8231e741 | 267 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 268 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 269 | unsigned int mask = SA1111_IRQMASK_LO(d->irq); |
1da177e4 LT |
270 | unsigned long ip0; |
271 | int i; | |
272 | ||
273 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
274 | for (i = 0; i < 8; i++) { | |
275 | sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); | |
276 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
cae39988 | 277 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask) |
1da177e4 LT |
278 | break; |
279 | } | |
280 | ||
281 | if (i == 8) | |
282 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
8231e741 | 283 | "re-trigger IRQ%d\n", d->irq); |
1da177e4 LT |
284 | return i == 8 ? -1 : 0; |
285 | } | |
286 | ||
8231e741 | 287 | static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags) |
1da177e4 | 288 | { |
8231e741 | 289 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 290 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 291 | unsigned int mask = SA1111_IRQMASK_LO(d->irq); |
1da177e4 LT |
292 | unsigned long ip0; |
293 | ||
6cab4860 | 294 | if (flags == IRQ_TYPE_PROBE) |
1da177e4 LT |
295 | return 0; |
296 | ||
6cab4860 | 297 | if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) |
1da177e4 LT |
298 | return -EINVAL; |
299 | ||
300 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
6cab4860 | 301 | if (flags & IRQ_TYPE_EDGE_RISING) |
1da177e4 LT |
302 | ip0 &= ~mask; |
303 | else | |
304 | ip0 |= mask; | |
305 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
306 | sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
8231e741 | 311 | static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on) |
1da177e4 | 312 | { |
8231e741 | 313 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 314 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 315 | unsigned int mask = SA1111_IRQMASK_LO(d->irq); |
1da177e4 LT |
316 | unsigned long we0; |
317 | ||
318 | we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); | |
319 | if (on) | |
320 | we0 |= mask; | |
321 | else | |
322 | we0 &= ~mask; | |
323 | sa1111_writel(we0, mapbase + SA1111_WAKEEN0); | |
324 | ||
325 | return 0; | |
326 | } | |
327 | ||
38c677cb DB |
328 | static struct irq_chip sa1111_low_chip = { |
329 | .name = "SA1111-l", | |
8231e741 LB |
330 | .irq_ack = sa1111_ack_irq, |
331 | .irq_mask = sa1111_mask_lowirq, | |
332 | .irq_unmask = sa1111_unmask_lowirq, | |
333 | .irq_retrigger = sa1111_retrigger_lowirq, | |
334 | .irq_set_type = sa1111_type_lowirq, | |
335 | .irq_set_wake = sa1111_wake_lowirq, | |
1da177e4 LT |
336 | }; |
337 | ||
8231e741 | 338 | static void sa1111_mask_highirq(struct irq_data *d) |
1da177e4 | 339 | { |
8231e741 | 340 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 341 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
1da177e4 LT |
342 | unsigned long ie1; |
343 | ||
344 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
8231e741 | 345 | ie1 &= ~SA1111_IRQMASK_HI(d->irq); |
1da177e4 LT |
346 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); |
347 | } | |
348 | ||
8231e741 | 349 | static void sa1111_unmask_highirq(struct irq_data *d) |
1da177e4 | 350 | { |
8231e741 | 351 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 352 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
1da177e4 LT |
353 | unsigned long ie1; |
354 | ||
355 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
8231e741 | 356 | ie1 |= SA1111_IRQMASK_HI(d->irq); |
1da177e4 LT |
357 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); |
358 | } | |
359 | ||
360 | /* | |
361 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
362 | * (INTSET) which claims to do this. However, in practice no amount of | |
363 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
364 | * be triggered. In fact, its very difficult, if not impossible to get | |
365 | * INTSET to re-trigger the interrupt. | |
366 | */ | |
8231e741 | 367 | static int sa1111_retrigger_highirq(struct irq_data *d) |
1da177e4 | 368 | { |
8231e741 | 369 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 370 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 371 | unsigned int mask = SA1111_IRQMASK_HI(d->irq); |
1da177e4 LT |
372 | unsigned long ip1; |
373 | int i; | |
374 | ||
375 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
376 | for (i = 0; i < 8; i++) { | |
377 | sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); | |
378 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
379 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) | |
380 | break; | |
381 | } | |
382 | ||
383 | if (i == 8) | |
384 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
8231e741 | 385 | "re-trigger IRQ%d\n", d->irq); |
1da177e4 LT |
386 | return i == 8 ? -1 : 0; |
387 | } | |
388 | ||
8231e741 | 389 | static int sa1111_type_highirq(struct irq_data *d, unsigned int flags) |
1da177e4 | 390 | { |
8231e741 | 391 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 392 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 393 | unsigned int mask = SA1111_IRQMASK_HI(d->irq); |
1da177e4 LT |
394 | unsigned long ip1; |
395 | ||
6cab4860 | 396 | if (flags == IRQ_TYPE_PROBE) |
1da177e4 LT |
397 | return 0; |
398 | ||
6cab4860 | 399 | if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) |
1da177e4 LT |
400 | return -EINVAL; |
401 | ||
402 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
6cab4860 | 403 | if (flags & IRQ_TYPE_EDGE_RISING) |
1da177e4 LT |
404 | ip1 &= ~mask; |
405 | else | |
406 | ip1 |= mask; | |
407 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
408 | sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); | |
409 | ||
410 | return 0; | |
411 | } | |
412 | ||
8231e741 | 413 | static int sa1111_wake_highirq(struct irq_data *d, unsigned int on) |
1da177e4 | 414 | { |
8231e741 | 415 | struct sa1111 *sachip = irq_data_get_irq_chip_data(d); |
19851c58 | 416 | void __iomem *mapbase = sachip->base + SA1111_INTC; |
8231e741 | 417 | unsigned int mask = SA1111_IRQMASK_HI(d->irq); |
1da177e4 LT |
418 | unsigned long we1; |
419 | ||
420 | we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); | |
421 | if (on) | |
422 | we1 |= mask; | |
423 | else | |
424 | we1 &= ~mask; | |
425 | sa1111_writel(we1, mapbase + SA1111_WAKEEN1); | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
38c677cb DB |
430 | static struct irq_chip sa1111_high_chip = { |
431 | .name = "SA1111-h", | |
8231e741 LB |
432 | .irq_ack = sa1111_ack_irq, |
433 | .irq_mask = sa1111_mask_highirq, | |
434 | .irq_unmask = sa1111_unmask_highirq, | |
435 | .irq_retrigger = sa1111_retrigger_highirq, | |
436 | .irq_set_type = sa1111_type_highirq, | |
437 | .irq_set_wake = sa1111_wake_highirq, | |
1da177e4 LT |
438 | }; |
439 | ||
36d31213 | 440 | static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) |
1da177e4 LT |
441 | { |
442 | void __iomem *irqbase = sachip->base + SA1111_INTC; | |
f03ecaa0 | 443 | unsigned i, irq; |
36d31213 | 444 | int ret; |
1da177e4 LT |
445 | |
446 | /* | |
447 | * We're guaranteed that this region hasn't been taken. | |
448 | */ | |
449 | request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); | |
450 | ||
36d31213 RK |
451 | ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1); |
452 | if (ret <= 0) { | |
453 | dev_err(sachip->dev, "unable to allocate %u irqs: %d\n", | |
454 | SA1111_IRQ_NR, ret); | |
455 | if (ret == 0) | |
456 | ret = -EINVAL; | |
457 | return ret; | |
458 | } | |
459 | ||
460 | sachip->irq_base = ret; | |
461 | ||
1da177e4 LT |
462 | /* disable all IRQs */ |
463 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
464 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
465 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
466 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
467 | ||
468 | /* | |
469 | * detect on rising edge. Note: Feb 2001 Errata for SA1111 | |
470 | * specifies that S0ReadyInt and S1ReadyInt should be '1'. | |
471 | */ | |
472 | sa1111_writel(0, irqbase + SA1111_INTPOL0); | |
473 | sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | | |
474 | SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), | |
475 | irqbase + SA1111_INTPOL1); | |
476 | ||
477 | /* clear all IRQs */ | |
478 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); | |
479 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); | |
480 | ||
f03ecaa0 RK |
481 | for (i = IRQ_GPAIN0; i <= SSPROR; i++) { |
482 | irq = sachip->irq_base + i; | |
f38c02f3 TG |
483 | irq_set_chip_and_handler(irq, &sa1111_low_chip, |
484 | handle_edge_irq); | |
9323f261 | 485 | irq_set_chip_data(irq, sachip); |
1da177e4 LT |
486 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
487 | } | |
488 | ||
f03ecaa0 RK |
489 | for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) { |
490 | irq = sachip->irq_base + i; | |
f38c02f3 TG |
491 | irq_set_chip_and_handler(irq, &sa1111_high_chip, |
492 | handle_edge_irq); | |
9323f261 | 493 | irq_set_chip_data(irq, sachip); |
1da177e4 LT |
494 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
495 | } | |
496 | ||
497 | /* | |
498 | * Register SA1111 interrupt | |
499 | */ | |
6845664a TG |
500 | irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); |
501 | irq_set_handler_data(sachip->irq, sachip); | |
502 | irq_set_chained_handler(sachip->irq, sa1111_irq_handler); | |
36d31213 RK |
503 | |
504 | dev_info(sachip->dev, "Providing IRQ%u-%u\n", | |
505 | sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1); | |
506 | ||
507 | return 0; | |
1da177e4 LT |
508 | } |
509 | ||
510 | /* | |
511 | * Bring the SA1111 out of reset. This requires a set procedure: | |
512 | * 1. nRESET asserted (by hardware) | |
513 | * 2. CLK turned on from SA1110 | |
514 | * 3. nRESET deasserted | |
515 | * 4. VCO turned on, PLL_BYPASS turned off | |
516 | * 5. Wait lock time, then assert RCLKEn | |
517 | * 7. PCR set to allow clocking of individual functions | |
518 | * | |
519 | * Until we've done this, the only registers we can access are: | |
520 | * SBI_SKCR | |
521 | * SBI_SMCR | |
522 | * SBI_SKID | |
523 | */ | |
524 | static void sa1111_wake(struct sa1111 *sachip) | |
525 | { | |
526 | unsigned long flags, r; | |
527 | ||
528 | spin_lock_irqsave(&sachip->lock, flags); | |
529 | ||
97d654f8 | 530 | clk_enable(sachip->clk); |
1da177e4 LT |
531 | |
532 | /* | |
533 | * Turn VCO on, and disable PLL Bypass. | |
534 | */ | |
535 | r = sa1111_readl(sachip->base + SA1111_SKCR); | |
536 | r &= ~SKCR_VCO_OFF; | |
537 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
538 | r |= SKCR_PLL_BYPASS | SKCR_OE_EN; | |
539 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
540 | ||
541 | /* | |
542 | * Wait lock time. SA1111 manual _doesn't_ | |
543 | * specify a figure for this! We choose 100us. | |
544 | */ | |
545 | udelay(100); | |
546 | ||
547 | /* | |
548 | * Enable RCLK. We also ensure that RDYEN is set. | |
549 | */ | |
550 | r |= SKCR_RCLKEN | SKCR_RDYEN; | |
551 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
552 | ||
553 | /* | |
554 | * Wait 14 RCLK cycles for the chip to finish coming out | |
555 | * of reset. (RCLK=24MHz). This is 590ns. | |
556 | */ | |
557 | udelay(1); | |
558 | ||
559 | /* | |
560 | * Ensure all clocks are initially off. | |
561 | */ | |
562 | sa1111_writel(0, sachip->base + SA1111_SKPCR); | |
563 | ||
564 | spin_unlock_irqrestore(&sachip->lock, flags); | |
565 | } | |
566 | ||
567 | #ifdef CONFIG_ARCH_SA1100 | |
568 | ||
569 | static u32 sa1111_dma_mask[] = { | |
570 | ~0, | |
571 | ~(1 << 20), | |
572 | ~(1 << 23), | |
573 | ~(1 << 24), | |
574 | ~(1 << 25), | |
575 | ~(1 << 20), | |
576 | ~(1 << 20), | |
577 | 0, | |
578 | }; | |
579 | ||
580 | /* | |
581 | * Configure the SA1111 shared memory controller. | |
582 | */ | |
583 | void | |
584 | sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, | |
585 | unsigned int cas_latency) | |
586 | { | |
587 | unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); | |
588 | ||
589 | if (cas_latency == 3) | |
590 | smcr |= SMCR_CLAT; | |
591 | ||
592 | sa1111_writel(smcr, sachip->base + SA1111_SMCR); | |
593 | ||
594 | /* | |
595 | * Now clear the bits in the DMA mask to work around the SA1111 | |
596 | * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion | |
597 | * Chip Specification Update, June 2000, Erratum #7). | |
598 | */ | |
599 | if (sachip->dev->dma_mask) | |
600 | *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; | |
601 | ||
602 | sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; | |
603 | } | |
0703ed2a | 604 | #endif |
1da177e4 | 605 | |
1da177e4 LT |
606 | static void sa1111_dev_release(struct device *_dev) |
607 | { | |
608 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
609 | ||
610 | release_resource(&dev->res); | |
611 | kfree(dev); | |
612 | } | |
613 | ||
614 | static int | |
615 | sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |
616 | struct sa1111_dev_info *info) | |
617 | { | |
618 | struct sa1111_dev *dev; | |
f03ecaa0 | 619 | unsigned i; |
1da177e4 LT |
620 | int ret; |
621 | ||
d2a02b93 | 622 | dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); |
1da177e4 LT |
623 | if (!dev) { |
624 | ret = -ENOMEM; | |
625 | goto out; | |
626 | } | |
1da177e4 | 627 | |
3f978704 | 628 | dev_set_name(&dev->dev, "%4.4lx", info->offset); |
1da177e4 LT |
629 | dev->devid = info->devid; |
630 | dev->dev.parent = sachip->dev; | |
631 | dev->dev.bus = &sa1111_bus_type; | |
632 | dev->dev.release = sa1111_dev_release; | |
1da177e4 LT |
633 | dev->res.start = sachip->phys + info->offset; |
634 | dev->res.end = dev->res.start + 511; | |
3f978704 | 635 | dev->res.name = dev_name(&dev->dev); |
1da177e4 LT |
636 | dev->res.flags = IORESOURCE_MEM; |
637 | dev->mapbase = sachip->base + info->offset; | |
638 | dev->skpcr_mask = info->skpcr_mask; | |
f03ecaa0 RK |
639 | |
640 | for (i = 0; i < ARRAY_SIZE(info->irq); i++) | |
641 | dev->irq[i] = sachip->irq_base + info->irq[i]; | |
1da177e4 | 642 | |
09a2ba2f RK |
643 | /* |
644 | * If the parent device has a DMA mask associated with it, | |
645 | * propagate it down to the children. | |
646 | */ | |
647 | if (sachip->dev->dma_mask) { | |
648 | dev->dma_mask = *sachip->dev->dma_mask; | |
649 | dev->dev.dma_mask = &dev->dma_mask; | |
650 | dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; | |
651 | } | |
652 | ||
1da177e4 LT |
653 | ret = request_resource(parent, &dev->res); |
654 | if (ret) { | |
655 | printk("SA1111: failed to allocate resource for %s\n", | |
656 | dev->res.name); | |
3f978704 | 657 | dev_set_name(&dev->dev, NULL); |
1da177e4 LT |
658 | kfree(dev); |
659 | goto out; | |
660 | } | |
661 | ||
1da177e4 LT |
662 | ret = device_register(&dev->dev); |
663 | if (ret) { | |
664 | release_resource(&dev->res); | |
665 | kfree(dev); | |
1da177e4 LT |
666 | } |
667 | ||
1da177e4 LT |
668 | return ret; |
669 | } | |
670 | ||
671 | /** | |
672 | * sa1111_probe - probe for a single SA1111 chip. | |
673 | * @phys_addr: physical address of device. | |
674 | * | |
675 | * Probe for a SA1111 chip. This must be called | |
676 | * before any other SA1111-specific code. | |
677 | * | |
678 | * Returns: | |
679 | * %-ENODEV device not found. | |
680 | * %-EBUSY physical address already marked in-use. | |
f03ecaa0 | 681 | * %-EINVAL no platform data passed |
1da177e4 LT |
682 | * %0 successful. |
683 | */ | |
055d1965 | 684 | static int __devinit |
1da177e4 LT |
685 | __sa1111_probe(struct device *me, struct resource *mem, int irq) |
686 | { | |
f03ecaa0 | 687 | struct sa1111_platform_data *pd = me->platform_data; |
1da177e4 LT |
688 | struct sa1111 *sachip; |
689 | unsigned long id; | |
416112f8 | 690 | unsigned int has_devs; |
1da177e4 LT |
691 | int i, ret = -ENODEV; |
692 | ||
f03ecaa0 RK |
693 | if (!pd) |
694 | return -EINVAL; | |
695 | ||
d2a02b93 | 696 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
1da177e4 LT |
697 | if (!sachip) |
698 | return -ENOMEM; | |
699 | ||
13f75582 | 700 | sachip->clk = clk_get(me, "SA1111_CLK"); |
442a9022 | 701 | if (IS_ERR(sachip->clk)) { |
97d654f8 RK |
702 | ret = PTR_ERR(sachip->clk); |
703 | goto err_free; | |
704 | } | |
705 | ||
72ae00c9 RK |
706 | ret = clk_prepare(sachip->clk); |
707 | if (ret) | |
708 | goto err_clkput; | |
709 | ||
1da177e4 LT |
710 | spin_lock_init(&sachip->lock); |
711 | ||
712 | sachip->dev = me; | |
713 | dev_set_drvdata(sachip->dev, sachip); | |
714 | ||
ae99ddbc | 715 | sachip->pdata = pd; |
1da177e4 LT |
716 | sachip->phys = mem->start; |
717 | sachip->irq = irq; | |
718 | ||
719 | /* | |
720 | * Map the whole region. This also maps the | |
721 | * registers for our children. | |
722 | */ | |
723 | sachip->base = ioremap(mem->start, PAGE_SIZE * 2); | |
724 | if (!sachip->base) { | |
725 | ret = -ENOMEM; | |
72ae00c9 | 726 | goto err_clk_unprep; |
1da177e4 LT |
727 | } |
728 | ||
729 | /* | |
730 | * Probe for the chip. Only touch the SBI registers. | |
731 | */ | |
732 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
733 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
734 | printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); | |
735 | ret = -ENODEV; | |
97d654f8 | 736 | goto err_unmap; |
1da177e4 LT |
737 | } |
738 | ||
739 | printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " | |
740 | "silicon revision %lx, metal revision %lx\n", | |
741 | (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); | |
742 | ||
743 | /* | |
744 | * We found it. Wake the chip up, and initialise. | |
745 | */ | |
746 | sa1111_wake(sachip); | |
747 | ||
36d31213 RK |
748 | /* |
749 | * The interrupt controller must be initialised before any | |
750 | * other device to ensure that the interrupts are available. | |
751 | */ | |
752 | if (sachip->irq != NO_IRQ) { | |
753 | ret = sa1111_setup_irq(sachip, pd->irq_base); | |
754 | if (ret) | |
755 | goto err_unmap; | |
756 | } | |
757 | ||
1da177e4 | 758 | #ifdef CONFIG_ARCH_SA1100 |
416112f8 DB |
759 | { |
760 | unsigned int val; | |
761 | ||
1da177e4 LT |
762 | /* |
763 | * The SDRAM configuration of the SA1110 and the SA1111 must | |
764 | * match. This is very important to ensure that SA1111 accesses | |
765 | * don't corrupt the SDRAM. Note that this ungates the SA1111's | |
766 | * MBGNT signal, so we must have called sa1110_mb_disable() | |
767 | * beforehand. | |
768 | */ | |
769 | sa1111_configure_smc(sachip, 1, | |
770 | FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), | |
771 | FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); | |
772 | ||
773 | /* | |
774 | * We only need to turn on DCLK whenever we want to use the | |
775 | * DMA. It can otherwise be held firmly in the off position. | |
776 | * (currently, we always enable it.) | |
777 | */ | |
778 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
779 | sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); | |
780 | ||
781 | /* | |
782 | * Enable the SA1110 memory bus request and grant signals. | |
783 | */ | |
784 | sa1110_mb_enable(); | |
416112f8 | 785 | } |
1da177e4 LT |
786 | #endif |
787 | ||
1da177e4 LT |
788 | g_sa1111 = sachip; |
789 | ||
790 | has_devs = ~0; | |
07be45f5 RK |
791 | if (pd) |
792 | has_devs &= ~pd->disable_devs; | |
1da177e4 LT |
793 | |
794 | for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) | |
e5c0fc41 | 795 | if (sa1111_devices[i].devid & has_devs) |
1da177e4 LT |
796 | sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); |
797 | ||
798 | return 0; | |
799 | ||
97d654f8 | 800 | err_unmap: |
1da177e4 | 801 | iounmap(sachip->base); |
72ae00c9 RK |
802 | err_clk_unprep: |
803 | clk_unprepare(sachip->clk); | |
97d654f8 RK |
804 | err_clkput: |
805 | clk_put(sachip->clk); | |
806 | err_free: | |
1da177e4 LT |
807 | kfree(sachip); |
808 | return ret; | |
809 | } | |
810 | ||
522c37b9 RK |
811 | static int sa1111_remove_one(struct device *dev, void *data) |
812 | { | |
813 | device_unregister(dev); | |
814 | return 0; | |
815 | } | |
816 | ||
1da177e4 LT |
817 | static void __sa1111_remove(struct sa1111 *sachip) |
818 | { | |
1da177e4 LT |
819 | void __iomem *irqbase = sachip->base + SA1111_INTC; |
820 | ||
522c37b9 | 821 | device_for_each_child(sachip->dev, NULL, sa1111_remove_one); |
1da177e4 LT |
822 | |
823 | /* disable all IRQs */ | |
824 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
825 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
826 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
827 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
828 | ||
97d654f8 | 829 | clk_disable(sachip->clk); |
72ae00c9 | 830 | clk_unprepare(sachip->clk); |
97d654f8 | 831 | |
1da177e4 | 832 | if (sachip->irq != NO_IRQ) { |
6845664a TG |
833 | irq_set_chained_handler(sachip->irq, NULL); |
834 | irq_set_handler_data(sachip->irq, NULL); | |
36d31213 | 835 | irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); |
1da177e4 LT |
836 | |
837 | release_mem_region(sachip->phys + SA1111_INTC, 512); | |
838 | } | |
839 | ||
840 | iounmap(sachip->base); | |
97d654f8 | 841 | clk_put(sachip->clk); |
1da177e4 LT |
842 | kfree(sachip); |
843 | } | |
844 | ||
1da177e4 LT |
845 | struct sa1111_save_data { |
846 | unsigned int skcr; | |
847 | unsigned int skpcr; | |
848 | unsigned int skcdr; | |
849 | unsigned char skaud; | |
850 | unsigned char skpwm0; | |
851 | unsigned char skpwm1; | |
852 | ||
853 | /* | |
854 | * Interrupt controller | |
855 | */ | |
856 | unsigned int intpol0; | |
857 | unsigned int intpol1; | |
858 | unsigned int inten0; | |
859 | unsigned int inten1; | |
860 | unsigned int wakepol0; | |
861 | unsigned int wakepol1; | |
862 | unsigned int wakeen0; | |
863 | unsigned int wakeen1; | |
864 | }; | |
865 | ||
866 | #ifdef CONFIG_PM | |
867 | ||
3ae5eaec | 868 | static int sa1111_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 869 | { |
3ae5eaec | 870 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
871 | struct sa1111_save_data *save; |
872 | unsigned long flags; | |
873 | unsigned int val; | |
874 | void __iomem *base; | |
875 | ||
1da177e4 LT |
876 | save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); |
877 | if (!save) | |
878 | return -ENOMEM; | |
93160c63 | 879 | sachip->saved_state = save; |
1da177e4 LT |
880 | |
881 | spin_lock_irqsave(&sachip->lock, flags); | |
882 | ||
883 | /* | |
884 | * Save state. | |
885 | */ | |
886 | base = sachip->base; | |
887 | save->skcr = sa1111_readl(base + SA1111_SKCR); | |
888 | save->skpcr = sa1111_readl(base + SA1111_SKPCR); | |
889 | save->skcdr = sa1111_readl(base + SA1111_SKCDR); | |
890 | save->skaud = sa1111_readl(base + SA1111_SKAUD); | |
891 | save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); | |
892 | save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); | |
893 | ||
a22db0f3 RK |
894 | sa1111_writel(0, sachip->base + SA1111_SKPWM0); |
895 | sa1111_writel(0, sachip->base + SA1111_SKPWM1); | |
896 | ||
1da177e4 LT |
897 | base = sachip->base + SA1111_INTC; |
898 | save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); | |
899 | save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); | |
900 | save->inten0 = sa1111_readl(base + SA1111_INTEN0); | |
901 | save->inten1 = sa1111_readl(base + SA1111_INTEN1); | |
902 | save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); | |
903 | save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); | |
904 | save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); | |
905 | save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); | |
906 | ||
907 | /* | |
908 | * Disable. | |
909 | */ | |
910 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
911 | sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); | |
1da177e4 | 912 | |
97d654f8 RK |
913 | clk_disable(sachip->clk); |
914 | ||
1da177e4 LT |
915 | spin_unlock_irqrestore(&sachip->lock, flags); |
916 | ||
29c140b6 RK |
917 | #ifdef CONFIG_ARCH_SA1100 |
918 | sa1110_mb_disable(); | |
919 | #endif | |
920 | ||
1da177e4 LT |
921 | return 0; |
922 | } | |
923 | ||
924 | /* | |
925 | * sa1111_resume - Restore the SA1111 device state. | |
926 | * @dev: device to restore | |
1da177e4 LT |
927 | * |
928 | * Restore the general state of the SA1111; clock control and | |
929 | * interrupt controller. Other parts of the SA1111 must be | |
930 | * restored by their respective drivers, and must be called | |
931 | * via LDM after this function. | |
932 | */ | |
3ae5eaec | 933 | static int sa1111_resume(struct platform_device *dev) |
1da177e4 | 934 | { |
3ae5eaec | 935 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
936 | struct sa1111_save_data *save; |
937 | unsigned long flags, id; | |
938 | void __iomem *base; | |
939 | ||
93160c63 | 940 | save = sachip->saved_state; |
1da177e4 LT |
941 | if (!save) |
942 | return 0; | |
943 | ||
1da177e4 LT |
944 | /* |
945 | * Ensure that the SA1111 is still here. | |
946 | * FIXME: shouldn't do this here. | |
947 | */ | |
948 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
949 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
950 | __sa1111_remove(sachip); | |
3ae5eaec | 951 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
952 | kfree(save); |
953 | return 0; | |
954 | } | |
955 | ||
956 | /* | |
957 | * First of all, wake up the chip. | |
958 | */ | |
959 | sa1111_wake(sachip); | |
3defb247 | 960 | |
29c140b6 RK |
961 | #ifdef CONFIG_ARCH_SA1100 |
962 | /* Enable the memory bus request/grant signals */ | |
963 | sa1110_mb_enable(); | |
964 | #endif | |
965 | ||
3defb247 MV |
966 | /* |
967 | * Only lock for write ops. Also, sa1111_wake must be called with | |
968 | * released spinlock! | |
969 | */ | |
970 | spin_lock_irqsave(&sachip->lock, flags); | |
971 | ||
1da177e4 LT |
972 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); |
973 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); | |
974 | ||
975 | base = sachip->base; | |
976 | sa1111_writel(save->skcr, base + SA1111_SKCR); | |
977 | sa1111_writel(save->skpcr, base + SA1111_SKPCR); | |
978 | sa1111_writel(save->skcdr, base + SA1111_SKCDR); | |
979 | sa1111_writel(save->skaud, base + SA1111_SKAUD); | |
980 | sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); | |
981 | sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); | |
982 | ||
983 | base = sachip->base + SA1111_INTC; | |
984 | sa1111_writel(save->intpol0, base + SA1111_INTPOL0); | |
985 | sa1111_writel(save->intpol1, base + SA1111_INTPOL1); | |
986 | sa1111_writel(save->inten0, base + SA1111_INTEN0); | |
987 | sa1111_writel(save->inten1, base + SA1111_INTEN1); | |
988 | sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); | |
989 | sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); | |
990 | sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); | |
991 | sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); | |
992 | ||
993 | spin_unlock_irqrestore(&sachip->lock, flags); | |
994 | ||
93160c63 | 995 | sachip->saved_state = NULL; |
1da177e4 LT |
996 | kfree(save); |
997 | ||
998 | return 0; | |
999 | } | |
1000 | ||
1001 | #else | |
1002 | #define sa1111_suspend NULL | |
1003 | #define sa1111_resume NULL | |
1004 | #endif | |
1005 | ||
5d43839a | 1006 | static int __devinit sa1111_probe(struct platform_device *pdev) |
1da177e4 | 1007 | { |
1da177e4 LT |
1008 | struct resource *mem; |
1009 | int irq; | |
1010 | ||
1011 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1012 | if (!mem) | |
1013 | return -EINVAL; | |
1014 | irq = platform_get_irq(pdev, 0); | |
48944738 DV |
1015 | if (irq < 0) |
1016 | return -ENXIO; | |
1da177e4 | 1017 | |
3ae5eaec | 1018 | return __sa1111_probe(&pdev->dev, mem, irq); |
1da177e4 LT |
1019 | } |
1020 | ||
3ae5eaec | 1021 | static int sa1111_remove(struct platform_device *pdev) |
1da177e4 | 1022 | { |
3ae5eaec | 1023 | struct sa1111 *sachip = platform_get_drvdata(pdev); |
1da177e4 LT |
1024 | |
1025 | if (sachip) { | |
1da177e4 | 1026 | #ifdef CONFIG_PM |
93160c63 RW |
1027 | kfree(sachip->saved_state); |
1028 | sachip->saved_state = NULL; | |
1da177e4 | 1029 | #endif |
f2d2420b JL |
1030 | __sa1111_remove(sachip); |
1031 | platform_set_drvdata(pdev, NULL); | |
1da177e4 LT |
1032 | } |
1033 | ||
1034 | return 0; | |
1035 | } | |
1036 | ||
1037 | /* | |
1038 | * Not sure if this should be on the system bus or not yet. | |
1039 | * We really want some way to register a system device at | |
1040 | * the per-machine level, and then have this driver pick | |
1041 | * up the registered devices. | |
1042 | * | |
1043 | * We also need to handle the SDRAM configuration for | |
1044 | * PXA250/SA1110 machine classes. | |
1045 | */ | |
3ae5eaec | 1046 | static struct platform_driver sa1111_device_driver = { |
1da177e4 LT |
1047 | .probe = sa1111_probe, |
1048 | .remove = sa1111_remove, | |
1049 | .suspend = sa1111_suspend, | |
1050 | .resume = sa1111_resume, | |
3ae5eaec RK |
1051 | .driver = { |
1052 | .name = "sa1111", | |
4d5d1128 | 1053 | .owner = THIS_MODULE, |
3ae5eaec | 1054 | }, |
1da177e4 LT |
1055 | }; |
1056 | ||
1057 | /* | |
1058 | * Get the parent device driver (us) structure | |
1059 | * from a child function device | |
1060 | */ | |
1061 | static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) | |
1062 | { | |
1063 | return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); | |
1064 | } | |
1065 | ||
1066 | /* | |
1067 | * The bits in the opdiv field are non-linear. | |
1068 | */ | |
1069 | static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; | |
1070 | ||
1071 | static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) | |
1072 | { | |
1073 | unsigned int skcdr, fbdiv, ipdiv, opdiv; | |
1074 | ||
1075 | skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); | |
1076 | ||
1077 | fbdiv = (skcdr & 0x007f) + 2; | |
1078 | ipdiv = ((skcdr & 0x0f80) >> 7) + 2; | |
1079 | opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; | |
1080 | ||
1081 | return 3686400 * fbdiv / (ipdiv * opdiv); | |
1082 | } | |
1083 | ||
1084 | /** | |
1085 | * sa1111_pll_clock - return the current PLL clock frequency. | |
1086 | * @sadev: SA1111 function block | |
1087 | * | |
1088 | * BUG: we should look at SKCR. We also blindly believe that | |
1089 | * the chip is being fed with the 3.6864MHz clock. | |
1090 | * | |
1091 | * Returns the PLL clock in Hz. | |
1092 | */ | |
1093 | unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) | |
1094 | { | |
1095 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1096 | ||
1097 | return __sa1111_pll_clock(sachip); | |
1098 | } | |
0a4bc5e8 | 1099 | EXPORT_SYMBOL(sa1111_pll_clock); |
1da177e4 LT |
1100 | |
1101 | /** | |
1102 | * sa1111_select_audio_mode - select I2S or AC link mode | |
1103 | * @sadev: SA1111 function block | |
1104 | * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S | |
1105 | * | |
1106 | * Frob the SKCR to select AC Link mode or I2S mode for | |
1107 | * the audio block. | |
1108 | */ | |
1109 | void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) | |
1110 | { | |
1111 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1112 | unsigned long flags; | |
1113 | unsigned int val; | |
1114 | ||
1115 | spin_lock_irqsave(&sachip->lock, flags); | |
1116 | ||
1117 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
1118 | if (mode == SA1111_AUDIO_I2S) { | |
1119 | val &= ~SKCR_SELAC; | |
1120 | } else { | |
1121 | val |= SKCR_SELAC; | |
1122 | } | |
1123 | sa1111_writel(val, sachip->base + SA1111_SKCR); | |
1124 | ||
1125 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1126 | } | |
0a4bc5e8 | 1127 | EXPORT_SYMBOL(sa1111_select_audio_mode); |
1da177e4 LT |
1128 | |
1129 | /** | |
1130 | * sa1111_set_audio_rate - set the audio sample rate | |
1131 | * @sadev: SA1111 SAC function block | |
1132 | * @rate: sample rate to select | |
1133 | */ | |
1134 | int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) | |
1135 | { | |
1136 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1137 | unsigned int div; | |
1138 | ||
1139 | if (sadev->devid != SA1111_DEVID_SAC) | |
1140 | return -EINVAL; | |
1141 | ||
1142 | div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; | |
1143 | if (div == 0) | |
1144 | div = 1; | |
1145 | if (div > 128) | |
1146 | div = 128; | |
1147 | ||
1148 | sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); | |
1149 | ||
1150 | return 0; | |
1151 | } | |
0a4bc5e8 | 1152 | EXPORT_SYMBOL(sa1111_set_audio_rate); |
1da177e4 LT |
1153 | |
1154 | /** | |
1155 | * sa1111_get_audio_rate - get the audio sample rate | |
1156 | * @sadev: SA1111 SAC function block device | |
1157 | */ | |
1158 | int sa1111_get_audio_rate(struct sa1111_dev *sadev) | |
1159 | { | |
1160 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1161 | unsigned long div; | |
1162 | ||
1163 | if (sadev->devid != SA1111_DEVID_SAC) | |
1164 | return -EINVAL; | |
1165 | ||
1166 | div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; | |
1167 | ||
1168 | return __sa1111_pll_clock(sachip) / (256 * div); | |
1169 | } | |
0a4bc5e8 | 1170 | EXPORT_SYMBOL(sa1111_get_audio_rate); |
1da177e4 LT |
1171 | |
1172 | void sa1111_set_io_dir(struct sa1111_dev *sadev, | |
1173 | unsigned int bits, unsigned int dir, | |
1174 | unsigned int sleep_dir) | |
1175 | { | |
1176 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1177 | unsigned long flags; | |
1178 | unsigned int val; | |
1179 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1180 | ||
1181 | #define MODIFY_BITS(port, mask, dir) \ | |
1182 | if (mask) { \ | |
1183 | val = sa1111_readl(port); \ | |
1184 | val &= ~(mask); \ | |
1185 | val |= (dir) & (mask); \ | |
1186 | sa1111_writel(val, port); \ | |
1187 | } | |
1188 | ||
1189 | spin_lock_irqsave(&sachip->lock, flags); | |
1190 | MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); | |
1191 | MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); | |
1192 | MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); | |
1193 | ||
1194 | MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); | |
1195 | MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); | |
1196 | MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); | |
1197 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1198 | } | |
0a4bc5e8 | 1199 | EXPORT_SYMBOL(sa1111_set_io_dir); |
1da177e4 LT |
1200 | |
1201 | void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1202 | { | |
1203 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1204 | unsigned long flags; | |
1205 | unsigned int val; | |
1206 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1207 | ||
1208 | spin_lock_irqsave(&sachip->lock, flags); | |
1209 | MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); | |
1210 | MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); | |
1211 | MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); | |
1212 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1213 | } | |
0a4bc5e8 | 1214 | EXPORT_SYMBOL(sa1111_set_io); |
1da177e4 LT |
1215 | |
1216 | void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1217 | { | |
1218 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1219 | unsigned long flags; | |
1220 | unsigned int val; | |
1221 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1222 | ||
1223 | spin_lock_irqsave(&sachip->lock, flags); | |
1224 | MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); | |
1225 | MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); | |
1226 | MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); | |
1227 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1228 | } | |
0a4bc5e8 | 1229 | EXPORT_SYMBOL(sa1111_set_sleep_io); |
1da177e4 LT |
1230 | |
1231 | /* | |
1232 | * Individual device operations. | |
1233 | */ | |
1234 | ||
1235 | /** | |
1236 | * sa1111_enable_device - enable an on-chip SA1111 function block | |
1237 | * @sadev: SA1111 function block device to enable | |
1238 | */ | |
ae99ddbc | 1239 | int sa1111_enable_device(struct sa1111_dev *sadev) |
1da177e4 LT |
1240 | { |
1241 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1242 | unsigned long flags; | |
1243 | unsigned int val; | |
ae99ddbc | 1244 | int ret = 0; |
1da177e4 | 1245 | |
ae99ddbc RK |
1246 | if (sachip->pdata && sachip->pdata->enable) |
1247 | ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid); | |
1248 | ||
1249 | if (ret == 0) { | |
1250 | spin_lock_irqsave(&sachip->lock, flags); | |
1251 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1252 | sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1253 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1254 | } | |
1255 | return ret; | |
1da177e4 | 1256 | } |
0a4bc5e8 | 1257 | EXPORT_SYMBOL(sa1111_enable_device); |
1da177e4 LT |
1258 | |
1259 | /** | |
1260 | * sa1111_disable_device - disable an on-chip SA1111 function block | |
1261 | * @sadev: SA1111 function block device to disable | |
1262 | */ | |
1263 | void sa1111_disable_device(struct sa1111_dev *sadev) | |
1264 | { | |
1265 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1266 | unsigned long flags; | |
1267 | unsigned int val; | |
1268 | ||
1269 | spin_lock_irqsave(&sachip->lock, flags); | |
1270 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1271 | sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1272 | spin_unlock_irqrestore(&sachip->lock, flags); | |
ae99ddbc RK |
1273 | |
1274 | if (sachip->pdata && sachip->pdata->disable) | |
1275 | sachip->pdata->disable(sachip->pdata->data, sadev->devid); | |
1da177e4 | 1276 | } |
0a4bc5e8 | 1277 | EXPORT_SYMBOL(sa1111_disable_device); |
1da177e4 LT |
1278 | |
1279 | /* | |
1280 | * SA1111 "Register Access Bus." | |
1281 | * | |
1282 | * We model this as a regular bus type, and hang devices directly | |
1283 | * off this. | |
1284 | */ | |
1285 | static int sa1111_match(struct device *_dev, struct device_driver *_drv) | |
1286 | { | |
1287 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
1288 | struct sa1111_driver *drv = SA1111_DRV(_drv); | |
1289 | ||
e5c0fc41 | 1290 | return dev->devid & drv->devid; |
1da177e4 LT |
1291 | } |
1292 | ||
1293 | static int sa1111_bus_suspend(struct device *dev, pm_message_t state) | |
1294 | { | |
1295 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1296 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1297 | int ret = 0; | |
1298 | ||
1299 | if (drv && drv->suspend) | |
1300 | ret = drv->suspend(sadev, state); | |
1301 | return ret; | |
1302 | } | |
1303 | ||
1304 | static int sa1111_bus_resume(struct device *dev) | |
1305 | { | |
1306 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1307 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1308 | int ret = 0; | |
1309 | ||
1310 | if (drv && drv->resume) | |
1311 | ret = drv->resume(sadev); | |
1312 | return ret; | |
1313 | } | |
1314 | ||
6bd72f05 RK |
1315 | static void sa1111_bus_shutdown(struct device *dev) |
1316 | { | |
1317 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1318 | ||
1319 | if (drv && drv->shutdown) | |
1320 | drv->shutdown(SA1111_DEV(dev)); | |
1321 | } | |
1322 | ||
1da177e4 LT |
1323 | static int sa1111_bus_probe(struct device *dev) |
1324 | { | |
1325 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1326 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1327 | int ret = -ENODEV; | |
1328 | ||
1329 | if (drv->probe) | |
1330 | ret = drv->probe(sadev); | |
1331 | return ret; | |
1332 | } | |
1333 | ||
1334 | static int sa1111_bus_remove(struct device *dev) | |
1335 | { | |
1336 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1337 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1338 | int ret = 0; | |
1339 | ||
1340 | if (drv->remove) | |
1341 | ret = drv->remove(sadev); | |
1342 | return ret; | |
1343 | } | |
1344 | ||
1345 | struct bus_type sa1111_bus_type = { | |
1346 | .name = "sa1111-rab", | |
1347 | .match = sa1111_match, | |
2876ba43 RK |
1348 | .probe = sa1111_bus_probe, |
1349 | .remove = sa1111_bus_remove, | |
1da177e4 LT |
1350 | .suspend = sa1111_bus_suspend, |
1351 | .resume = sa1111_bus_resume, | |
6bd72f05 | 1352 | .shutdown = sa1111_bus_shutdown, |
1da177e4 | 1353 | }; |
0a4bc5e8 | 1354 | EXPORT_SYMBOL(sa1111_bus_type); |
1da177e4 LT |
1355 | |
1356 | int sa1111_driver_register(struct sa1111_driver *driver) | |
1357 | { | |
1da177e4 LT |
1358 | driver->drv.bus = &sa1111_bus_type; |
1359 | return driver_register(&driver->drv); | |
1360 | } | |
0a4bc5e8 | 1361 | EXPORT_SYMBOL(sa1111_driver_register); |
1da177e4 LT |
1362 | |
1363 | void sa1111_driver_unregister(struct sa1111_driver *driver) | |
1364 | { | |
1365 | driver_unregister(&driver->drv); | |
1366 | } | |
0a4bc5e8 | 1367 | EXPORT_SYMBOL(sa1111_driver_unregister); |
1da177e4 | 1368 | |
09a2ba2f RK |
1369 | #ifdef CONFIG_DMABOUNCE |
1370 | /* | |
1371 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | |
1372 | * Chip Specification Update" (June 2000), erratum #7, there is a | |
1373 | * significant bug in the SA1111 SDRAM shared memory controller. If | |
1374 | * an access to a region of memory above 1MB relative to the bank base, | |
1375 | * it is important that address bit 10 _NOT_ be asserted. Depending | |
1376 | * on the configuration of the RAM, bit 10 may correspond to one | |
1377 | * of several different (processor-relative) address bits. | |
1378 | * | |
1379 | * This routine only identifies whether or not a given DMA address | |
1380 | * is susceptible to the bug. | |
1381 | * | |
1382 | * This should only get called for sa1111_device types due to the | |
1383 | * way we configure our device dma_masks. | |
1384 | */ | |
1385 | static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | |
1386 | { | |
1387 | /* | |
1388 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | |
1389 | * User's Guide" mentions that jumpers R51 and R52 control the | |
1390 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | |
1391 | * SDRAM bank 1 on Neponset). The default configuration selects | |
1392 | * Assabet, so any address in bank 1 is necessarily invalid. | |
1393 | */ | |
1394 | return (machine_is_assabet() || machine_is_pfs168()) && | |
1395 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); | |
1396 | } | |
1397 | ||
1398 | static int sa1111_notifier_call(struct notifier_block *n, unsigned long action, | |
1399 | void *data) | |
1400 | { | |
1401 | struct sa1111_dev *dev = SA1111_DEV(data); | |
1402 | ||
1403 | switch (action) { | |
1404 | case BUS_NOTIFY_ADD_DEVICE: | |
1405 | if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) { | |
1406 | int ret = dmabounce_register_dev(&dev->dev, 1024, 4096, | |
1407 | sa1111_needs_bounce); | |
1408 | if (ret) | |
1409 | dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret); | |
1410 | } | |
1411 | break; | |
1412 | ||
1413 | case BUS_NOTIFY_DEL_DEVICE: | |
1414 | if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) | |
1415 | dmabounce_unregister_dev(&dev->dev); | |
1416 | break; | |
1417 | } | |
1418 | return NOTIFY_OK; | |
1419 | } | |
1420 | ||
1421 | static struct notifier_block sa1111_bus_notifier = { | |
1422 | .notifier_call = sa1111_notifier_call, | |
1423 | }; | |
1424 | #endif | |
1425 | ||
1da177e4 LT |
1426 | static int __init sa1111_init(void) |
1427 | { | |
1428 | int ret = bus_register(&sa1111_bus_type); | |
09a2ba2f RK |
1429 | #ifdef CONFIG_DMABOUNCE |
1430 | if (ret == 0) | |
1431 | bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier); | |
1432 | #endif | |
1da177e4 | 1433 | if (ret == 0) |
3ae5eaec | 1434 | platform_driver_register(&sa1111_device_driver); |
1da177e4 LT |
1435 | return ret; |
1436 | } | |
1437 | ||
1438 | static void __exit sa1111_exit(void) | |
1439 | { | |
3ae5eaec | 1440 | platform_driver_unregister(&sa1111_device_driver); |
09a2ba2f RK |
1441 | #ifdef CONFIG_DMABOUNCE |
1442 | bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier); | |
1443 | #endif | |
1da177e4 LT |
1444 | bus_unregister(&sa1111_bus_type); |
1445 | } | |
1446 | ||
72724382 | 1447 | subsys_initcall(sa1111_init); |
1da177e4 LT |
1448 | module_exit(sa1111_exit); |
1449 | ||
1450 | MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); | |
1451 | MODULE_LICENSE("GPL"); |