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Merge tag 'char-misc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[linux-2.6-block.git] / arch / arm / common / sa1111.c
CommitLineData
1da177e4 1/*
f30c2269 2 * linux/arch/arm/common/sa1111.c
1da177e4
LT		 3 *
4 * SA1111 support
5 *
6 * Original code by John Dorsey
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This file contains all generic SA1111 support.
13 *
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
16 */
1da177e4
LT		 17#include <linux/module.h>
18#include <linux/init.h>
36d31213 19#include <linux/irq.h>
1da177e4
LT		 20#include <linux/kernel.h>
21#include <linux/delay.h>
1da177e4
LT		 22#include <linux/errno.h>
23#include <linux/ioport.h>
d052d1be 24#include <linux/platform_device.h>
1da177e4
LT		 25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/dma-mapping.h>
97d654f8 28#include <linux/clk.h>
fced80c7 29#include <linux/io.h>
1da177e4 30
a09e64fb 31#include <mach/hardware.h>
1da177e4 32#include <asm/mach/irq.h>
36d31213 33#include <asm/mach-types.h>
45e109d0 34#include <asm/sizes.h>
1da177e4
LT		 35
36#include <asm/hardware/sa1111.h>
37
19851c58
EM		 38/* SA1111 IRQs */
39#define IRQ_GPAIN0 (0)
40#define IRQ_GPAIN1 (1)
41#define IRQ_GPAIN2 (2)
42#define IRQ_GPAIN3 (3)
43#define IRQ_GPBIN0 (4)
44#define IRQ_GPBIN1 (5)
45#define IRQ_GPBIN2 (6)
46#define IRQ_GPBIN3 (7)
47#define IRQ_GPBIN4 (8)
48#define IRQ_GPBIN5 (9)
49#define IRQ_GPCIN0 (10)
50#define IRQ_GPCIN1 (11)
51#define IRQ_GPCIN2 (12)
52#define IRQ_GPCIN3 (13)
53#define IRQ_GPCIN4 (14)
54#define IRQ_GPCIN5 (15)
55#define IRQ_GPCIN6 (16)
56#define IRQ_GPCIN7 (17)
57#define IRQ_MSTXINT (18)
58#define IRQ_MSRXINT (19)
59#define IRQ_MSSTOPERRINT (20)
60#define IRQ_TPTXINT (21)
61#define IRQ_TPRXINT (22)
62#define IRQ_TPSTOPERRINT (23)
63#define SSPXMTINT (24)
64#define SSPRCVINT (25)
65#define SSPROR (26)
66#define AUDXMTDMADONEA (32)
67#define AUDRCVDMADONEA (33)
68#define AUDXMTDMADONEB (34)
69#define AUDRCVDMADONEB (35)
70#define AUDTFSR (36)
71#define AUDRFSR (37)
72#define AUDTUR (38)
73#define AUDROR (39)
74#define AUDDTS (40)
75#define AUDRDD (41)
76#define AUDSTO (42)
77#define IRQ_USBPWR (43)
78#define IRQ_HCIM (44)
79#define IRQ_HCIBUFFACC (45)
80#define IRQ_HCIRMTWKP (46)
81#define IRQ_NHCIMFCIR (47)
82#define IRQ_USB_PORT_RESUME (48)
83#define IRQ_S0_READY_NINT (49)
84#define IRQ_S1_READY_NINT (50)
85#define IRQ_S0_CD_VALID (51)
86#define IRQ_S1_CD_VALID (52)
87#define IRQ_S0_BVD1_STSCHG (53)
88#define IRQ_S1_BVD1_STSCHG (54)
36d31213 89#define SA1111_IRQ_NR (55)
19851c58 90
29c140b6
RK		 91extern void sa1110_mb_enable(void);
92extern void sa1110_mb_disable(void);
1da177e4
LT		 93
94/*
95 * We keep the following data for the overall SA1111. Note that the
96 * struct device and struct resource are "fake"; they should be supplied
97 * by the bus above us. However, in the interests of getting all SA1111
98 * drivers converted over to the device model, we provide this as an
99 * anchor point for all the other drivers.
100 */
101struct sa1111 {
102 struct device *dev;
97d654f8 103 struct clk *clk;
1da177e4
LT		 104 unsigned long phys;
105 int irq;
19851c58 106 int irq_base; /* base for cascaded on-chip IRQs */
1da177e4
LT		 107 spinlock_t lock;
108 void __iomem *base;
ae99ddbc 109 struct sa1111_platform_data *pdata;
93160c63
RW		 110#ifdef CONFIG_PM
111 void *saved_state;
112#endif
1da177e4
LT		 113};
114
115/*
116 * We _really_ need to eliminate this. Its only users
117 * are the PWM and DMA checking code.
118 */
119static struct sa1111 *g_sa1111;
120
121struct sa1111_dev_info {
122 unsigned long offset;
123 unsigned long skpcr_mask;
21d1c770 124 bool dma;
1da177e4
LT		 125 unsigned int devid;
126 unsigned int irq[6];
127};
128
129static struct sa1111_dev_info sa1111_devices[] = {
130 {
131 .offset = SA1111_USB,
132 .skpcr_mask = SKPCR_UCLKEN,
21d1c770 133 .dma = true,
1da177e4
LT		 134 .devid = SA1111_DEVID_USB,
135 .irq = {
136 IRQ_USBPWR,
137 IRQ_HCIM,
138 IRQ_HCIBUFFACC,
139 IRQ_HCIRMTWKP,
140 IRQ_NHCIMFCIR,
141 IRQ_USB_PORT_RESUME
142 },
143 },
144 {
145 .offset = 0x0600,
146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
21d1c770 147 .dma = true,
1da177e4
LT		 148 .devid = SA1111_DEVID_SAC,
149 .irq = {
150 AUDXMTDMADONEA,
151 AUDXMTDMADONEB,
152 AUDRCVDMADONEA,
153 AUDRCVDMADONEB
154 },
155 },
156 {
157 .offset = 0x0800,
158 .skpcr_mask = SKPCR_SCLKEN,
159 .devid = SA1111_DEVID_SSP,
160 },
161 {
162 .offset = SA1111_KBD,
163 .skpcr_mask = SKPCR_PTCLKEN,
e5c0fc41 164 .devid = SA1111_DEVID_PS2_KBD,
1da177e4
LT		 165 .irq = {
166 IRQ_TPRXINT,
167 IRQ_TPTXINT
168 },
169 },
170 {
171 .offset = SA1111_MSE,
172 .skpcr_mask = SKPCR_PMCLKEN,
e5c0fc41 173 .devid = SA1111_DEVID_PS2_MSE,
1da177e4
LT		 174 .irq = {
175 IRQ_MSRXINT,
176 IRQ_MSTXINT
177 },
178 },
179 {
180 .offset = 0x1800,
181 .skpcr_mask = 0,
182 .devid = SA1111_DEVID_PCMCIA,
183 .irq = {
184 IRQ_S0_READY_NINT,
185 IRQ_S0_CD_VALID,
186 IRQ_S0_BVD1_STSCHG,
187 IRQ_S1_READY_NINT,
188 IRQ_S1_CD_VALID,
189 IRQ_S1_BVD1_STSCHG,
190 },
191 },
192};
193
194/*
195 * SA1111 interrupt support. Since clearing an IRQ while there are
196 * active IRQs causes the interrupt output to pulse, the upper levels
197 * will call us again if there are more interrupts to process.
198 */
199static void
10dd5ce2 200sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4
LT		 201{
202 unsigned int stat0, stat1, i;
6845664a 203 struct sa1111 *sachip = irq_get_handler_data(irq);
19851c58 204 void __iomem *mapbase = sachip->base + SA1111_INTC;
1da177e4 205
19851c58
EM		 206 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
207 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
1da177e4 208
19851c58 209 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
1da177e4 210
8231e741 211 desc->irq_data.chip->irq_ack(&desc->irq_data);
1da177e4 212
19851c58 213 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
1da177e4
LT		 214
215 if (stat0 == 0 && stat1 == 0) {
0cd61b68 216 do_bad_IRQ(irq, desc);
1da177e4
LT		 217 return;
218 }
219
19851c58 220 for (i = 0; stat0; i++, stat0 >>= 1)
1da177e4 221 if (stat0 & 1)
19851c58 222 generic_handle_irq(i + sachip->irq_base);
1da177e4 223
19851c58 224 for (i = 32; stat1; i++, stat1 >>= 1)
1da177e4 225 if (stat1 & 1)
19851c58 226 generic_handle_irq(i + sachip->irq_base);
1da177e4
LT		 227
228 /* For level-based interrupts */
8231e741 229 desc->irq_data.chip->irq_unmask(&desc->irq_data);
1da177e4
LT		 230}
231
19851c58
EM		 232#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
233#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
1da177e4 234
8231e741 235static void sa1111_ack_irq(struct irq_data *d)
1da177e4
LT		 236{
237}
238
8231e741 239static void sa1111_mask_lowirq(struct irq_data *d)
1da177e4 240{
8231e741 241 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 242 void __iomem *mapbase = sachip->base + SA1111_INTC;
1da177e4
LT		 243 unsigned long ie0;
244
245 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
8231e741 246 ie0 &= ~SA1111_IRQMASK_LO(d->irq);
1da177e4
LT		 247 writel(ie0, mapbase + SA1111_INTEN0);
248}
249
8231e741 250static void sa1111_unmask_lowirq(struct irq_data *d)
1da177e4 251{
8231e741 252 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 253 void __iomem *mapbase = sachip->base + SA1111_INTC;
1da177e4
LT		 254 unsigned long ie0;
255
256 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
8231e741 257 ie0 |= SA1111_IRQMASK_LO(d->irq);
1da177e4
LT		 258 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
259}
260
261/*
262 * Attempt to re-trigger the interrupt. The SA1111 contains a register
263 * (INTSET) which claims to do this. However, in practice no amount of
264 * manipulation of INTEN and INTSET guarantees that the interrupt will
265 * be triggered. In fact, its very difficult, if not impossible to get
266 * INTSET to re-trigger the interrupt.
267 */
8231e741 268static int sa1111_retrigger_lowirq(struct irq_data *d)
1da177e4 269{
8231e741 270 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 271 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 272 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
1da177e4
LT		 273 unsigned long ip0;
274 int i;
275
276 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
277 for (i = 0; i < 8; i++) {
278 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
279 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
cae39988 280 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
1da177e4
LT		 281 break;
282 }
283
284 if (i == 8)
4ed89f22
RK		 285 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n",
286 d->irq);
1da177e4
LT		 287 return i == 8 ? -1 : 0;
288}
289
8231e741 290static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
1da177e4 291{
8231e741 292 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 293 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 294 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
1da177e4
LT		 295 unsigned long ip0;
296
6cab4860 297 if (flags == IRQ_TYPE_PROBE)
1da177e4
LT		 298 return 0;
299
6cab4860 300 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
1da177e4
LT		 301 return -EINVAL;
302
303 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
6cab4860 304 if (flags & IRQ_TYPE_EDGE_RISING)
1da177e4
LT		 305 ip0 &= ~mask;
306 else
307 ip0 |= mask;
308 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
309 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
310
311 return 0;
312}
313
8231e741 314static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
1da177e4 315{
8231e741 316 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 317 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 318 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
1da177e4
LT		 319 unsigned long we0;
320
321 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
322 if (on)
323 we0 |= mask;
324 else
325 we0 &= ~mask;
326 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
327
328 return 0;
329}
330
38c677cb
DB		 331static struct irq_chip sa1111_low_chip = {
332 .name = "SA1111-l",
8231e741
LB		 333 .irq_ack = sa1111_ack_irq,
334 .irq_mask = sa1111_mask_lowirq,
335 .irq_unmask = sa1111_unmask_lowirq,
336 .irq_retrigger = sa1111_retrigger_lowirq,
337 .irq_set_type = sa1111_type_lowirq,
338 .irq_set_wake = sa1111_wake_lowirq,
1da177e4
LT		 339};
340
8231e741 341static void sa1111_mask_highirq(struct irq_data *d)
1da177e4 342{
8231e741 343 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 344 void __iomem *mapbase = sachip->base + SA1111_INTC;
1da177e4
LT		 345 unsigned long ie1;
346
347 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
8231e741 348 ie1 &= ~SA1111_IRQMASK_HI(d->irq);
1da177e4
LT		 349 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
350}
351
8231e741 352static void sa1111_unmask_highirq(struct irq_data *d)
1da177e4 353{
8231e741 354 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 355 void __iomem *mapbase = sachip->base + SA1111_INTC;
1da177e4
LT		 356 unsigned long ie1;
357
358 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
8231e741 359 ie1 |= SA1111_IRQMASK_HI(d->irq);
1da177e4
LT		 360 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
361}
362
363/*
364 * Attempt to re-trigger the interrupt. The SA1111 contains a register
365 * (INTSET) which claims to do this. However, in practice no amount of
366 * manipulation of INTEN and INTSET guarantees that the interrupt will
367 * be triggered. In fact, its very difficult, if not impossible to get
368 * INTSET to re-trigger the interrupt.
369 */
8231e741 370static int sa1111_retrigger_highirq(struct irq_data *d)
1da177e4 371{
8231e741 372 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 373 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 374 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
1da177e4
LT		 375 unsigned long ip1;
376 int i;
377
378 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
379 for (i = 0; i < 8; i++) {
380 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
381 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
382 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
383 break;
384 }
385
386 if (i == 8)
4ed89f22
RK		 387 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n",
388 d->irq);
1da177e4
LT		 389 return i == 8 ? -1 : 0;
390}
391
8231e741 392static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
1da177e4 393{
8231e741 394 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 395 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 396 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
1da177e4
LT		 397 unsigned long ip1;
398
6cab4860 399 if (flags == IRQ_TYPE_PROBE)
1da177e4
LT		 400 return 0;
401
6cab4860 402 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
1da177e4
LT		 403 return -EINVAL;
404
405 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
6cab4860 406 if (flags & IRQ_TYPE_EDGE_RISING)
1da177e4
LT		 407 ip1 &= ~mask;
408 else
409 ip1 |= mask;
410 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
411 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
412
413 return 0;
414}
415
8231e741 416static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
1da177e4 417{
8231e741 418 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
19851c58 419 void __iomem *mapbase = sachip->base + SA1111_INTC;
8231e741 420 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
1da177e4
LT		 421 unsigned long we1;
422
423 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
424 if (on)
425 we1 |= mask;
426 else
427 we1 &= ~mask;
428 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
429
430 return 0;
431}
432
38c677cb
DB		 433static struct irq_chip sa1111_high_chip = {
434 .name = "SA1111-h",
8231e741
LB		 435 .irq_ack = sa1111_ack_irq,
436 .irq_mask = sa1111_mask_highirq,
437 .irq_unmask = sa1111_unmask_highirq,
438 .irq_retrigger = sa1111_retrigger_highirq,
439 .irq_set_type = sa1111_type_highirq,
440 .irq_set_wake = sa1111_wake_highirq,
1da177e4
LT		 441};
442
36d31213 443static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
1da177e4
LT		 444{
445 void __iomem *irqbase = sachip->base + SA1111_INTC;
f03ecaa0 446 unsigned i, irq;
36d31213 447 int ret;
1da177e4
LT		 448
449 /*
450 * We're guaranteed that this region hasn't been taken.
451 */
452 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
453
36d31213
RK		 454 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
455 if (ret <= 0) {
456 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
457 SA1111_IRQ_NR, ret);
458 if (ret == 0)
459 ret = -EINVAL;
460 return ret;
461 }
462
463 sachip->irq_base = ret;
464
1da177e4
LT		 465 /* disable all IRQs */
466 sa1111_writel(0, irqbase + SA1111_INTEN0);
467 sa1111_writel(0, irqbase + SA1111_INTEN1);
468 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
469 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
470
471 /*
472 * detect on rising edge. Note: Feb 2001 Errata for SA1111
473 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
474 */
475 sa1111_writel(0, irqbase + SA1111_INTPOL0);
476 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
477 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
478 irqbase + SA1111_INTPOL1);
479
480 /* clear all IRQs */
481 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
482 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
483
f03ecaa0
RK		 484 for (i = IRQ_GPAIN0; i <= SSPROR; i++) {
485 irq = sachip->irq_base + i;
f38c02f3
TG		 486 irq_set_chip_and_handler(irq, &sa1111_low_chip,
487 handle_edge_irq);
9323f261 488 irq_set_chip_data(irq, sachip);
1da177e4
LT		 489 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
490 }
491
f03ecaa0
RK		 492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) {
493 irq = sachip->irq_base + i;
f38c02f3
TG		 494 irq_set_chip_and_handler(irq, &sa1111_high_chip,
495 handle_edge_irq);
9323f261 496 irq_set_chip_data(irq, sachip);
1da177e4
LT		 497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
498 }
499
500 /*
501 * Register SA1111 interrupt
502 */
6845664a 503 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
056c0acf
RK		 504 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler,
505 sachip);
36d31213
RK		 506
507 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
508 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
509
510 return 0;
1da177e4
LT		 511}
512
513/*
514 * Bring the SA1111 out of reset. This requires a set procedure:
515 * 1. nRESET asserted (by hardware)
516 * 2. CLK turned on from SA1110
517 * 3. nRESET deasserted
518 * 4. VCO turned on, PLL_BYPASS turned off
519 * 5. Wait lock time, then assert RCLKEn
520 * 7. PCR set to allow clocking of individual functions
521 *
522 * Until we've done this, the only registers we can access are:
523 * SBI_SKCR
524 * SBI_SMCR
525 * SBI_SKID
526 */
527static void sa1111_wake(struct sa1111 *sachip)
528{
529 unsigned long flags, r;
530
531 spin_lock_irqsave(&sachip->lock, flags);
532
97d654f8 533 clk_enable(sachip->clk);
1da177e4
LT		 534
535 /*
536 * Turn VCO on, and disable PLL Bypass.
537 */
538 r = sa1111_readl(sachip->base + SA1111_SKCR);
539 r &= ~SKCR_VCO_OFF;
540 sa1111_writel(r, sachip->base + SA1111_SKCR);
541 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
542 sa1111_writel(r, sachip->base + SA1111_SKCR);
543
544 /*
545 * Wait lock time. SA1111 manual _doesn't_
546 * specify a figure for this! We choose 100us.
547 */
548 udelay(100);
549
550 /*
551 * Enable RCLK. We also ensure that RDYEN is set.
552 */
553 r |= SKCR_RCLKEN | SKCR_RDYEN;
554 sa1111_writel(r, sachip->base + SA1111_SKCR);
555
556 /*
557 * Wait 14 RCLK cycles for the chip to finish coming out
558 * of reset. (RCLK=24MHz). This is 590ns.
559 */
560 udelay(1);
561
562 /*
563 * Ensure all clocks are initially off.
564 */
565 sa1111_writel(0, sachip->base + SA1111_SKPCR);
566
567 spin_unlock_irqrestore(&sachip->lock, flags);
568}
569
570#ifdef CONFIG_ARCH_SA1100
571
572static u32 sa1111_dma_mask[] = {
573 ~0,
574 ~(1 << 20),
575 ~(1 << 23),
576 ~(1 << 24),
577 ~(1 << 25),
578 ~(1 << 20),
579 ~(1 << 20),
580 0,
581};
582
583/*
584 * Configure the SA1111 shared memory controller.
585 */
586void
587sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
588 unsigned int cas_latency)
589{
590 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
591
592 if (cas_latency == 3)
593 smcr |= SMCR_CLAT;
594
595 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
596
597 /*
598 * Now clear the bits in the DMA mask to work around the SA1111
599 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
600 * Chip Specification Update, June 2000, Erratum #7).
601 */
602 if (sachip->dev->dma_mask)
603 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
604
605 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
606}
0703ed2a 607#endif
1da177e4 608
1da177e4
LT		 609static void sa1111_dev_release(struct device *_dev)
610{
611 struct sa1111_dev *dev = SA1111_DEV(_dev);
612
1da177e4
LT		 613 kfree(dev);
614}
615
616static int
617sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
618 struct sa1111_dev_info *info)
619{
620 struct sa1111_dev *dev;
f03ecaa0 621 unsigned i;
1da177e4
LT		 622 int ret;
623
d2a02b93 624 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
1da177e4
LT		 625 if (!dev) {
626 ret = -ENOMEM;
924e1d49 627 goto err_alloc;
1da177e4 628 }
1da177e4 629
924e1d49 630 device_initialize(&dev->dev);
3f978704 631 dev_set_name(&dev->dev, "%4.4lx", info->offset);
1da177e4
LT		 632 dev->devid = info->devid;
633 dev->dev.parent = sachip->dev;
634 dev->dev.bus = &sa1111_bus_type;
635 dev->dev.release = sa1111_dev_release;
1da177e4
LT		 636 dev->res.start = sachip->phys + info->offset;
637 dev->res.end = dev->res.start + 511;
3f978704 638 dev->res.name = dev_name(&dev->dev);
1da177e4
LT		 639 dev->res.flags = IORESOURCE_MEM;
640 dev->mapbase = sachip->base + info->offset;
641 dev->skpcr_mask = info->skpcr_mask;
f03ecaa0
RK		 642
643 for (i = 0; i < ARRAY_SIZE(info->irq); i++)
644 dev->irq[i] = sachip->irq_base + info->irq[i];
1da177e4 645
09a2ba2f 646 /*
21d1c770
RK		 647 * If the parent device has a DMA mask associated with it, and
648 * this child supports DMA, propagate it down to the children.
09a2ba2f 649 */
21d1c770 650 if (info->dma && sachip->dev->dma_mask) {
09a2ba2f
RK		 651 dev->dma_mask = *sachip->dev->dma_mask;
652 dev->dev.dma_mask = &dev->dma_mask;
653 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
654 }
655
1da177e4
LT		 656 ret = request_resource(parent, &dev->res);
657 if (ret) {
22eeaff3 658 dev_err(sachip->dev, "failed to allocate resource for %s\n",
1da177e4 659 dev->res.name);
924e1d49 660 goto err_resource;
1da177e4
LT		 661 }
662
924e1d49
RK		 663 ret = device_add(&dev->dev);
664 if (ret)
665 goto err_add;
666 return 0;
1da177e4 667
924e1d49
RK		 668 err_add:
669 release_resource(&dev->res);
670 err_resource:
671 put_device(&dev->dev);
672 err_alloc:
1da177e4
LT		 673 return ret;
674}
675
676/**
677 * sa1111_probe - probe for a single SA1111 chip.
678 * @phys_addr: physical address of device.
679 *
680 * Probe for a SA1111 chip. This must be called
681 * before any other SA1111-specific code.
682 *
683 * Returns:
684 * %-ENODEV device not found.
685 * %-EBUSY physical address already marked in-use.
f03ecaa0 686 * %-EINVAL no platform data passed
1da177e4
LT		 687 * %0 successful.
688 */
351a102d 689static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
1da177e4 690{
f03ecaa0 691 struct sa1111_platform_data *pd = me->platform_data;
1da177e4
LT		 692 struct sa1111 *sachip;
693 unsigned long id;
416112f8 694 unsigned int has_devs;
1da177e4
LT		 695 int i, ret = -ENODEV;
696
f03ecaa0
RK		 697 if (!pd)
698 return -EINVAL;
699
d2a02b93 700 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
1da177e4
LT		 701 if (!sachip)
702 return -ENOMEM;
703
13f75582 704 sachip->clk = clk_get(me, "SA1111_CLK");
442a9022 705 if (IS_ERR(sachip->clk)) {
97d654f8
RK		 706 ret = PTR_ERR(sachip->clk);
707 goto err_free;
708 }
709
72ae00c9
RK		 710 ret = clk_prepare(sachip->clk);
711 if (ret)
712 goto err_clkput;
713
1da177e4
LT		 714 spin_lock_init(&sachip->lock);
715
716 sachip->dev = me;
717 dev_set_drvdata(sachip->dev, sachip);
718
ae99ddbc 719 sachip->pdata = pd;
1da177e4
LT		 720 sachip->phys = mem->start;
721 sachip->irq = irq;
722
723 /*
724 * Map the whole region. This also maps the
725 * registers for our children.
726 */
727 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
728 if (!sachip->base) {
729 ret = -ENOMEM;
72ae00c9 730 goto err_clk_unprep;
1da177e4
LT		 731 }
732
733 /*
734 * Probe for the chip. Only touch the SBI registers.
735 */
736 id = sa1111_readl(sachip->base + SA1111_SKID);
737 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
738 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
739 ret = -ENODEV;
97d654f8 740 goto err_unmap;
1da177e4
LT		 741 }
742
4ed89f22
RK		 743 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n",
744 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK);
1da177e4
LT		 745
746 /*
747 * We found it. Wake the chip up, and initialise.
748 */
749 sa1111_wake(sachip);
750
36d31213
RK		 751 /*
752 * The interrupt controller must be initialised before any
753 * other device to ensure that the interrupts are available.
754 */
755 if (sachip->irq != NO_IRQ) {
756 ret = sa1111_setup_irq(sachip, pd->irq_base);
757 if (ret)
758 goto err_unmap;
759 }
760
1da177e4 761#ifdef CONFIG_ARCH_SA1100
416112f8
DB		 762 {
763 unsigned int val;
764
1da177e4
LT		 765 /*
766 * The SDRAM configuration of the SA1110 and the SA1111 must
767 * match. This is very important to ensure that SA1111 accesses
768 * don't corrupt the SDRAM. Note that this ungates the SA1111's
769 * MBGNT signal, so we must have called sa1110_mb_disable()
770 * beforehand.
771 */
772 sa1111_configure_smc(sachip, 1,
773 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
774 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
775
776 /*
777 * We only need to turn on DCLK whenever we want to use the
778 * DMA. It can otherwise be held firmly in the off position.
779 * (currently, we always enable it.)
780 */
781 val = sa1111_readl(sachip->base + SA1111_SKPCR);
782 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
783
784 /*
785 * Enable the SA1110 memory bus request and grant signals.
786 */
787 sa1110_mb_enable();
416112f8 788 }
1da177e4
LT		 789#endif
790
1da177e4
LT		 791 g_sa1111 = sachip;
792
793 has_devs = ~0;
07be45f5
RK		 794 if (pd)
795 has_devs &= ~pd->disable_devs;
1da177e4
LT		 796
797 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
e5c0fc41 798 if (sa1111_devices[i].devid & has_devs)
1da177e4
LT		 799 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
800
801 return 0;
802
97d654f8 803 err_unmap:
1da177e4 804 iounmap(sachip->base);
72ae00c9
RK		 805 err_clk_unprep:
806 clk_unprepare(sachip->clk);
97d654f8
RK		 807 err_clkput:
808 clk_put(sachip->clk);
809 err_free:
1da177e4
LT		 810 kfree(sachip);
811 return ret;
812}
813
522c37b9
RK		 814static int sa1111_remove_one(struct device *dev, void *data)
815{
924e1d49
RK		 816 struct sa1111_dev *sadev = SA1111_DEV(dev);
817 device_del(&sadev->dev);
818 release_resource(&sadev->res);
819 put_device(&sadev->dev);
522c37b9
RK		 820 return 0;
821}
822
1da177e4
LT		 823static void __sa1111_remove(struct sa1111 *sachip)
824{
1da177e4
LT		 825 void __iomem *irqbase = sachip->base + SA1111_INTC;
826
522c37b9 827 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
1da177e4
LT		 828
829 /* disable all IRQs */
830 sa1111_writel(0, irqbase + SA1111_INTEN0);
831 sa1111_writel(0, irqbase + SA1111_INTEN1);
832 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
833 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
834
97d654f8 835 clk_disable(sachip->clk);
72ae00c9 836 clk_unprepare(sachip->clk);
97d654f8 837
1da177e4 838 if (sachip->irq != NO_IRQ) {
056c0acf 839 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL);
36d31213 840 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
1da177e4
LT		 841
842 release_mem_region(sachip->phys + SA1111_INTC, 512);
843 }
844
845 iounmap(sachip->base);
97d654f8 846 clk_put(sachip->clk);
1da177e4
LT		 847 kfree(sachip);
848}
849
1da177e4
LT		 850struct sa1111_save_data {
851 unsigned int skcr;
852 unsigned int skpcr;
853 unsigned int skcdr;
854 unsigned char skaud;
855 unsigned char skpwm0;
856 unsigned char skpwm1;
857
858 /*
859 * Interrupt controller
860 */
861 unsigned int intpol0;
862 unsigned int intpol1;
863 unsigned int inten0;
864 unsigned int inten1;
865 unsigned int wakepol0;
866 unsigned int wakepol1;
867 unsigned int wakeen0;
868 unsigned int wakeen1;
869};
870
871#ifdef CONFIG_PM
872
3ae5eaec 873static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 874{
3ae5eaec 875 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 876 struct sa1111_save_data *save;
877 unsigned long flags;
878 unsigned int val;
879 void __iomem *base;
880
1da177e4
LT		 881 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
882 if (!save)
883 return -ENOMEM;
93160c63 884 sachip->saved_state = save;
1da177e4
LT		 885
886 spin_lock_irqsave(&sachip->lock, flags);
887
888 /*
889 * Save state.
890 */
891 base = sachip->base;
892 save->skcr = sa1111_readl(base + SA1111_SKCR);
893 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
894 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
895 save->skaud = sa1111_readl(base + SA1111_SKAUD);
896 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
897 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
898
a22db0f3
RK		 899 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
900 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
901
1da177e4
LT		 902 base = sachip->base + SA1111_INTC;
903 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
904 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
905 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
906 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
907 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
908 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
909 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
910 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
911
912 /*
913 * Disable.
914 */
915 val = sa1111_readl(sachip->base + SA1111_SKCR);
916 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
1da177e4 917
97d654f8
RK		 918 clk_disable(sachip->clk);
919
1da177e4
LT		 920 spin_unlock_irqrestore(&sachip->lock, flags);
921
29c140b6
RK		 922#ifdef CONFIG_ARCH_SA1100
923 sa1110_mb_disable();
924#endif
925
1da177e4
LT		 926 return 0;
927}
928
929/*
930 * sa1111_resume - Restore the SA1111 device state.
931 * @dev: device to restore
1da177e4
LT		 932 *
933 * Restore the general state of the SA1111; clock control and
934 * interrupt controller. Other parts of the SA1111 must be
935 * restored by their respective drivers, and must be called
936 * via LDM after this function.
937 */
3ae5eaec 938static int sa1111_resume(struct platform_device *dev)
1da177e4 939{
3ae5eaec 940 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 941 struct sa1111_save_data *save;
942 unsigned long flags, id;
943 void __iomem *base;
944
93160c63 945 save = sachip->saved_state;
1da177e4
LT		 946 if (!save)
947 return 0;
948
1da177e4
LT		 949 /*
950 * Ensure that the SA1111 is still here.
951 * FIXME: shouldn't do this here.
952 */
953 id = sa1111_readl(sachip->base + SA1111_SKID);
954 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
955 __sa1111_remove(sachip);
3ae5eaec 956 platform_set_drvdata(dev, NULL);
1da177e4
LT		 957 kfree(save);
958 return 0;
959 }
960
961 /*
962 * First of all, wake up the chip.
963 */
964 sa1111_wake(sachip);
3defb247 965
29c140b6
RK		 966#ifdef CONFIG_ARCH_SA1100
967 /* Enable the memory bus request/grant signals */
968 sa1110_mb_enable();
969#endif
970
3defb247
MV		 971 /*
972 * Only lock for write ops. Also, sa1111_wake must be called with
973 * released spinlock!
974 */
975 spin_lock_irqsave(&sachip->lock, flags);
976
1da177e4
LT		 977 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
978 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
979
980 base = sachip->base;
981 sa1111_writel(save->skcr, base + SA1111_SKCR);
982 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
983 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
984 sa1111_writel(save->skaud, base + SA1111_SKAUD);
985 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
986 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
987
988 base = sachip->base + SA1111_INTC;
989 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
990 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
991 sa1111_writel(save->inten0, base + SA1111_INTEN0);
992 sa1111_writel(save->inten1, base + SA1111_INTEN1);
993 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
994 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
995 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
996 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
997
998 spin_unlock_irqrestore(&sachip->lock, flags);
999
93160c63 1000 sachip->saved_state = NULL;
1da177e4
LT		 1001 kfree(save);
1002
1003 return 0;
1004}
1005
1006#else
1007#define sa1111_suspend NULL
1008#define sa1111_resume NULL
1009#endif
1010
351a102d 1011static int sa1111_probe(struct platform_device *pdev)
1da177e4 1012{
1da177e4
LT		 1013 struct resource *mem;
1014 int irq;
1015
1016 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1017 if (!mem)
1018 return -EINVAL;
1019 irq = platform_get_irq(pdev, 0);
48944738
DV		 1020 if (irq < 0)
1021 return -ENXIO;
1da177e4 1022
3ae5eaec 1023 return __sa1111_probe(&pdev->dev, mem, irq);
1da177e4
LT		 1024}
1025
3ae5eaec 1026static int sa1111_remove(struct platform_device *pdev)
1da177e4 1027{
3ae5eaec 1028 struct sa1111 *sachip = platform_get_drvdata(pdev);
1da177e4
LT		 1029
1030 if (sachip) {
1da177e4 1031#ifdef CONFIG_PM
93160c63
RW		 1032 kfree(sachip->saved_state);
1033 sachip->saved_state = NULL;
1da177e4 1034#endif
f2d2420b
JL		 1035 __sa1111_remove(sachip);
1036 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 1037 }
1038
1039 return 0;
1040}
1041
1042/*
1043 * Not sure if this should be on the system bus or not yet.
1044 * We really want some way to register a system device at
1045 * the per-machine level, and then have this driver pick
1046 * up the registered devices.
1047 *
1048 * We also need to handle the SDRAM configuration for
1049 * PXA250/SA1110 machine classes.
1050 */
3ae5eaec 1051static struct platform_driver sa1111_device_driver = {
1da177e4
LT		 1052 .probe = sa1111_probe,
1053 .remove = sa1111_remove,
1054 .suspend = sa1111_suspend,
1055 .resume = sa1111_resume,
3ae5eaec
RK		 1056 .driver = {
1057 .name = "sa1111",
1058 },
1da177e4
LT		 1059};
1060
1061/*
1062 * Get the parent device driver (us) structure
1063 * from a child function device
1064 */
1065static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1066{
1067 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1068}
1069
1070/*
1071 * The bits in the opdiv field are non-linear.
1072 */
1073static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1074
1075static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1076{
1077 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1078
1079 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1080
1081 fbdiv = (skcdr & 0x007f) + 2;
1082 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1083 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1084
1085 return 3686400 * fbdiv / (ipdiv * opdiv);
1086}
1087
1088/**
1089 * sa1111_pll_clock - return the current PLL clock frequency.
1090 * @sadev: SA1111 function block
1091 *
1092 * BUG: we should look at SKCR. We also blindly believe that
1093 * the chip is being fed with the 3.6864MHz clock.
1094 *
1095 * Returns the PLL clock in Hz.
1096 */
1097unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1098{
1099 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1100
1101 return __sa1111_pll_clock(sachip);
1102}
0a4bc5e8 1103EXPORT_SYMBOL(sa1111_pll_clock);
1da177e4
LT		 1104
1105/**
1106 * sa1111_select_audio_mode - select I2S or AC link mode
1107 * @sadev: SA1111 function block
1108 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1109 *
1110 * Frob the SKCR to select AC Link mode or I2S mode for
1111 * the audio block.
1112 */
1113void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1114{
1115 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1116 unsigned long flags;
1117 unsigned int val;
1118
1119 spin_lock_irqsave(&sachip->lock, flags);
1120
1121 val = sa1111_readl(sachip->base + SA1111_SKCR);
1122 if (mode == SA1111_AUDIO_I2S) {
1123 val &= ~SKCR_SELAC;
1124 } else {
1125 val |= SKCR_SELAC;
1126 }
1127 sa1111_writel(val, sachip->base + SA1111_SKCR);
1128
1129 spin_unlock_irqrestore(&sachip->lock, flags);
1130}
0a4bc5e8 1131EXPORT_SYMBOL(sa1111_select_audio_mode);
1da177e4
LT		 1132
1133/**
1134 * sa1111_set_audio_rate - set the audio sample rate
1135 * @sadev: SA1111 SAC function block
1136 * @rate: sample rate to select
1137 */
1138int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1139{
1140 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1141 unsigned int div;
1142
1143 if (sadev->devid != SA1111_DEVID_SAC)
1144 return -EINVAL;
1145
1146 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1147 if (div == 0)
1148 div = 1;
1149 if (div > 128)
1150 div = 128;
1151
1152 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1153
1154 return 0;
1155}
0a4bc5e8 1156EXPORT_SYMBOL(sa1111_set_audio_rate);
1da177e4
LT		 1157
1158/**
1159 * sa1111_get_audio_rate - get the audio sample rate
1160 * @sadev: SA1111 SAC function block device
1161 */
1162int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1163{
1164 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1165 unsigned long div;
1166
1167 if (sadev->devid != SA1111_DEVID_SAC)
1168 return -EINVAL;
1169
1170 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1171
1172 return __sa1111_pll_clock(sachip) / (256 * div);
1173}
0a4bc5e8 1174EXPORT_SYMBOL(sa1111_get_audio_rate);
1da177e4
LT		 1175
1176void sa1111_set_io_dir(struct sa1111_dev *sadev,
1177 unsigned int bits, unsigned int dir,
1178 unsigned int sleep_dir)
1179{
1180 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1181 unsigned long flags;
1182 unsigned int val;
1183 void __iomem *gpio = sachip->base + SA1111_GPIO;
1184
1185#define MODIFY_BITS(port, mask, dir) \
1186 if (mask) { \
1187 val = sa1111_readl(port); \
1188 val &= ~(mask); \
1189 val |= (dir) & (mask); \
1190 sa1111_writel(val, port); \
1191 }
1192
1193 spin_lock_irqsave(&sachip->lock, flags);
1194 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1195 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1196 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1197
1198 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1199 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1200 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1201 spin_unlock_irqrestore(&sachip->lock, flags);
1202}
0a4bc5e8 1203EXPORT_SYMBOL(sa1111_set_io_dir);
1da177e4
LT		 1204
1205void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1206{
1207 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1208 unsigned long flags;
1209 unsigned int val;
1210 void __iomem *gpio = sachip->base + SA1111_GPIO;
1211
1212 spin_lock_irqsave(&sachip->lock, flags);
1213 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1214 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1215 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1216 spin_unlock_irqrestore(&sachip->lock, flags);
1217}
0a4bc5e8 1218EXPORT_SYMBOL(sa1111_set_io);
1da177e4
LT		 1219
1220void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1221{
1222 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1223 unsigned long flags;
1224 unsigned int val;
1225 void __iomem *gpio = sachip->base + SA1111_GPIO;
1226
1227 spin_lock_irqsave(&sachip->lock, flags);
1228 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1229 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1230 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1231 spin_unlock_irqrestore(&sachip->lock, flags);
1232}
0a4bc5e8 1233EXPORT_SYMBOL(sa1111_set_sleep_io);
1da177e4
LT		 1234
1235/*
1236 * Individual device operations.
1237 */
1238
1239/**
1240 * sa1111_enable_device - enable an on-chip SA1111 function block
1241 * @sadev: SA1111 function block device to enable
1242 */
ae99ddbc 1243int sa1111_enable_device(struct sa1111_dev *sadev)
1da177e4
LT		 1244{
1245 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1246 unsigned long flags;
1247 unsigned int val;
ae99ddbc 1248 int ret = 0;
1da177e4 1249
ae99ddbc
RK		 1250 if (sachip->pdata && sachip->pdata->enable)
1251 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1252
1253 if (ret == 0) {
1254 spin_lock_irqsave(&sachip->lock, flags);
1255 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1256 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1257 spin_unlock_irqrestore(&sachip->lock, flags);
1258 }
1259 return ret;
1da177e4 1260}
0a4bc5e8 1261EXPORT_SYMBOL(sa1111_enable_device);
1da177e4
LT		 1262
1263/**
1264 * sa1111_disable_device - disable an on-chip SA1111 function block
1265 * @sadev: SA1111 function block device to disable
1266 */
1267void sa1111_disable_device(struct sa1111_dev *sadev)
1268{
1269 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1270 unsigned long flags;
1271 unsigned int val;
1272
1273 spin_lock_irqsave(&sachip->lock, flags);
1274 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1275 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1276 spin_unlock_irqrestore(&sachip->lock, flags);
ae99ddbc
RK		 1277
1278 if (sachip->pdata && sachip->pdata->disable)
1279 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1da177e4 1280}
0a4bc5e8 1281EXPORT_SYMBOL(sa1111_disable_device);
1da177e4
LT		 1282
1283/*
1284 * SA1111 "Register Access Bus."
1285 *
1286 * We model this as a regular bus type, and hang devices directly
1287 * off this.
1288 */
1289static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1290{
1291 struct sa1111_dev *dev = SA1111_DEV(_dev);
1292 struct sa1111_driver *drv = SA1111_DRV(_drv);
1293
e5c0fc41 1294 return dev->devid & drv->devid;
1da177e4
LT		 1295}
1296
1297static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1298{
1299 struct sa1111_dev *sadev = SA1111_DEV(dev);
1300 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1301 int ret = 0;
1302
1303 if (drv && drv->suspend)
1304 ret = drv->suspend(sadev, state);
1305 return ret;
1306}
1307
1308static int sa1111_bus_resume(struct device *dev)
1309{
1310 struct sa1111_dev *sadev = SA1111_DEV(dev);
1311 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1312 int ret = 0;
1313
1314 if (drv && drv->resume)
1315 ret = drv->resume(sadev);
1316 return ret;
1317}
1318
6bd72f05
RK		 1319static void sa1111_bus_shutdown(struct device *dev)
1320{
1321 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1322
1323 if (drv && drv->shutdown)
1324 drv->shutdown(SA1111_DEV(dev));
1325}
1326
1da177e4
LT		 1327static int sa1111_bus_probe(struct device *dev)
1328{
1329 struct sa1111_dev *sadev = SA1111_DEV(dev);
1330 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1331 int ret = -ENODEV;
1332
1333 if (drv->probe)
1334 ret = drv->probe(sadev);
1335 return ret;
1336}
1337
1338static int sa1111_bus_remove(struct device *dev)
1339{
1340 struct sa1111_dev *sadev = SA1111_DEV(dev);
1341 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1342 int ret = 0;
1343
1344 if (drv->remove)
1345 ret = drv->remove(sadev);
1346 return ret;
1347}
1348
1349struct bus_type sa1111_bus_type = {
1350 .name = "sa1111-rab",
1351 .match = sa1111_match,
2876ba43
RK		 1352 .probe = sa1111_bus_probe,
1353 .remove = sa1111_bus_remove,
1da177e4
LT		 1354 .suspend = sa1111_bus_suspend,
1355 .resume = sa1111_bus_resume,
6bd72f05 1356 .shutdown = sa1111_bus_shutdown,
1da177e4 1357};
0a4bc5e8 1358EXPORT_SYMBOL(sa1111_bus_type);
1da177e4
LT		 1359
1360int sa1111_driver_register(struct sa1111_driver *driver)
1361{
1da177e4
LT		 1362 driver->drv.bus = &sa1111_bus_type;
1363 return driver_register(&driver->drv);
1364}
0a4bc5e8 1365EXPORT_SYMBOL(sa1111_driver_register);
1da177e4
LT		 1366
1367void sa1111_driver_unregister(struct sa1111_driver *driver)
1368{
1369 driver_unregister(&driver->drv);
1370}
0a4bc5e8 1371EXPORT_SYMBOL(sa1111_driver_unregister);
1da177e4 1372
09a2ba2f
RK		 1373#ifdef CONFIG_DMABOUNCE
1374/*
1375 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
1376 * Chip Specification Update" (June 2000), erratum #7, there is a
1377 * significant bug in the SA1111 SDRAM shared memory controller. If
1378 * an access to a region of memory above 1MB relative to the bank base,
1379 * it is important that address bit 10 _NOT_ be asserted. Depending
1380 * on the configuration of the RAM, bit 10 may correspond to one
1381 * of several different (processor-relative) address bits.
1382 *
1383 * This routine only identifies whether or not a given DMA address
1384 * is susceptible to the bug.
1385 *
1386 * This should only get called for sa1111_device types due to the
1387 * way we configure our device dma_masks.
1388 */
1389static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
1390{
1391 /*
1392 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
1393 * User's Guide" mentions that jumpers R51 and R52 control the
1394 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
1395 * SDRAM bank 1 on Neponset). The default configuration selects
1396 * Assabet, so any address in bank 1 is necessarily invalid.
1397 */
1398 return (machine_is_assabet() || machine_is_pfs168()) &&
1399 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
1400}
1401
1402static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
1403 void *data)
1404{
1405 struct sa1111_dev *dev = SA1111_DEV(data);
1406
1407 switch (action) {
1408 case BUS_NOTIFY_ADD_DEVICE:
1409 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
1410 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
1411 sa1111_needs_bounce);
1412 if (ret)
1413 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
1414 }
1415 break;
1416
1417 case BUS_NOTIFY_DEL_DEVICE:
1418 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
1419 dmabounce_unregister_dev(&dev->dev);
1420 break;
1421 }
1422 return NOTIFY_OK;
1423}
1424
1425static struct notifier_block sa1111_bus_notifier = {
1426 .notifier_call = sa1111_notifier_call,
1427};
1428#endif
1429
1da177e4
LT		 1430static int __init sa1111_init(void)
1431{
1432 int ret = bus_register(&sa1111_bus_type);
09a2ba2f
RK		 1433#ifdef CONFIG_DMABOUNCE
1434 if (ret == 0)
1435 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1436#endif
1da177e4 1437 if (ret == 0)
3ae5eaec 1438 platform_driver_register(&sa1111_device_driver);
1da177e4
LT		 1439 return ret;
1440}
1441
1442static void __exit sa1111_exit(void)
1443{
3ae5eaec 1444 platform_driver_unregister(&sa1111_device_driver);
09a2ba2f
RK		 1445#ifdef CONFIG_DMABOUNCE
1446 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1447#endif
1da177e4
LT		 1448 bus_unregister(&sa1111_bus_type);
1449}
1450
72724382 1451subsys_initcall(sa1111_init);
1da177e4
LT		 1452module_exit(sa1111_exit);
1453
1454MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1455MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)