[linux-2.6-block.git] / arch / arm / boot / dts / zynq-parallella.dts

/*
 * Copyright (c) 2014 SUSE LINUX Products GmbH
 *
 * Derived from zynq-zed.dts:
 *
 *  Copyright (C) 2011 Xilinx
 *  Copyright (C) 2012 National Instruments Corp.
 *  Copyright (C) 2013 Xilinx
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
/dts-v1/;
/include/ "zynq-7000.dtsi"

/ {
	model = "Adapteva Parallella Board";
	compatible = "adapteva,parallella", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		serial0 = &uart1;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};

	chosen {
		bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
		stdout-path = "serial0:115200n8";
	};
};

&clkc {
	fclk-enable = <0xf>;
	ps-clk-frequency = <33333333>;
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@0 {
		/* Marvell 88E1318 */
		compatible = "ethernet-phy-id0141.0e90",
		             "ethernet-phy-ieee802.3-c22";
		reg = <0>;
		device_type = "ethernet-phy";
		marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
		                   <0x3 0x11 0xfff0 0xa>;
	};
};

&i2c0 {
	status = "okay";

	isl9305: isl9305@68 {
		compatible = "isil,isl9305";
		reg = <0x68>;

		regulators {
			dcd1 {
				regulator-name = "VDD_DSP";
				regulator-always-on;
			};
			dcd2 {
				regulator-name = "1P35V";
				regulator-always-on;
			};
			ldo1 {
				regulator-name = "VDD_ADJ";
			};
			ldo2 {
				regulator-name = "VDD_GPIO";
				regulator-always-on;
			};
		};
	};
};

&sdhci1 {
	status = "okay";
};

&uart1 {
	status = "okay";
};
Commit	Line	Data
6726e3ed AF	1	/*
	2	* Copyright (c) 2014 SUSE LINUX Products GmbH
	3	*
	4	* Derived from zynq-zed.dts:
	5	*
	6	* Copyright (C) 2011 Xilinx
	7	* Copyright (C) 2012 National Instruments Corp.
	8	* Copyright (C) 2013 Xilinx
	9	*
	10	* This software is licensed under the terms of the GNU General Public
	11	* License version 2, as published by the Free Software Foundation, and
	12	* may be copied, distributed, and modified under those terms.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*/
	19	/dts-v1/;
	20	/include/ "zynq-7000.dtsi"
	21
	22	/ {
	23	model = "Adapteva Parallella Board";
	24	compatible = "adapteva,parallella", "xlnx,zynq-7000";
	25
1b654bc9 MS	26	aliases {
	27	ethernet0 = &gem0;
	28	serial0 = &uart1;
	29	};
	30
da457d57	31	memory@0 {
6726e3ed	32	device_type = "memory";
b65186da	33	reg = <0x0 0x40000000>;
6726e3ed AF	34	};
	35
	36	chosen {
21ad06cc	37	bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
2221043b	38	stdout-path = "serial0:115200n8";
6726e3ed AF	39	};
	40	};
	41
92c9e0c7 AF	42	&clkc {
92c9e0c7 AF	43	fclk-enable = <0xf>;
8c7634c0	44	ps-clk-frequency = <33333333>;
92c9e0c7 AF	45	};
92c9e0c7 AF	46
6726e3ed AF	47	&gem0 {
	48	status = "okay";
	49	phy-mode = "rgmii-id";
	50	phy-handle = <&ethernet_phy>;
6726e3ed AF	51
	52	ethernet_phy: ethernet-phy@0 {
	53	/* Marvell 88E1318 */
	54	compatible = "ethernet-phy-id0141.0e90",
	55	"ethernet-phy-ieee802.3-c22";
	56	reg = <0>;
e5e6f687	57	device_type = "ethernet-phy";
6726e3ed AF	58	marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
	59	<0x3 0x11 0xfff0 0xa>;
	60	};
	61	};
	62
	63	&i2c0 {
	64	status = "okay";
6f752f70 MB	65
6f752f70 MB	66	isl9305: isl9305@68 {
b4770fe5	67	compatible = "isil,isl9305";
6f752f70 MB	68	reg = <0x68>;
	69
	70	regulators {
	71	dcd1 {
	72	regulator-name = "VDD_DSP";
	73	regulator-always-on;
	74	};
	75	dcd2 {
	76	regulator-name = "1P35V";
	77	regulator-always-on;
	78	};
	79	ldo1 {
	80	regulator-name = "VDD_ADJ";
	81	};
	82	ldo2 {
	83	regulator-name = "VDD_GPIO";
	84	regulator-always-on;
	85	};
	86	};
	87	};
6726e3ed AF	88	};
	89
	90	&sdhci1 {
	91	status = "okay";
	92	};
	93
	94	&uart1 {
	95	status = "okay";
	96	};