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efb45b30 SA |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4a4d45c7 SA |
4 | * This file is dual-licensed: you can use it either under the terms |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13283626 | 13 | * This file is distributed in the hope that it will be useful, |
4a4d45c7 SA |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
13283626 | 18 | * Or, alternatively, |
4a4d45c7 SA |
19 | * |
20 | * b) Permission is hereby granted, free of charge, to any person | |
21 | * obtaining a copy of this software and associated documentation | |
22 | * files (the "Software"), to deal in the Software without | |
13283626 | 23 | * restriction, including without limitation the rights to use, |
4a4d45c7 SA |
24 | * copy, modify, merge, publish, distribute, sublicense, and/or |
25 | * sell copies of the Software, and to permit persons to whom the | |
26 | * Software is furnished to do so, subject to the following | |
27 | * conditions: | |
28 | * | |
29 | * The above copyright notice and this permission notice shall be | |
30 | * included in all copies or substantial portions of the Software. | |
31 | * | |
13283626 | 32 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
4a4d45c7 SA |
33 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
34 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
35 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
13283626 | 36 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
4a4d45c7 SA |
37 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
38 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
39 | * OTHER DEALINGS IN THE SOFTWARE. | |
efb45b30 SA |
40 | */ |
41 | ||
42 | #include "vf610-pinfunc.h" | |
43 | #include <dt-bindings/clock/vf610-clock.h> | |
44 | #include <dt-bindings/interrupt-controller/irq.h> | |
2b36bda3 | 45 | #include <dt-bindings/gpio/gpio.h> |
efb45b30 SA |
46 | |
47 | / { | |
48 | aliases { | |
49 | can0 = &can0; | |
50 | can1 = &can1; | |
17566c72 SA |
51 | ethernet0 = &fec0; |
52 | ethernet1 = &fec1; | |
efb45b30 SA |
53 | serial0 = &uart0; |
54 | serial1 = &uart1; | |
55 | serial2 = &uart2; | |
56 | serial3 = &uart3; | |
57 | serial4 = &uart4; | |
58 | serial5 = &uart5; | |
76713954 SA |
59 | gpio0 = &gpio0; |
60 | gpio1 = &gpio1; | |
61 | gpio2 = &gpio2; | |
62 | gpio3 = &gpio3; | |
63 | gpio4 = &gpio4; | |
efb45b30 SA |
64 | usbphy0 = &usbphy0; |
65 | usbphy1 = &usbphy1; | |
66 | }; | |
67 | ||
68 | fxosc: fxosc { | |
69 | compatible = "fixed-clock"; | |
70 | #clock-cells = <0>; | |
71 | clock-frequency = <24000000>; | |
72 | }; | |
73 | ||
74 | sxosc: sxosc { | |
75 | compatible = "fixed-clock"; | |
76 | #clock-cells = <0>; | |
77 | clock-frequency = <32768>; | |
78 | }; | |
79 | ||
0d018d73 SA |
80 | reboot: syscon-reboot { |
81 | compatible = "syscon-reboot"; | |
82 | regmap = <&src>; | |
83 | offset = <0x0>; | |
84 | mask = <0x1000>; | |
85 | }; | |
86 | ||
94fb15de FE |
87 | iio-hwmon { |
88 | compatible = "iio-hwmon"; | |
89 | io-channels = <&adc0 16>, <&adc1 16>; | |
90 | }; | |
91 | ||
efb45b30 SA |
92 | soc { |
93 | #address-cells = <1>; | |
94 | #size-cells = <1>; | |
95 | compatible = "simple-bus"; | |
c09d0f7c | 96 | interrupt-parent = <&mscm_ir>; |
efb45b30 SA |
97 | ranges; |
98 | ||
99 | aips0: aips-bus@40000000 { | |
100 | compatible = "fsl,aips-bus", "simple-bus"; | |
101 | #address-cells = <1>; | |
102 | #size-cells = <1>; | |
ef4a4e14 | 103 | reg = <0x40000000 0x00070000>; |
efb45b30 SA |
104 | ranges; |
105 | ||
c09d0f7c SA |
106 | mscm_cpucfg: cpucfg@40001000 { |
107 | compatible = "fsl,vf610-mscm-cpucfg", "syscon"; | |
108 | reg = <0x40001000 0x800>; | |
109 | }; | |
110 | ||
111 | mscm_ir: interrupt-controller@40001800 { | |
112 | compatible = "fsl,vf610-mscm-ir"; | |
113 | reg = <0x40001800 0x400>; | |
114 | fsl,cpucfg = <&mscm_cpucfg>; | |
115 | interrupt-controller; | |
116 | #interrupt-cells = <2>; | |
117 | }; | |
118 | ||
efb45b30 SA |
119 | edma0: dma-controller@40018000 { |
120 | #dma-cells = <2>; | |
121 | compatible = "fsl,vf610-edma"; | |
122 | reg = <0x40018000 0x2000>, | |
123 | <0x40024000 0x1000>, | |
124 | <0x40025000 0x1000>; | |
125 | dma-channels = <32>; | |
c09d0f7c SA |
126 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, |
127 | <9 IRQ_TYPE_LEVEL_HIGH>; | |
128 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
129 | clock-names = "dmamux0", "dmamux1"; |
130 | clocks = <&clks VF610_CLK_DMAMUX0>, | |
131 | <&clks VF610_CLK_DMAMUX1>; | |
132 | status = "disabled"; | |
133 | }; | |
134 | ||
135 | can0: flexcan@40020000 { | |
136 | compatible = "fsl,vf610-flexcan"; | |
137 | reg = <0x40020000 0x4000>; | |
c09d0f7c | 138 | interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
139 | clocks = <&clks VF610_CLK_FLEXCAN0>, |
140 | <&clks VF610_CLK_FLEXCAN0>; | |
141 | clock-names = "ipg", "per"; | |
142 | status = "disabled"; | |
143 | }; | |
144 | ||
145 | uart0: serial@40027000 { | |
146 | compatible = "fsl,vf610-lpuart"; | |
147 | reg = <0x40027000 0x1000>; | |
c09d0f7c | 148 | interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
149 | clocks = <&clks VF610_CLK_UART0>; |
150 | clock-names = "ipg"; | |
151 | dmas = <&edma0 0 2>, | |
152 | <&edma0 0 3>; | |
153 | dma-names = "rx","tx"; | |
154 | status = "disabled"; | |
155 | }; | |
156 | ||
157 | uart1: serial@40028000 { | |
158 | compatible = "fsl,vf610-lpuart"; | |
159 | reg = <0x40028000 0x1000>; | |
c09d0f7c | 160 | interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
161 | clocks = <&clks VF610_CLK_UART1>; |
162 | clock-names = "ipg"; | |
163 | dmas = <&edma0 0 4>, | |
164 | <&edma0 0 5>; | |
165 | dma-names = "rx","tx"; | |
166 | status = "disabled"; | |
167 | }; | |
168 | ||
169 | uart2: serial@40029000 { | |
170 | compatible = "fsl,vf610-lpuart"; | |
171 | reg = <0x40029000 0x1000>; | |
c09d0f7c | 172 | interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
173 | clocks = <&clks VF610_CLK_UART2>; |
174 | clock-names = "ipg"; | |
175 | dmas = <&edma0 0 6>, | |
176 | <&edma0 0 7>; | |
177 | dma-names = "rx","tx"; | |
178 | status = "disabled"; | |
179 | }; | |
180 | ||
181 | uart3: serial@4002a000 { | |
182 | compatible = "fsl,vf610-lpuart"; | |
183 | reg = <0x4002a000 0x1000>; | |
c09d0f7c | 184 | interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
185 | clocks = <&clks VF610_CLK_UART3>; |
186 | clock-names = "ipg"; | |
187 | dmas = <&edma0 0 8>, | |
188 | <&edma0 0 9>; | |
189 | dma-names = "rx","tx"; | |
190 | status = "disabled"; | |
191 | }; | |
192 | ||
193 | dspi0: dspi0@4002c000 { | |
194 | #address-cells = <1>; | |
195 | #size-cells = <0>; | |
196 | compatible = "fsl,vf610-dspi"; | |
197 | reg = <0x4002c000 0x1000>; | |
c09d0f7c | 198 | interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
199 | clocks = <&clks VF610_CLK_DSPI0>; |
200 | clock-names = "dspi"; | |
897ed0ca | 201 | spi-num-chipselects = <6>; |
14c41633 SM |
202 | dmas = <&edma1 1 12>, |
203 | <&edma1 1 13>; | |
204 | dma-names = "rx", "tx"; | |
efb45b30 SA |
205 | status = "disabled"; |
206 | }; | |
207 | ||
1b545c17 BD |
208 | dspi1: dspi1@4002d000 { |
209 | #address-cells = <1>; | |
210 | #size-cells = <0>; | |
211 | compatible = "fsl,vf610-dspi"; | |
212 | reg = <0x4002d000 0x1000>; | |
c09d0f7c | 213 | interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; |
1b545c17 BD |
214 | clocks = <&clks VF610_CLK_DSPI1>; |
215 | clock-names = "dspi"; | |
897ed0ca | 216 | spi-num-chipselects = <4>; |
14c41633 SM |
217 | dmas = <&edma1 1 14>, |
218 | <&edma1 1 15>; | |
219 | dma-names = "rx", "tx"; | |
1b545c17 BD |
220 | status = "disabled"; |
221 | }; | |
222 | ||
26a91d89 SA |
223 | sai0: sai@4002f000 { |
224 | compatible = "fsl,vf610-sai"; | |
225 | reg = <0x4002f000 0x1000>; | |
226 | interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; | |
227 | clocks = <&clks VF610_CLK_SAI0>, | |
228 | <&clks VF610_CLK_SAI0_DIV>, | |
229 | <&clks 0>, <&clks 0>; | |
230 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
231 | dma-names = "tx", "rx"; | |
232 | dmas = <&edma0 0 17>, | |
233 | <&edma0 0 16>; | |
234 | status = "disabled"; | |
235 | }; | |
236 | ||
237 | sai1: sai@40030000 { | |
238 | compatible = "fsl,vf610-sai"; | |
239 | reg = <0x40030000 0x1000>; | |
240 | interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; | |
241 | clocks = <&clks VF610_CLK_SAI1>, | |
242 | <&clks VF610_CLK_SAI1_DIV>, | |
243 | <&clks 0>, <&clks 0>; | |
244 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
245 | dma-names = "tx", "rx"; | |
246 | dmas = <&edma0 0 19>, | |
247 | <&edma0 0 18>; | |
248 | status = "disabled"; | |
249 | }; | |
250 | ||
efb45b30 SA |
251 | sai2: sai@40031000 { |
252 | compatible = "fsl,vf610-sai"; | |
253 | reg = <0x40031000 0x1000>; | |
c09d0f7c | 254 | interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; |
531ee1f4 SA |
255 | clocks = <&clks VF610_CLK_SAI2>, |
256 | <&clks VF610_CLK_SAI2_DIV>, | |
257 | <&clks 0>, <&clks 0>; | |
258 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
efb45b30 SA |
259 | dma-names = "tx", "rx"; |
260 | dmas = <&edma0 0 21>, | |
261 | <&edma0 0 20>; | |
262 | status = "disabled"; | |
263 | }; | |
264 | ||
26a91d89 SA |
265 | sai3: sai@40032000 { |
266 | compatible = "fsl,vf610-sai"; | |
267 | reg = <0x40032000 0x1000>; | |
268 | interrupts = <87 IRQ_TYPE_LEVEL_HIGH>; | |
269 | clocks = <&clks VF610_CLK_SAI3>, | |
270 | <&clks VF610_CLK_SAI3_DIV>, | |
271 | <&clks 0>, <&clks 0>; | |
272 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
273 | dma-names = "tx", "rx"; | |
274 | dmas = <&edma0 1 9>, | |
275 | <&edma0 1 8>; | |
276 | status = "disabled"; | |
277 | }; | |
278 | ||
efb45b30 SA |
279 | pit: pit@40037000 { |
280 | compatible = "fsl,vf610-pit"; | |
281 | reg = <0x40037000 0x1000>; | |
c09d0f7c | 282 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
283 | clocks = <&clks VF610_CLK_PIT>; |
284 | clock-names = "pit"; | |
285 | }; | |
286 | ||
287 | pwm0: pwm@40038000 { | |
288 | compatible = "fsl,vf610-ftm-pwm"; | |
289 | #pwm-cells = <3>; | |
290 | reg = <0x40038000 0x1000>; | |
291 | clock-names = "ftm_sys", "ftm_ext", | |
292 | "ftm_fix", "ftm_cnt_clk_en"; | |
293 | clocks = <&clks VF610_CLK_FTM0>, | |
294 | <&clks VF610_CLK_FTM0_EXT_SEL>, | |
295 | <&clks VF610_CLK_FTM0_FIX_SEL>, | |
296 | <&clks VF610_CLK_FTM0_EXT_FIX_EN>; | |
297 | status = "disabled"; | |
298 | }; | |
299 | ||
300 | pwm1: pwm@40039000 { | |
301 | compatible = "fsl,vf610-ftm-pwm"; | |
302 | #pwm-cells = <3>; | |
303 | reg = <0x40039000 0x1000>; | |
304 | clock-names = "ftm_sys", "ftm_ext", | |
305 | "ftm_fix", "ftm_cnt_clk_en"; | |
306 | clocks = <&clks VF610_CLK_FTM1>, | |
307 | <&clks VF610_CLK_FTM1_EXT_SEL>, | |
308 | <&clks VF610_CLK_FTM1_FIX_SEL>, | |
309 | <&clks VF610_CLK_FTM1_EXT_FIX_EN>; | |
310 | status = "disabled"; | |
311 | }; | |
312 | ||
313 | adc0: adc@4003b000 { | |
314 | compatible = "fsl,vf610-adc"; | |
315 | reg = <0x4003b000 0x1000>; | |
c09d0f7c | 316 | interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
317 | clocks = <&clks VF610_CLK_ADC0>; |
318 | clock-names = "adc"; | |
9b1793af | 319 | #io-channel-cells = <1>; |
efb45b30 | 320 | status = "disabled"; |
def0641e SA |
321 | fsl,adck-max-frequency = <30000000>, <40000000>, |
322 | <20000000>; | |
efb45b30 SA |
323 | }; |
324 | ||
1d0fc33f SA |
325 | tcon0: timing-controller@4003d000 { |
326 | compatible = "fsl,vf610-tcon"; | |
327 | reg = <0x4003d000 0x1000>; | |
328 | clocks = <&clks VF610_CLK_TCON0>; | |
329 | clock-names = "ipg"; | |
330 | status = "disabled"; | |
331 | }; | |
332 | ||
c134e09f | 333 | wdoga5: wdog@4003e000 { |
efb45b30 SA |
334 | compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; |
335 | reg = <0x4003e000 0x1000>; | |
c09d0f7c | 336 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
337 | clocks = <&clks VF610_CLK_WDT>; |
338 | clock-names = "wdog"; | |
339 | status = "disabled"; | |
340 | }; | |
341 | ||
342 | qspi0: quadspi@40044000 { | |
343 | #address-cells = <1>; | |
344 | #size-cells = <0>; | |
345 | compatible = "fsl,vf610-qspi"; | |
f4b89232 CT |
346 | reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; |
347 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
c09d0f7c | 348 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
349 | clocks = <&clks VF610_CLK_QSPI0_EN>, |
350 | <&clks VF610_CLK_QSPI0>; | |
351 | clock-names = "qspi_en", "qspi"; | |
352 | status = "disabled"; | |
353 | }; | |
354 | ||
355 | iomuxc: iomuxc@40048000 { | |
356 | compatible = "fsl,vf610-iomuxc"; | |
357 | reg = <0x40048000 0x1000>; | |
efb45b30 SA |
358 | }; |
359 | ||
76713954 | 360 | gpio0: gpio@40049000 { |
efb45b30 SA |
361 | compatible = "fsl,vf610-gpio"; |
362 | reg = <0x40049000 0x1000 0x400ff000 0x40>; | |
363 | gpio-controller; | |
364 | #gpio-cells = <2>; | |
c09d0f7c | 365 | interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
366 | interrupt-controller; |
367 | #interrupt-cells = <2>; | |
368 | gpio-ranges = <&iomuxc 0 0 32>; | |
369 | }; | |
370 | ||
76713954 | 371 | gpio1: gpio@4004a000 { |
efb45b30 SA |
372 | compatible = "fsl,vf610-gpio"; |
373 | reg = <0x4004a000 0x1000 0x400ff040 0x40>; | |
374 | gpio-controller; | |
375 | #gpio-cells = <2>; | |
c09d0f7c | 376 | interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
377 | interrupt-controller; |
378 | #interrupt-cells = <2>; | |
379 | gpio-ranges = <&iomuxc 0 32 32>; | |
380 | }; | |
381 | ||
76713954 | 382 | gpio2: gpio@4004b000 { |
efb45b30 SA |
383 | compatible = "fsl,vf610-gpio"; |
384 | reg = <0x4004b000 0x1000 0x400ff080 0x40>; | |
385 | gpio-controller; | |
386 | #gpio-cells = <2>; | |
c09d0f7c | 387 | interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
388 | interrupt-controller; |
389 | #interrupt-cells = <2>; | |
390 | gpio-ranges = <&iomuxc 0 64 32>; | |
391 | }; | |
392 | ||
76713954 | 393 | gpio3: gpio@4004c000 { |
efb45b30 SA |
394 | compatible = "fsl,vf610-gpio"; |
395 | reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; | |
396 | gpio-controller; | |
397 | #gpio-cells = <2>; | |
c09d0f7c | 398 | interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
399 | interrupt-controller; |
400 | #interrupt-cells = <2>; | |
401 | gpio-ranges = <&iomuxc 0 96 32>; | |
402 | }; | |
403 | ||
76713954 | 404 | gpio4: gpio@4004d000 { |
efb45b30 SA |
405 | compatible = "fsl,vf610-gpio"; |
406 | reg = <0x4004d000 0x1000 0x400ff100 0x40>; | |
407 | gpio-controller; | |
408 | #gpio-cells = <2>; | |
c09d0f7c | 409 | interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
410 | interrupt-controller; |
411 | #interrupt-cells = <2>; | |
412 | gpio-ranges = <&iomuxc 0 128 7>; | |
413 | }; | |
414 | ||
415 | anatop: anatop@40050000 { | |
416 | compatible = "fsl,vf610-anatop", "syscon"; | |
417 | reg = <0x40050000 0x400>; | |
418 | }; | |
419 | ||
420 | usbphy0: usbphy@40050800 { | |
421 | compatible = "fsl,vf610-usbphy"; | |
422 | reg = <0x40050800 0x400>; | |
c09d0f7c | 423 | interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
424 | clocks = <&clks VF610_CLK_USBPHY0>; |
425 | fsl,anatop = <&anatop>; | |
426 | status = "disabled"; | |
427 | }; | |
428 | ||
429 | usbphy1: usbphy@40050c00 { | |
430 | compatible = "fsl,vf610-usbphy"; | |
431 | reg = <0x40050c00 0x400>; | |
c09d0f7c | 432 | interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
433 | clocks = <&clks VF610_CLK_USBPHY1>; |
434 | fsl,anatop = <&anatop>; | |
435 | status = "disabled"; | |
436 | }; | |
437 | ||
1d0fc33f SA |
438 | dcu0: dcu@40058000 { |
439 | compatible = "fsl,vf610-dcu"; | |
440 | reg = <0x40058000 0x1200>; | |
441 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; | |
442 | clocks = <&clks VF610_CLK_DCU0>, | |
443 | <&clks VF610_CLK_DCU0_DIV>; | |
444 | clock-names = "dcu", "pix"; | |
445 | fsl,tcon = <&tcon0>; | |
446 | status = "disabled"; | |
447 | }; | |
448 | ||
efb45b30 SA |
449 | i2c0: i2c@40066000 { |
450 | #address-cells = <1>; | |
451 | #size-cells = <0>; | |
452 | compatible = "fsl,vf610-i2c"; | |
453 | reg = <0x40066000 0x1000>; | |
c09d0f7c | 454 | interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
455 | clocks = <&clks VF610_CLK_I2C0>; |
456 | clock-names = "ipg"; | |
457 | dmas = <&edma0 0 50>, | |
458 | <&edma0 0 51>; | |
459 | dma-names = "rx","tx"; | |
460 | status = "disabled"; | |
461 | }; | |
462 | ||
2d4e4a62 CT |
463 | i2c1: i2c@40067000 { |
464 | #address-cells = <1>; | |
465 | #size-cells = <0>; | |
466 | compatible = "fsl,vf610-i2c"; | |
467 | reg = <0x40067000 0x1000>; | |
468 | interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; | |
469 | clocks = <&clks VF610_CLK_I2C1>; | |
470 | clock-names = "ipg"; | |
471 | dmas = <&edma0 0 52>, | |
472 | <&edma0 0 53>; | |
473 | dma-names = "rx","tx"; | |
474 | status = "disabled"; | |
475 | }; | |
476 | ||
efb45b30 SA |
477 | clks: ccm@4006b000 { |
478 | compatible = "fsl,vf610-ccm"; | |
479 | reg = <0x4006b000 0x1000>; | |
480 | clocks = <&sxosc>, <&fxosc>; | |
481 | clock-names = "sxosc", "fxosc"; | |
482 | #clock-cells = <1>; | |
483 | }; | |
484 | ||
485 | usbdev0: usb@40034000 { | |
486 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
487 | reg = <0x40034000 0x800>; | |
c09d0f7c | 488 | interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
489 | clocks = <&clks VF610_CLK_USBC0>; |
490 | fsl,usbphy = <&usbphy0>; | |
491 | fsl,usbmisc = <&usbmisc0 0>; | |
492 | dr_mode = "peripheral"; | |
493 | status = "disabled"; | |
494 | }; | |
495 | ||
496 | usbmisc0: usb@40034800 { | |
497 | #index-cells = <1>; | |
498 | compatible = "fsl,vf610-usbmisc"; | |
499 | reg = <0x40034800 0x200>; | |
500 | clocks = <&clks VF610_CLK_USBC0>; | |
501 | status = "disabled"; | |
502 | }; | |
0d018d73 SA |
503 | |
504 | src: src@4006e000 { | |
505 | compatible = "fsl,vf610-src", "syscon"; | |
506 | reg = <0x4006e000 0x1000>; | |
53f643d2 | 507 | interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; |
0d018d73 | 508 | }; |
efb45b30 SA |
509 | }; |
510 | ||
511 | aips1: aips-bus@40080000 { | |
512 | compatible = "fsl,aips-bus", "simple-bus"; | |
513 | #address-cells = <1>; | |
514 | #size-cells = <1>; | |
ef4a4e14 | 515 | reg = <0x40080000 0x0007f000>; |
efb45b30 SA |
516 | ranges; |
517 | ||
518 | edma1: dma-controller@40098000 { | |
519 | #dma-cells = <2>; | |
520 | compatible = "fsl,vf610-edma"; | |
521 | reg = <0x40098000 0x2000>, | |
522 | <0x400a1000 0x1000>, | |
523 | <0x400a2000 0x1000>; | |
524 | dma-channels = <32>; | |
c09d0f7c SA |
525 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, |
526 | <11 IRQ_TYPE_LEVEL_HIGH>; | |
527 | interrupt-names = "edma-tx", "edma-err"; | |
efb45b30 SA |
528 | clock-names = "dmamux0", "dmamux1"; |
529 | clocks = <&clks VF610_CLK_DMAMUX2>, | |
530 | <&clks VF610_CLK_DMAMUX3>; | |
531 | status = "disabled"; | |
532 | }; | |
fa8d20c8 AS |
533 | |
534 | ocotp: ocotp@400a5000 { | |
535 | compatible = "fsl,vf610-ocotp"; | |
536 | reg = <0x400a5000 0x1000>; | |
537 | clocks = <&clks VF610_CLK_OCOTP>; | |
538 | }; | |
efb45b30 | 539 | |
8455dd0d | 540 | snvs0: snvs@400a7000 { |
95d739b5 FL |
541 | compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; |
542 | reg = <0x400a7000 0x2000>; | |
8455dd0d | 543 | |
95d739b5 | 544 | snvsrtc: snvs-rtc-lp { |
8455dd0d | 545 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
95d739b5 FL |
546 | regmap = <&snvs0>; |
547 | offset = <0x34>; | |
53f643d2 | 548 | interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; |
8455dd0d SM |
549 | clocks = <&clks VF610_CLK_SNVS>; |
550 | clock-names = "snvs-rtc"; | |
551 | }; | |
552 | }; | |
553 | ||
efb45b30 SA |
554 | uart4: serial@400a9000 { |
555 | compatible = "fsl,vf610-lpuart"; | |
556 | reg = <0x400a9000 0x1000>; | |
c09d0f7c | 557 | interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
558 | clocks = <&clks VF610_CLK_UART4>; |
559 | clock-names = "ipg"; | |
560 | status = "disabled"; | |
561 | }; | |
562 | ||
563 | uart5: serial@400aa000 { | |
564 | compatible = "fsl,vf610-lpuart"; | |
565 | reg = <0x400aa000 0x1000>; | |
c09d0f7c | 566 | interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
567 | clocks = <&clks VF610_CLK_UART5>; |
568 | clock-names = "ipg"; | |
569 | status = "disabled"; | |
570 | }; | |
571 | ||
5f060c71 CT |
572 | dspi2: dspi2@400ac000 { |
573 | #address-cells = <1>; | |
574 | #size-cells = <0>; | |
575 | compatible = "fsl,vf610-dspi"; | |
576 | reg = <0x400ac000 0x1000>; | |
577 | interrupts = <69 IRQ_TYPE_LEVEL_HIGH>; | |
578 | clocks = <&clks VF610_CLK_DSPI2>; | |
579 | clock-names = "dspi"; | |
580 | spi-num-chipselects = <2>; | |
4743ced9 SM |
581 | dmas = <&edma1 0 10>, |
582 | <&edma1 0 11>; | |
583 | dma-names = "rx", "tx"; | |
5f060c71 CT |
584 | status = "disabled"; |
585 | }; | |
586 | ||
587 | dspi3: dspi3@400ad000 { | |
588 | #address-cells = <1>; | |
589 | #size-cells = <0>; | |
590 | compatible = "fsl,vf610-dspi"; | |
591 | reg = <0x400ad000 0x1000>; | |
592 | interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; | |
593 | clocks = <&clks VF610_CLK_DSPI3>; | |
594 | clock-names = "dspi"; | |
595 | spi-num-chipselects = <2>; | |
4743ced9 SM |
596 | dmas = <&edma1 0 12>, |
597 | <&edma1 0 13>; | |
598 | dma-names = "rx", "tx"; | |
5f060c71 CT |
599 | status = "disabled"; |
600 | }; | |
601 | ||
efb45b30 SA |
602 | adc1: adc@400bb000 { |
603 | compatible = "fsl,vf610-adc"; | |
604 | reg = <0x400bb000 0x1000>; | |
c09d0f7c | 605 | interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
606 | clocks = <&clks VF610_CLK_ADC1>; |
607 | clock-names = "adc"; | |
9b1793af | 608 | #io-channel-cells = <1>; |
efb45b30 | 609 | status = "disabled"; |
3fa2f949 SM |
610 | fsl,adck-max-frequency = <30000000>, <40000000>, |
611 | <20000000>; | |
efb45b30 SA |
612 | }; |
613 | ||
3b7816ba CT |
614 | esdhc0: esdhc@400b1000 { |
615 | compatible = "fsl,imx53-esdhc"; | |
616 | reg = <0x400b1000 0x1000>; | |
617 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; | |
618 | clocks = <&clks VF610_CLK_IPG_BUS>, | |
619 | <&clks VF610_CLK_PLATFORM_BUS>, | |
620 | <&clks VF610_CLK_ESDHC0>; | |
621 | clock-names = "ipg", "ahb", "per"; | |
622 | status = "disabled"; | |
623 | }; | |
624 | ||
efb45b30 SA |
625 | esdhc1: esdhc@400b2000 { |
626 | compatible = "fsl,imx53-esdhc"; | |
627 | reg = <0x400b2000 0x1000>; | |
c09d0f7c | 628 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
629 | clocks = <&clks VF610_CLK_IPG_BUS>, |
630 | <&clks VF610_CLK_PLATFORM_BUS>, | |
631 | <&clks VF610_CLK_ESDHC1>; | |
632 | clock-names = "ipg", "ahb", "per"; | |
633 | status = "disabled"; | |
634 | }; | |
635 | ||
636 | usbh1: usb@400b4000 { | |
637 | compatible = "fsl,vf610-usb", "fsl,imx27-usb"; | |
638 | reg = <0x400b4000 0x800>; | |
c09d0f7c | 639 | interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
640 | clocks = <&clks VF610_CLK_USBC1>; |
641 | fsl,usbphy = <&usbphy1>; | |
642 | fsl,usbmisc = <&usbmisc1 0>; | |
643 | dr_mode = "host"; | |
644 | status = "disabled"; | |
645 | }; | |
646 | ||
647 | usbmisc1: usb@400b4800 { | |
648 | #index-cells = <1>; | |
649 | compatible = "fsl,vf610-usbmisc"; | |
650 | reg = <0x400b4800 0x200>; | |
651 | clocks = <&clks VF610_CLK_USBC1>; | |
652 | status = "disabled"; | |
653 | }; | |
654 | ||
655 | ftm: ftm@400b8000 { | |
656 | compatible = "fsl,ftm-timer"; | |
657 | reg = <0x400b8000 0x1000 0x400b9000 0x1000>; | |
c09d0f7c | 658 | interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
659 | clock-names = "ftm-evt", "ftm-src", |
660 | "ftm-evt-counter-en", "ftm-src-counter-en"; | |
661 | clocks = <&clks VF610_CLK_FTM2>, | |
662 | <&clks VF610_CLK_FTM3>, | |
663 | <&clks VF610_CLK_FTM2_EXT_FIX_EN>, | |
664 | <&clks VF610_CLK_FTM3_EXT_FIX_EN>; | |
665 | status = "disabled"; | |
666 | }; | |
667 | ||
6f5e6967 CT |
668 | qspi1: quadspi@400c4000 { |
669 | #address-cells = <1>; | |
670 | #size-cells = <0>; | |
671 | compatible = "fsl,vf610-qspi"; | |
672 | reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; | |
673 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
674 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; | |
675 | clocks = <&clks VF610_CLK_QSPI1_EN>, | |
676 | <&clks VF610_CLK_QSPI1>; | |
677 | clock-names = "qspi_en", "qspi"; | |
678 | status = "disabled"; | |
679 | }; | |
680 | ||
18e75ad2 SM |
681 | dac0: dac@400cc000 { |
682 | compatible = "fsl,vf610-dac"; | |
683 | reg = <0x400cc000 1000>; | |
684 | interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; | |
685 | clock-names = "dac"; | |
686 | clocks = <&clks VF610_CLK_DAC0>; | |
687 | status = "disabled"; | |
688 | }; | |
689 | ||
690 | dac1: dac@400cd000 { | |
691 | compatible = "fsl,vf610-dac"; | |
692 | reg = <0x400cd000 1000>; | |
693 | interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; | |
694 | clock-names = "dac"; | |
695 | clocks = <&clks VF610_CLK_DAC1>; | |
696 | status = "disabled"; | |
697 | }; | |
698 | ||
efb45b30 SA |
699 | fec0: ethernet@400d0000 { |
700 | compatible = "fsl,mvf600-fec"; | |
701 | reg = <0x400d0000 0x1000>; | |
c09d0f7c | 702 | interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
703 | clocks = <&clks VF610_CLK_ENET0>, |
704 | <&clks VF610_CLK_ENET0>, | |
705 | <&clks VF610_CLK_ENET>; | |
706 | clock-names = "ipg", "ahb", "ptp"; | |
707 | status = "disabled"; | |
708 | }; | |
709 | ||
710 | fec1: ethernet@400d1000 { | |
711 | compatible = "fsl,mvf600-fec"; | |
712 | reg = <0x400d1000 0x1000>; | |
c09d0f7c | 713 | interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
714 | clocks = <&clks VF610_CLK_ENET1>, |
715 | <&clks VF610_CLK_ENET1>, | |
716 | <&clks VF610_CLK_ENET>; | |
717 | clock-names = "ipg", "ahb", "ptp"; | |
718 | status = "disabled"; | |
719 | }; | |
720 | ||
721 | can1: flexcan@400d4000 { | |
722 | compatible = "fsl,vf610-flexcan"; | |
723 | reg = <0x400d4000 0x4000>; | |
c09d0f7c | 724 | interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; |
efb45b30 SA |
725 | clocks = <&clks VF610_CLK_FLEXCAN1>, |
726 | <&clks VF610_CLK_FLEXCAN1>; | |
727 | clock-names = "ipg", "per"; | |
728 | status = "disabled"; | |
729 | }; | |
730 | ||
baeeb541 SA |
731 | nfc: nand@400e0000 { |
732 | #address-cells = <1>; | |
733 | #size-cells = <0>; | |
734 | compatible = "fsl,vf610-nfc"; | |
735 | reg = <0x400e0000 0x4000>; | |
736 | interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; | |
737 | clocks = <&clks VF610_CLK_NFC>; | |
738 | clock-names = "nfc"; | |
739 | status = "disabled"; | |
740 | }; | |
741 | ||
2d4e4a62 CT |
742 | i2c2: i2c@400e6000 { |
743 | #address-cells = <1>; | |
744 | #size-cells = <0>; | |
745 | compatible = "fsl,vf610-i2c"; | |
746 | reg = <0x400e6000 0x1000>; | |
747 | interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; | |
748 | clocks = <&clks VF610_CLK_I2C2>; | |
749 | clock-names = "ipg"; | |
750 | dmas = <&edma0 1 36>, | |
751 | <&edma0 1 37>; | |
752 | dma-names = "rx","tx"; | |
753 | status = "disabled"; | |
754 | }; | |
755 | ||
756 | i2c3: i2c@400e7000 { | |
757 | #address-cells = <1>; | |
758 | #size-cells = <0>; | |
759 | compatible = "fsl,vf610-i2c"; | |
760 | reg = <0x400e7000 0x1000>; | |
761 | interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; | |
762 | clocks = <&clks VF610_CLK_I2C3>; | |
763 | clock-names = "ipg"; | |
764 | dmas = <&edma0 1 38>, | |
765 | <&edma0 1 39>; | |
766 | dma-names = "rx","tx"; | |
767 | status = "disabled"; | |
768 | }; | |
efb45b30 SA |
769 | }; |
770 | }; | |
771 | }; |