[linux-2.6-block.git] / arch / arm / boot / dts / vfxxx.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	reboot: syscon-reboot {
		compatible = "syscon-reboot";
		regmap = <&src>;
		offset = <0x0>;
		mask = <0x1000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&mscm_ir>;
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			mscm_cpucfg: cpucfg@40001000 {
				compatible = "fsl,vf610-mscm-cpucfg", "syscon";
				reg = <0x40001000 0x800>;
			};

			mscm_ir: interrupt-controller@40001800 {
				compatible = "fsl,vf610-mscm-ir";
				reg = <0x40001800 0x400>;
				fsl,cpucfg = <&mscm_cpucfg>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				dma-channels = <32>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
						<9 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
				status = "disabled";
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			dspi1: dspi1@4002d000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002d000 0x1000>;
				interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI1>;
				clock-names = "dspi";
				spi-num-chipselects = <5>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI2>;
				clock-names = "sai";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			pwm1: pwm@40039000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40039000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM1>,
					<&clks VF610_CLK_FTM1_EXT_SEL>,
					<&clks VF610_CLK_FTM1_FIX_SEL>,
					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				status = "disabled";
			};

			wdoga5: wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
				status = "disabled";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
			};

			gpio0: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio1: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio2: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio3: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio4: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c1: i2c@40067000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40067000 0x1000>;
				interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C1>;
				clock-names = "ipg";
				dmas = <&edma0 0 52>,
					<&edma0 0 53>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
				status = "disabled";
			};

			src: src@4006e000 {
				compatible = "fsl,vf610-src", "syscon";
				reg = <0x4006e000 0x1000>;
				interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				dma-channels = <32>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
						<11 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
				status = "disabled";
			};

			snvs0: snvs@400a7000 {
			    compatible = "fsl,sec-v4.0-mon", "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x400a7000 0x2000>;

				snvsrtc: snvs-rtc-lp@34 {
					compatible = "fsl,sec-v4.0-mon-rtc-lp";
					reg = <0x34 0x58>;
					interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
					clocks = <&clks VF610_CLK_SNVS>;
					clock-names = "snvs-rtc";
				};
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				status = "disabled";
			};

			esdhc0: esdhc@400b1000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b1000 0x1000>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC0>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
				status = "disabled";
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			qspi1: quadspi@400c4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI1_EN>,
					<&clks VF610_CLK_QSPI1>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@400e6000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e6000 0x1000>;
				interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C2>;
				clock-names = "ipg";
				dmas = <&edma0 1 36>,
					<&edma0 1 37>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c3: i2c@400e7000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e7000 0x1000>;
				interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C3>;
				clock-names = "ipg";
				dmas = <&edma0 1 38>,
					<&edma0 1 39>;
				dma-names = "rx","tx";
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
efb45b30 SA	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "vf610-pinfunc.h"
	11	#include <dt-bindings/clock/vf610-clock.h>
	12	#include <dt-bindings/interrupt-controller/irq.h>
2b36bda3	13	#include <dt-bindings/gpio/gpio.h>
efb45b30 SA	14
	15	/ {
	16	aliases {
	17	can0 = &can0;
	18	can1 = &can1;
	19	serial0 = &uart0;
	20	serial1 = &uart1;
	21	serial2 = &uart2;
	22	serial3 = &uart3;
	23	serial4 = &uart4;
	24	serial5 = &uart5;
76713954 SA	25	gpio0 = &gpio0;
	26	gpio1 = &gpio1;
	27	gpio2 = &gpio2;
	28	gpio3 = &gpio3;
	29	gpio4 = &gpio4;
efb45b30 SA	30	usbphy0 = &usbphy0;
	31	usbphy1 = &usbphy1;
	32	};
	33
	34	fxosc: fxosc {
	35	compatible = "fixed-clock";
	36	#clock-cells = <0>;
	37	clock-frequency = <24000000>;
	38	};
	39
	40	sxosc: sxosc {
	41	compatible = "fixed-clock";
	42	#clock-cells = <0>;
	43	clock-frequency = <32768>;
	44	};
	45
0d018d73 SA	46	reboot: syscon-reboot {
	47	compatible = "syscon-reboot";
	48	regmap = <&src>;
	49	offset = <0x0>;
	50	mask = <0x1000>;
	51	};
	52
efb45b30 SA	53	soc {
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	compatible = "simple-bus";
c09d0f7c	57	interrupt-parent = <&mscm_ir>;
efb45b30 SA	58	ranges;
	59
	60	aips0: aips-bus@40000000 {
	61	compatible = "fsl,aips-bus", "simple-bus";
	62	#address-cells = <1>;
	63	#size-cells = <1>;
	64	ranges;
	65
c09d0f7c SA	66	mscm_cpucfg: cpucfg@40001000 {
	67	compatible = "fsl,vf610-mscm-cpucfg", "syscon";
	68	reg = <0x40001000 0x800>;
	69	};
	70
	71	mscm_ir: interrupt-controller@40001800 {
	72	compatible = "fsl,vf610-mscm-ir";
	73	reg = <0x40001800 0x400>;
	74	fsl,cpucfg = <&mscm_cpucfg>;
	75	interrupt-controller;
	76	#interrupt-cells = <2>;
	77	};
	78
efb45b30 SA	79	edma0: dma-controller@40018000 {
	80	#dma-cells = <2>;
	81	compatible = "fsl,vf610-edma";
	82	reg = <0x40018000 0x2000>,
	83	<0x40024000 0x1000>,
	84	<0x40025000 0x1000>;
	85	dma-channels = <32>;
c09d0f7c SA	86	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
	87	<9 IRQ_TYPE_LEVEL_HIGH>;
	88	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	89	clock-names = "dmamux0", "dmamux1";
	90	clocks = <&clks VF610_CLK_DMAMUX0>,
	91	<&clks VF610_CLK_DMAMUX1>;
	92	status = "disabled";
	93	};
	94
	95	can0: flexcan@40020000 {
	96	compatible = "fsl,vf610-flexcan";
	97	reg = <0x40020000 0x4000>;
c09d0f7c	98	interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	99	clocks = <&clks VF610_CLK_FLEXCAN0>,
	100	<&clks VF610_CLK_FLEXCAN0>;
	101	clock-names = "ipg", "per";
	102	status = "disabled";
	103	};
	104
	105	uart0: serial@40027000 {
	106	compatible = "fsl,vf610-lpuart";
	107	reg = <0x40027000 0x1000>;
c09d0f7c	108	interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	109	clocks = <&clks VF610_CLK_UART0>;
	110	clock-names = "ipg";
	111	dmas = <&edma0 0 2>,
	112	<&edma0 0 3>;
	113	dma-names = "rx","tx";
	114	status = "disabled";
	115	};
	116
	117	uart1: serial@40028000 {
	118	compatible = "fsl,vf610-lpuart";
	119	reg = <0x40028000 0x1000>;
c09d0f7c	120	interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	121	clocks = <&clks VF610_CLK_UART1>;
	122	clock-names = "ipg";
	123	dmas = <&edma0 0 4>,
	124	<&edma0 0 5>;
	125	dma-names = "rx","tx";
	126	status = "disabled";
	127	};
	128
	129	uart2: serial@40029000 {
	130	compatible = "fsl,vf610-lpuart";
	131	reg = <0x40029000 0x1000>;
c09d0f7c	132	interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	133	clocks = <&clks VF610_CLK_UART2>;
	134	clock-names = "ipg";
	135	dmas = <&edma0 0 6>,
	136	<&edma0 0 7>;
	137	dma-names = "rx","tx";
	138	status = "disabled";
	139	};
	140
	141	uart3: serial@4002a000 {
	142	compatible = "fsl,vf610-lpuart";
	143	reg = <0x4002a000 0x1000>;
c09d0f7c	144	interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	145	clocks = <&clks VF610_CLK_UART3>;
	146	clock-names = "ipg";
	147	dmas = <&edma0 0 8>,
	148	<&edma0 0 9>;
	149	dma-names = "rx","tx";
	150	status = "disabled";
	151	};
	152
	153	dspi0: dspi0@4002c000 {
	154	#address-cells = <1>;
	155	#size-cells = <0>;
	156	compatible = "fsl,vf610-dspi";
	157	reg = <0x4002c000 0x1000>;
c09d0f7c	158	interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	159	clocks = <&clks VF610_CLK_DSPI0>;
	160	clock-names = "dspi";
	161	spi-num-chipselects = <5>;
	162	status = "disabled";
	163	};
	164
1b545c17 BD	165	dspi1: dspi1@4002d000 {
	166	#address-cells = <1>;
	167	#size-cells = <0>;
	168	compatible = "fsl,vf610-dspi";
	169	reg = <0x4002d000 0x1000>;
c09d0f7c	170	interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
1b545c17 BD	171	clocks = <&clks VF610_CLK_DSPI1>;
	172	clock-names = "dspi";
	173	spi-num-chipselects = <5>;
	174	status = "disabled";
	175	};
	176
efb45b30 SA	177	sai2: sai@40031000 {
	178	compatible = "fsl,vf610-sai";
	179	reg = <0x40031000 0x1000>;
c09d0f7c	180	interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	181	clocks = <&clks VF610_CLK_SAI2>;
	182	clock-names = "sai";
	183	dma-names = "tx", "rx";
	184	dmas = <&edma0 0 21>,
	185	<&edma0 0 20>;
	186	status = "disabled";
	187	};
	188
	189	pit: pit@40037000 {
	190	compatible = "fsl,vf610-pit";
	191	reg = <0x40037000 0x1000>;
c09d0f7c	192	interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	193	clocks = <&clks VF610_CLK_PIT>;
	194	clock-names = "pit";
	195	};
	196
	197	pwm0: pwm@40038000 {
	198	compatible = "fsl,vf610-ftm-pwm";
	199	#pwm-cells = <3>;
	200	reg = <0x40038000 0x1000>;
	201	clock-names = "ftm_sys", "ftm_ext",
	202	"ftm_fix", "ftm_cnt_clk_en";
	203	clocks = <&clks VF610_CLK_FTM0>,
	204	<&clks VF610_CLK_FTM0_EXT_SEL>,
	205	<&clks VF610_CLK_FTM0_FIX_SEL>,
	206	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	207	status = "disabled";
	208	};
	209
	210	pwm1: pwm@40039000 {
	211	compatible = "fsl,vf610-ftm-pwm";
	212	#pwm-cells = <3>;
	213	reg = <0x40039000 0x1000>;
	214	clock-names = "ftm_sys", "ftm_ext",
	215	"ftm_fix", "ftm_cnt_clk_en";
	216	clocks = <&clks VF610_CLK_FTM1>,
	217	<&clks VF610_CLK_FTM1_EXT_SEL>,
	218	<&clks VF610_CLK_FTM1_FIX_SEL>,
	219	<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
	220	status = "disabled";
	221	};
	222
	223	adc0: adc@4003b000 {
	224	compatible = "fsl,vf610-adc";
	225	reg = <0x4003b000 0x1000>;
c09d0f7c	226	interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	227	clocks = <&clks VF610_CLK_ADC0>;
	228	clock-names = "adc";
	229	status = "disabled";
	230	};
	231
c134e09f	232	wdoga5: wdog@4003e000 {
efb45b30 SA	233	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
efb45b30 SA	234	reg = <0x4003e000 0x1000>;
c09d0f7c	235	interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	236	clocks = <&clks VF610_CLK_WDT>;
	237	clock-names = "wdog";
	238	status = "disabled";
	239	};
	240
	241	qspi0: quadspi@40044000 {
	242	#address-cells = <1>;
	243	#size-cells = <0>;
	244	compatible = "fsl,vf610-qspi";
f4b89232 CT	245	reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
f4b89232 CT	246	reg-names = "QuadSPI", "QuadSPI-memory";
c09d0f7c	247	interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	248	clocks = <&clks VF610_CLK_QSPI0_EN>,
	249	<&clks VF610_CLK_QSPI0>;
	250	clock-names = "qspi_en", "qspi";
	251	status = "disabled";
	252	};
	253
	254	iomuxc: iomuxc@40048000 {
	255	compatible = "fsl,vf610-iomuxc";
	256	reg = <0x40048000 0x1000>;
efb45b30 SA	257	};
efb45b30 SA	258
76713954	259	gpio0: gpio@40049000 {
efb45b30 SA	260	compatible = "fsl,vf610-gpio";
	261	reg = <0x40049000 0x1000 0x400ff000 0x40>;
	262	gpio-controller;
	263	#gpio-cells = <2>;
c09d0f7c	264	interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	265	interrupt-controller;
	266	#interrupt-cells = <2>;
	267	gpio-ranges = <&iomuxc 0 0 32>;
	268	};
	269
76713954	270	gpio1: gpio@4004a000 {
efb45b30 SA	271	compatible = "fsl,vf610-gpio";
	272	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
	273	gpio-controller;
	274	#gpio-cells = <2>;
c09d0f7c	275	interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	276	interrupt-controller;
	277	#interrupt-cells = <2>;
	278	gpio-ranges = <&iomuxc 0 32 32>;
	279	};
	280
76713954	281	gpio2: gpio@4004b000 {
efb45b30 SA	282	compatible = "fsl,vf610-gpio";
	283	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
	284	gpio-controller;
	285	#gpio-cells = <2>;
c09d0f7c	286	interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	287	interrupt-controller;
	288	#interrupt-cells = <2>;
	289	gpio-ranges = <&iomuxc 0 64 32>;
	290	};
	291
76713954	292	gpio3: gpio@4004c000 {
efb45b30 SA	293	compatible = "fsl,vf610-gpio";
	294	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
	295	gpio-controller;
	296	#gpio-cells = <2>;
c09d0f7c	297	interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	298	interrupt-controller;
	299	#interrupt-cells = <2>;
	300	gpio-ranges = <&iomuxc 0 96 32>;
	301	};
	302
76713954	303	gpio4: gpio@4004d000 {
efb45b30 SA	304	compatible = "fsl,vf610-gpio";
	305	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
	306	gpio-controller;
	307	#gpio-cells = <2>;
c09d0f7c	308	interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	309	interrupt-controller;
	310	#interrupt-cells = <2>;
	311	gpio-ranges = <&iomuxc 0 128 7>;
	312	};
	313
	314	anatop: anatop@40050000 {
	315	compatible = "fsl,vf610-anatop", "syscon";
	316	reg = <0x40050000 0x400>;
	317	};
	318
	319	usbphy0: usbphy@40050800 {
	320	compatible = "fsl,vf610-usbphy";
	321	reg = <0x40050800 0x400>;
c09d0f7c	322	interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	323	clocks = <&clks VF610_CLK_USBPHY0>;
	324	fsl,anatop = <&anatop>;
	325	status = "disabled";
	326	};
	327
	328	usbphy1: usbphy@40050c00 {
	329	compatible = "fsl,vf610-usbphy";
	330	reg = <0x40050c00 0x400>;
c09d0f7c	331	interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	332	clocks = <&clks VF610_CLK_USBPHY1>;
	333	fsl,anatop = <&anatop>;
	334	status = "disabled";
	335	};
	336
	337	i2c0: i2c@40066000 {
	338	#address-cells = <1>;
	339	#size-cells = <0>;
	340	compatible = "fsl,vf610-i2c";
	341	reg = <0x40066000 0x1000>;
c09d0f7c	342	interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	343	clocks = <&clks VF610_CLK_I2C0>;
	344	clock-names = "ipg";
	345	dmas = <&edma0 0 50>,
	346	<&edma0 0 51>;
	347	dma-names = "rx","tx";
	348	status = "disabled";
	349	};
	350
2d4e4a62 CT	351	i2c1: i2c@40067000 {
	352	#address-cells = <1>;
	353	#size-cells = <0>;
	354	compatible = "fsl,vf610-i2c";
	355	reg = <0x40067000 0x1000>;
	356	interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
	357	clocks = <&clks VF610_CLK_I2C1>;
	358	clock-names = "ipg";
	359	dmas = <&edma0 0 52>,
	360	<&edma0 0 53>;
	361	dma-names = "rx","tx";
	362	status = "disabled";
	363	};
	364
efb45b30 SA	365	clks: ccm@4006b000 {
	366	compatible = "fsl,vf610-ccm";
	367	reg = <0x4006b000 0x1000>;
	368	clocks = <&sxosc>, <&fxosc>;
	369	clock-names = "sxosc", "fxosc";
	370	#clock-cells = <1>;
	371	};
	372
	373	usbdev0: usb@40034000 {
	374	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	375	reg = <0x40034000 0x800>;
c09d0f7c	376	interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	377	clocks = <&clks VF610_CLK_USBC0>;
	378	fsl,usbphy = <&usbphy0>;
	379	fsl,usbmisc = <&usbmisc0 0>;
	380	dr_mode = "peripheral";
	381	status = "disabled";
	382	};
	383
	384	usbmisc0: usb@40034800 {
	385	#index-cells = <1>;
	386	compatible = "fsl,vf610-usbmisc";
	387	reg = <0x40034800 0x200>;
	388	clocks = <&clks VF610_CLK_USBC0>;
	389	status = "disabled";
	390	};
0d018d73 SA	391
	392	src: src@4006e000 {
	393	compatible = "fsl,vf610-src", "syscon";
	394	reg = <0x4006e000 0x1000>;
53f643d2	395	interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
0d018d73	396	};
efb45b30 SA	397	};
	398
	399	aips1: aips-bus@40080000 {
	400	compatible = "fsl,aips-bus", "simple-bus";
	401	#address-cells = <1>;
	402	#size-cells = <1>;
	403	ranges;
	404
	405	edma1: dma-controller@40098000 {
	406	#dma-cells = <2>;
	407	compatible = "fsl,vf610-edma";
	408	reg = <0x40098000 0x2000>,
	409	<0x400a1000 0x1000>,
	410	<0x400a2000 0x1000>;
	411	dma-channels = <32>;
c09d0f7c SA	412	interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
	413	<11 IRQ_TYPE_LEVEL_HIGH>;
	414	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	415	clock-names = "dmamux0", "dmamux1";
	416	clocks = <&clks VF610_CLK_DMAMUX2>,
	417	<&clks VF610_CLK_DMAMUX3>;
	418	status = "disabled";
	419	};
	420
8455dd0d SM	421	snvs0: snvs@400a7000 {
	422	compatible = "fsl,sec-v4.0-mon", "simple-bus";
	423	#address-cells = <1>;
	424	#size-cells = <1>;
	425	ranges = <0 0x400a7000 0x2000>;
	426
	427	snvsrtc: snvs-rtc-lp@34 {
	428	compatible = "fsl,sec-v4.0-mon-rtc-lp";
	429	reg = <0x34 0x58>;
53f643d2	430	interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
8455dd0d SM	431	clocks = <&clks VF610_CLK_SNVS>;
	432	clock-names = "snvs-rtc";
	433	};
	434	};
	435
efb45b30 SA	436	uart4: serial@400a9000 {
	437	compatible = "fsl,vf610-lpuart";
	438	reg = <0x400a9000 0x1000>;
c09d0f7c	439	interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	440	clocks = <&clks VF610_CLK_UART4>;
	441	clock-names = "ipg";
	442	status = "disabled";
	443	};
	444
	445	uart5: serial@400aa000 {
	446	compatible = "fsl,vf610-lpuart";
	447	reg = <0x400aa000 0x1000>;
c09d0f7c	448	interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	449	clocks = <&clks VF610_CLK_UART5>;
	450	clock-names = "ipg";
	451	status = "disabled";
	452	};
	453
	454	adc1: adc@400bb000 {
	455	compatible = "fsl,vf610-adc";
	456	reg = <0x400bb000 0x1000>;
c09d0f7c	457	interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	458	clocks = <&clks VF610_CLK_ADC1>;
	459	clock-names = "adc";
	460	status = "disabled";
	461	};
	462
3b7816ba CT	463	esdhc0: esdhc@400b1000 {
	464	compatible = "fsl,imx53-esdhc";
	465	reg = <0x400b1000 0x1000>;
	466	interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
	467	clocks = <&clks VF610_CLK_IPG_BUS>,
	468	<&clks VF610_CLK_PLATFORM_BUS>,
	469	<&clks VF610_CLK_ESDHC0>;
	470	clock-names = "ipg", "ahb", "per";
	471	status = "disabled";
	472	};
	473
efb45b30 SA	474	esdhc1: esdhc@400b2000 {
	475	compatible = "fsl,imx53-esdhc";
	476	reg = <0x400b2000 0x1000>;
c09d0f7c	477	interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	478	clocks = <&clks VF610_CLK_IPG_BUS>,
	479	<&clks VF610_CLK_PLATFORM_BUS>,
	480	<&clks VF610_CLK_ESDHC1>;
	481	clock-names = "ipg", "ahb", "per";
	482	status = "disabled";
	483	};
	484
	485	usbh1: usb@400b4000 {
	486	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	487	reg = <0x400b4000 0x800>;
c09d0f7c	488	interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	489	clocks = <&clks VF610_CLK_USBC1>;
	490	fsl,usbphy = <&usbphy1>;
	491	fsl,usbmisc = <&usbmisc1 0>;
	492	dr_mode = "host";
	493	status = "disabled";
	494	};
	495
	496	usbmisc1: usb@400b4800 {
	497	#index-cells = <1>;
	498	compatible = "fsl,vf610-usbmisc";
	499	reg = <0x400b4800 0x200>;
	500	clocks = <&clks VF610_CLK_USBC1>;
	501	status = "disabled";
	502	};
	503
	504	ftm: ftm@400b8000 {
	505	compatible = "fsl,ftm-timer";
	506	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
c09d0f7c	507	interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	508	clock-names = "ftm-evt", "ftm-src",
	509	"ftm-evt-counter-en", "ftm-src-counter-en";
	510	clocks = <&clks VF610_CLK_FTM2>,
	511	<&clks VF610_CLK_FTM3>,
	512	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	513	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	514	status = "disabled";
	515	};
	516
6f5e6967 CT	517	qspi1: quadspi@400c4000 {
	518	#address-cells = <1>;
	519	#size-cells = <0>;
	520	compatible = "fsl,vf610-qspi";
	521	reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
	522	reg-names = "QuadSPI", "QuadSPI-memory";
	523	interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
	524	clocks = <&clks VF610_CLK_QSPI1_EN>,
	525	<&clks VF610_CLK_QSPI1>;
	526	clock-names = "qspi_en", "qspi";
	527	status = "disabled";
	528	};
	529
efb45b30 SA	530	fec0: ethernet@400d0000 {
	531	compatible = "fsl,mvf600-fec";
	532	reg = <0x400d0000 0x1000>;
c09d0f7c	533	interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	534	clocks = <&clks VF610_CLK_ENET0>,
	535	<&clks VF610_CLK_ENET0>,
	536	<&clks VF610_CLK_ENET>;
	537	clock-names = "ipg", "ahb", "ptp";
	538	status = "disabled";
	539	};
	540
	541	fec1: ethernet@400d1000 {
	542	compatible = "fsl,mvf600-fec";
	543	reg = <0x400d1000 0x1000>;
c09d0f7c	544	interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	545	clocks = <&clks VF610_CLK_ENET1>,
	546	<&clks VF610_CLK_ENET1>,
	547	<&clks VF610_CLK_ENET>;
	548	clock-names = "ipg", "ahb", "ptp";
	549	status = "disabled";
	550	};
	551
	552	can1: flexcan@400d4000 {
	553	compatible = "fsl,vf610-flexcan";
	554	reg = <0x400d4000 0x4000>;
c09d0f7c	555	interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	556	clocks = <&clks VF610_CLK_FLEXCAN1>,
	557	<&clks VF610_CLK_FLEXCAN1>;
	558	clock-names = "ipg", "per";
	559	status = "disabled";
	560	};
	561
2d4e4a62 CT	562	i2c2: i2c@400e6000 {
	563	#address-cells = <1>;
	564	#size-cells = <0>;
	565	compatible = "fsl,vf610-i2c";
	566	reg = <0x400e6000 0x1000>;
	567	interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
	568	clocks = <&clks VF610_CLK_I2C2>;
	569	clock-names = "ipg";
	570	dmas = <&edma0 1 36>,
	571	<&edma0 1 37>;
	572	dma-names = "rx","tx";
	573	status = "disabled";
	574	};
	575
	576	i2c3: i2c@400e7000 {
	577	#address-cells = <1>;
	578	#size-cells = <0>;
	579	compatible = "fsl,vf610-i2c";
	580	reg = <0x400e7000 0x1000>;
	581	interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
	582	clocks = <&clks VF610_CLK_I2C3>;
	583	clock-names = "ipg";
	584	dmas = <&edma0 1 38>,
	585	<&edma0 1 39>;
	586	dma-names = "rx","tx";
	587	status = "disabled";
	588	};
efb45b30 SA	589	};
	590	};
	591	};