Commit | Line | Data |
---|---|---|
3ba7222a GL |
1 | /include/ "versatile-ab.dts" |
2 | ||
3 | / { | |
4 | model = "ARM Versatile PB"; | |
5 | compatible = "arm,versatile-pb"; | |
6 | ||
7 | amba { | |
8 | gpio2: gpio@101e6000 { | |
9 | compatible = "arm,pl061", "arm,primecell"; | |
10 | reg = <0x101e6000 0x1000>; | |
11 | interrupts = <8>; | |
12 | gpio-controller; | |
13 | #gpio-cells = <2>; | |
14 | interrupt-controller; | |
15 | #interrupt-cells = <2>; | |
16 | }; | |
17 | ||
18 | gpio3: gpio@101e7000 { | |
19 | compatible = "arm,pl061", "arm,primecell"; | |
20 | reg = <0x101e7000 0x1000>; | |
21 | interrupts = <9>; | |
22 | gpio-controller; | |
23 | #gpio-cells = <2>; | |
24 | interrupt-controller; | |
25 | #interrupt-cells = <2>; | |
26 | }; | |
27 | ||
28 | fpga { | |
29 | uart@9000 { | |
30 | compatible = "arm,pl011", "arm,primecell"; | |
31 | reg = <0x9000 0x1000>; | |
32 | interrupt-parent = <&sic>; | |
33 | interrupts = <6>; | |
34 | }; | |
35 | sci@a000 { | |
36 | compatible = "arm,primecell"; | |
37 | reg = <0xa000 0x1000>; | |
38 | interrupt-parent = <&sic>; | |
39 | interrupts = <5>; | |
40 | }; | |
41 | mmc@b000 { | |
42 | compatible = "arm,primecell"; | |
43 | reg = <0xb000 0x1000>; | |
44 | interrupts = <23>; | |
45 | }; | |
46 | }; | |
47 | }; | |
48 | }; | |
53a42093 GL |
49 | |
50 | /include/ "testcases/tests.dtsi" |