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30fd611a SL |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/ | |
4 | * | |
5 | * Authors: SZ Lin (林上智) <sz.lin@moxa.com> | |
6 | * Wes Huang (黃淵河) <wes.huang@moxa.com> | |
7 | * Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com> | |
8 | */ | |
9 | ||
10 | #include "am33xx.dtsi" | |
11 | ||
12 | / { | |
13 | vbat: vbat-regulator { | |
14 | compatible = "regulator-fixed"; | |
15 | }; | |
16 | ||
17 | /* Power supply provides a fixed 3.3V @3A */ | |
18 | vmmcsd_fixed: vmmcsd-regulator { | |
cfc35a16 KK |
19 | compatible = "regulator-fixed"; |
20 | regulator-name = "vmmcsd_fixed"; | |
21 | regulator-min-microvolt = <3300000>; | |
22 | regulator-max-microvolt = <3300000>; | |
23 | regulator-boot-on; | |
30fd611a SL |
24 | }; |
25 | ||
26 | buttons: push_button { | |
27 | compatible = "gpio-keys"; | |
28 | }; | |
29 | }; | |
30 | ||
31 | &am33xx_pinmux { | |
32 | pinctrl-names = "default"; | |
33 | ||
d73ab823 | 34 | i2c0_pins: i2c0-pins { |
30fd611a | 35 | pinctrl-single,pins = < |
876144dd CQ |
36 | AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) |
37 | AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) | |
30fd611a SL |
38 | >; |
39 | }; | |
40 | ||
d73ab823 | 41 | push_button_pins: push-button-pins { |
30fd611a | 42 | pinctrl-single,pins = < |
876144dd | 43 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_23 */ |
30fd611a SL |
44 | >; |
45 | }; | |
46 | ||
d73ab823 | 47 | uart0_pins: uart0-pins { |
30fd611a | 48 | pinctrl-single,pins = < |
876144dd CQ |
49 | AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
50 | AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) | |
30fd611a SL |
51 | >; |
52 | }; | |
53 | ||
d73ab823 | 54 | davinci_mdio_default: davinci-mdio-default-pins { |
30fd611a SL |
55 | pinctrl-single,pins = < |
56 | /* MDIO */ | |
876144dd CQ |
57 | AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
58 | AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) | |
30fd611a SL |
59 | >; |
60 | }; | |
61 | ||
d73ab823 | 62 | mmc1_pins_default: mmc1-pins { |
30fd611a SL |
63 | pinctrl-single,pins = < |
64 | /* eMMC */ | |
876144dd CQ |
65 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad12.mmc1_dat0 */ |
66 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad13.mmc1_dat1 */ | |
67 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad14.mmc1_dat2 */ | |
68 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad15.mmc1_dat3 */ | |
69 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad8.mmc1_dat4 */ | |
70 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad9.mmc1_dat5 */ | |
71 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad10.mmc1_dat6 */ | |
72 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad11.mmc1_dat7 */ | |
73 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
74 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
30fd611a SL |
75 | >; |
76 | }; | |
77 | ||
d73ab823 | 78 | spi0_pins: spi0-pins { |
30fd611a | 79 | pinctrl-single,pins = < |
876144dd CQ |
80 | AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
81 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) | |
82 | AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) | |
83 | AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) | |
30fd611a SL |
84 | >; |
85 | }; | |
86 | }; | |
87 | ||
88 | &uart0 { | |
89 | /* Console */ | |
90 | status = "okay"; | |
91 | pinctrl-names = "default"; | |
92 | pinctrl-0 = <&uart0_pins>; | |
93 | }; | |
94 | ||
95 | &i2c0 { | |
96 | pinctrl-names = "default"; | |
97 | pinctrl-0 = <&i2c0_pins>; | |
98 | ||
99 | status = "okay"; | |
100 | clock-frequency = <400000>; | |
101 | ||
102 | eeprom: eeprom@50 { | |
103 | compatible = "atmel,24c16"; | |
104 | pagesize = <16>; | |
105 | reg = <0x50>; | |
106 | }; | |
107 | ||
108 | rtc_wdt: rtc_wdt@68 { | |
109 | compatible = "dallas,ds1374"; | |
110 | reg = <0x68>; | |
111 | }; | |
112 | }; | |
113 | ||
30fd611a | 114 | &usb0 { |
30fd611a SL |
115 | dr_mode = "host"; |
116 | }; | |
117 | ||
30fd611a SL |
118 | /* Power */ |
119 | &vbat { | |
120 | regulator-name = "vbat"; | |
121 | regulator-min-microvolt = <5000000>; | |
122 | regulator-max-microvolt = <5000000>; | |
123 | }; | |
124 | ||
5578b730 | 125 | &mac_sw { |
30fd611a SL |
126 | pinctrl-names = "default"; |
127 | pinctrl-0 = <&cpsw_default>; | |
128 | status = "okay"; | |
129 | }; | |
130 | ||
5578b730 | 131 | &davinci_mdio_sw { |
30fd611a SL |
132 | pinctrl-names = "default"; |
133 | pinctrl-0 = <&davinci_mdio_default>; | |
134 | status = "okay"; | |
135 | }; | |
136 | ||
5578b730 GS |
137 | &cpsw_port1 { |
138 | ti,dual-emac-pvid = <1>; | |
30fd611a SL |
139 | }; |
140 | ||
5578b730 GS |
141 | &cpsw_port2 { |
142 | ti,dual-emac-pvid = <2>; | |
30fd611a SL |
143 | }; |
144 | ||
30fd611a SL |
145 | &sham { |
146 | status = "okay"; | |
147 | }; | |
148 | ||
149 | &aes { | |
150 | status = "okay"; | |
151 | }; | |
152 | ||
d7d30b8f | 153 | &gpio0_target { |
30fd611a SL |
154 | ti,no-reset-on-init; |
155 | }; | |
156 | ||
157 | &mmc2 { | |
158 | pinctrl-names = "default"; | |
159 | vmmc-supply = <&vmmcsd_fixed>; | |
160 | bus-width = <8>; | |
161 | pinctrl-0 = <&mmc1_pins_default>; | |
0b4edf11 | 162 | non-removable; |
30fd611a SL |
163 | status = "okay"; |
164 | }; | |
165 | ||
166 | &buttons { | |
167 | pinctrl-names = "default"; | |
168 | pinctrl-0 = <&push_button_pins>; | |
30fd611a | 169 | |
54ab5f36 | 170 | button-0 { |
30fd611a SL |
171 | label = "push_button"; |
172 | linux,code = <0x100>; | |
173 | gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; | |
174 | }; | |
175 | }; | |
176 | ||
177 | /* SPI Busses */ | |
178 | &spi0 { | |
179 | status = "okay"; | |
180 | pinctrl-names = "default"; | |
181 | pinctrl-0 = <&spi0_pins>; | |
182 | ||
d8e5c884 | 183 | flash@0 { |
30fd611a SL |
184 | compatible = "mx25l6405d"; |
185 | spi-max-frequency = <40000000>; | |
186 | ||
187 | reg = <0>; | |
188 | spi-cpol; | |
189 | spi-cpha; | |
190 | ||
191 | partitions { | |
192 | compatible = "fixed-partitions"; | |
193 | #address-cells = <1>; | |
194 | #size-cells = <1>; | |
195 | ||
196 | /* reg : The partition's offset and size within the mtd bank. */ | |
197 | partitions@0 { | |
198 | label = "MLO"; | |
199 | reg = <0x0 0x80000>; | |
200 | }; | |
201 | ||
202 | partitions@1 { | |
203 | label = "U-Boot"; | |
204 | reg = <0x80000 0x100000>; | |
205 | }; | |
206 | ||
207 | partitions@2 { | |
208 | label = "U-Boot Env"; | |
209 | reg = <0x180000 0x40000>; | |
210 | }; | |
211 | }; | |
212 | }; | |
213 | }; | |
214 | ||
215 | &spi1 { | |
216 | status = "okay"; | |
217 | pinctrl-names = "default"; | |
218 | pinctrl-0 = <&spi1_pins>; | |
219 | ||
8412c47d | 220 | tpm@0 { |
30fd611a SL |
221 | compatible = "tcg,tpm_tis-spi"; |
222 | reg = <0>; | |
223 | spi-max-frequency = <500000>; | |
224 | }; | |
225 | }; |