[linux-2.6-block.git] / arch / arm / boot / dts / tegra20-paz00.dts

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"

/ {
	model = "Toshiba AC100 / Dynabook AZ";
	compatible = "compal,paz00", "nvidia,tegra20";

	aliases {
		rtc0 = "/i2c@7000d000/tps6586x@34";
		rtc1 = "/rtc@7000e000";
		serial0 = &uarta;
		serial1 = &uartc;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		reg = <0x00000000 0x20000000>;
	};

	host1x@50000000 {
		dc@54200000 {
			rgb {
				status = "okay";

				nvidia,panel = <&panel>;
			};
		};

		hdmi@54280000 {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata", "atc", "atd", "ate",
					"dap2", "gmb", "gmc", "gmd", "spia",
					"spib", "spic", "spid", "spie";
				nvidia,function = "gmi";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "pllc_out1";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "rsvd1";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gpu {
				nvidia,pins = "gpu", "sdb", "sdd";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint", "pta";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uarta";
			};
			kbca {
				nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
				nvidia,function = "kbc";
			};
			kbcb {
				nvidia,pins = "kbcb", "kbcd";
				nvidia,function = "sdio2";
			};
			lcsn {
				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
					"ld3", "ld4", "ld5", "ld6", "ld7",
					"ld8", "ld9", "ld10", "ld11", "ld12",
					"ld13", "ld14", "ld15", "ld16", "ld17",
					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
					"lhs", "lm0", "lm1", "lpp", "lpw0",
					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
					"lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc";
				nvidia,function = "owr";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdc {
				nvidia,pins = "sdc";
				nvidia,function = "twc";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxc {
				nvidia,pins = "slxc", "slxd";
				nvidia,function = "spi4";
			};
			spdi {
				nvidia,pins = "spdi", "spdo";
				nvidia,function = "rsvd2";
			};
			spif {
				nvidia,pins = "spif", "uac";
				nvidia,function = "rsvd4";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "spdif";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
					"cdev1", "cdev2", "dap1", "dap2", "dtf",
					"gma", "gmb", "gmc", "gmd", "gme",
					"gpu", "gpu7", "gpv", "i2cp", "pta",
					"rm", "sdio1", "slxk", "spdo", "uac",
					"uda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "dap3", "dap4", "dtb",
					"dtc", "dte", "slxa", "slxc", "slxd",
					"spdi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_csus {
				nvidia,pins = "csus", "spia", "spib", "spid",
					"spif";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ddc {
				nvidia,pins = "ddc", "irrx", "irtx", "kbca",
					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
					"spic", "spig", "uaa", "uab";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
					"spie", "spih", "uad", "uca", "ucb";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "ld0", "ld1", "ld2",
					"ld3", "ld4", "ld5", "ld6", "ld7",
					"ld8", "ld9", "ld10", "ld11", "ld12",
					"ld13", "ld14", "ld15", "ld16", "ld17",
					"ldc", "ldi", "lhs", "lsc0", "lspi",
					"lvs", "pmc";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
			};
			conf_lcsn {
				nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
					"lm0", "lm1", "lpp", "lpw0", "lpw1",
					"lpw2", "lsc1", "lsck", "lsda", "lsdi",
					"lvp0", "lvp1", "sdb";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006000 {
		status = "okay";
	};

	serial@70006200 {
		status = "okay";
	};

	pwm: pwm@7000a000 {
		status = "okay";
	};

	lvds_ddc: i2c@7000c000 {
		status = "okay";
		clock-frequency = <400000>;

		alc5632: alc5632@1e {
			compatible = "realtek,alc5632";
			reg = <0x1e>;
			gpio-controller;
			#gpio-cells = <2>;
		};
	};

	hdmi_ddc: i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	nvec@7000c500 {
		compatible = "nvidia,nvec";
		reg = <0x7000c500 0x100>;
		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-frequency = <80000>;
		request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
		slave-addr = <138>;
		clocks = <&tegra_car TEGRA20_CLK_I2C3>,
		         <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
		clock-names = "div-clk", "fast-clk";
		resets = <&tegra_car 67>;
		reset-names = "i2c";
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&p5valw_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "+1.2vs_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "+1.0vs_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "+3.7vs_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				ldo1 {
					regulator-name = "+1.1vs_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "+1.2vs_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "+3.3vs_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "+2.85vs_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo6 {
					/*
					 * Research indicates this should be
					 * 1.8v; other boards that use this
					 * rail for the same purpose need it
					 * set to 1.8v. The schematic signal
					 * name is incorrect; perhaps copied
					 * from an incorrect NVIDIA reference.
					 */
					regulator-name = "+2.85vs_ldo6,avdd_vdac";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "+3.3vs_ldo7,avdd_hdmi";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "+3.3vs_rtc";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		adt7461@4c {
			compatible = "adi,adt7461";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <2000>;
		nvidia,cpu-pwr-off-time = <0>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <0>;
		nvidia,sys-clock-req-active-high;
	};

	usb@c5000000 {
		compatible = "nvidia,tegra20-udc";
		status = "okay";
		dr_mode = "peripheral";
	};

	usb-phy@c5000000 {
		status = "okay";
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
			GPIO_ACTIVE_LOW>;
	};

	usb@c5008000 {
		status = "okay";
	};

	usb-phy@c5008000 {
		status = "okay";
	};

	sdhci@c8000000 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
		non-removable;
	};

	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
		pwms = <&pwm 0 5000000>;

		brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
		default-brightness-level = <10>;

		backlight-boot-off;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg = <0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		wifi {
			label = "wifi-led";
			gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "rfkill0";
		};
	};

	panel: panel {
		compatible = "samsung,ltn101nt05", "simple-panel";

		ddc-i2c-bus = <&lvds_ddc>;
		power-supply = <&vdd_pnl_reg>;
		enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;

		backlight = <&backlight>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		p5valw_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "+5valw";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		vdd_pnl_reg: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "+3VS,vdd_pnl";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-alc5632-paz00",
			"nvidia,tegra-audio-alc5632";

		nvidia,model = "Compal PAZ00";

		nvidia,audio-routing =
			"Int Spk", "SPKOUT",
			"Int Spk", "SPKOUTN",
			"Headset Mic", "MICBIAS1",
			"MIC1", "Headset Mic",
			"Headset Stereophone", "HPR",
			"Headset Stereophone", "HPL",
			"DMICDAT", "Digital Mic";

		nvidia,audio-codec = <&alc5632>;
		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
			GPIO_ACTIVE_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
		         <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
		         <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
cc2afa43 MD	2	/dts-v1/;
cc2afa43 MD	3
6bccbd5e	4	#include <dt-bindings/input/input.h>
1bd0bd49	5	#include "tegra20.dtsi"
cc2afa43 MD	6
	7	/ {
	8	model = "Toshiba AC100 / Dynabook AZ";
	9	compatible = "compal,paz00", "nvidia,tegra20";
	10
553c0a20 SW	11	aliases {
	12	rtc0 = "/i2c@7000d000/tps6586x@34";
	13	rtc1 = "/rtc@7000e000";
c4574aa0 OJ	14	serial0 = &uarta;
c4574aa0 OJ	15	serial1 = &uartc;
553c0a20 SW	16	};
553c0a20 SW	17
f5bbb327 JH	18	chosen {
	19	stdout-path = "serial0:115200n8";
	20	};
	21
f9eb26a4	22	memory {
cc2afa43 MD	23	reg = <0x00000000 0x20000000>;
	24	};
	25
58ecb23f	26	host1x@50000000 {
5816898b MD	27	dc@54200000 {
	28	rgb {
	29	status = "okay";
	30
	31	nvidia,panel = <&panel>;
	32	};
	33	};
	34
58ecb23f	35	hdmi@54280000 {
11a3c868 SW	36	status = "okay";
	37
	38	vdd-supply = <&hdmi_vdd_reg>;
	39	pll-supply = <&hdmi_pll_reg>;
	40
	41	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc SW	42	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	43	GPIO_ACTIVE_HIGH>;
11a3c868 SW	44	};
	45	};
	46
58ecb23f	47	pinmux@70000014 {
ecc295bb SW	48	pinctrl-names = "default";
	49	pinctrl-0 = <&state_default>;
	50
	51	state_default: pinmux {
	52	ata {
	53	nvidia,pins = "ata", "atc", "atd", "ate",
	54	"dap2", "gmb", "gmc", "gmd", "spia",
	55	"spib", "spic", "spid", "spie";
	56	nvidia,function = "gmi";
	57	};
	58	atb {
	59	nvidia,pins = "atb", "gma", "gme";
	60	nvidia,function = "sdio4";
	61	};
	62	cdev1 {
	63	nvidia,pins = "cdev1";
	64	nvidia,function = "plla_out";
	65	};
	66	cdev2 {
	67	nvidia,pins = "cdev2";
	68	nvidia,function = "pllp_out4";
	69	};
	70	crtp {
	71	nvidia,pins = "crtp";
	72	nvidia,function = "crt";
	73	};
	74	csus {
	75	nvidia,pins = "csus";
	76	nvidia,function = "pllc_out1";
	77	};
	78	dap1 {
	79	nvidia,pins = "dap1";
	80	nvidia,function = "dap1";
	81	};
	82	dap3 {
	83	nvidia,pins = "dap3";
	84	nvidia,function = "dap3";
	85	};
	86	dap4 {
	87	nvidia,pins = "dap4";
	88	nvidia,function = "dap4";
	89	};
	90	ddc {
	91	nvidia,pins = "ddc";
	92	nvidia,function = "i2c2";
	93	};
	94	dta {
	95	nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
	96	nvidia,function = "rsvd1";
	97	};
	98	dtf {
	99	nvidia,pins = "dtf";
	100	nvidia,function = "i2c3";
	101	};
	102	gpu {
	103	nvidia,pins = "gpu", "sdb", "sdd";
	104	nvidia,function = "pwm";
	105	};
	106	gpu7 {
	107	nvidia,pins = "gpu7";
	108	nvidia,function = "rtck";
	109	};
	110	gpv {
	111	nvidia,pins = "gpv", "slxa", "slxk";
112	nvidia,function = "pcie";
113	};
114	hdint {
115	nvidia,pins = "hdint", "pta";
116	nvidia,function = "hdmi";
117	};
118	i2cp {
119	nvidia,pins = "i2cp";
120	nvidia,function = "i2cp";
121	};
122	irrx {
123	nvidia,pins = "irrx", "irtx";
124	nvidia,function = "uarta";
125	};
126	kbca {
127	nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
128	nvidia,function = "kbc";
129	};
130	kbcb {
131	nvidia,pins = "kbcb", "kbcd";
132	nvidia,function = "sdio2";
133	};
134	lcsn {
135	nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
136	"ld3", "ld4", "ld5", "ld6", "ld7",
137	"ld8", "ld9", "ld10", "ld11", "ld12",
138	"ld13", "ld14", "ld15", "ld16", "ld17",
139	"ldc", "ldi", "lhp0", "lhp1", "lhp2",
140	"lhs", "lm0", "lm1", "lpp", "lpw0",
141	"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
142	"lsda", "lsdi", "lspi", "lvp0", "lvp1",
143	"lvs";
144	nvidia,function = "displaya";
145	};
146	owc {
147	nvidia,pins = "owc";
148	nvidia,function = "owr";
149	};
150	pmc {
151	nvidia,pins = "pmc";
152	nvidia,function = "pwr_on";
153	};
154	rm {
155	nvidia,pins = "rm";
156	nvidia,function = "i2c1";
157	};
158	sdc {
159	nvidia,pins = "sdc";
160	nvidia,function = "twc";
161	};
162	sdio1 {
163	nvidia,pins = "sdio1";
164	nvidia,function = "sdio1";
165	};
166	slxc {
167	nvidia,pins = "slxc", "slxd";
168	nvidia,function = "spi4";
169	};
170	spdi {
171	nvidia,pins = "spdi", "spdo";
172	nvidia,function = "rsvd2";
173	};
174	spif {
175	nvidia,pins = "spif", "uac";
176	nvidia,function = "rsvd4";
177	};
178	spig {
179	nvidia,pins = "spig", "spih";
180	nvidia,function = "spi2_alt";
181	};
182	uaa {
183	nvidia,pins = "uaa", "uab", "uda";
184	nvidia,function = "ulpi";
185	};
186	uad {
187	nvidia,pins = "uad";
188	nvidia,function = "spdif";
189	};
190	uca {
191	nvidia,pins = "uca", "ucb";
192	nvidia,function = "uartc";
193	};
194	conf_ata {
195	nvidia,pins = "ata", "atb", "atc", "atd", "ate",
563da21b SW	196	"cdev1", "cdev2", "dap1", "dap2", "dtf",
	197	"gma", "gmb", "gmc", "gmd", "gme",
	198	"gpu", "gpu7", "gpv", "i2cp", "pta",
	199	"rm", "sdio1", "slxk", "spdo", "uac",
	200	"uda";
ba4104e7 LD	201	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	202	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb	203	};
ecc295bb SW	204	conf_ck32 {
	205	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
	206	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7	207	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb SW	208	};
	209	conf_crtp {
	210	nvidia,pins = "crtp", "dap3", "dap4", "dtb",
	211	"dtc", "dte", "slxa", "slxc", "slxd",
	212	"spdi";
ba4104e7 LD	213	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	214	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	215	};
	216	conf_csus {
	217	nvidia,pins = "csus", "spia", "spib", "spid",
	218	"spif";
ba4104e7 LD	219	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	220	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	221	};
	222	conf_ddc {
	223	nvidia,pins = "ddc", "irrx", "irtx", "kbca",
	224	"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
	225	"spic", "spig", "uaa", "uab";
ba4104e7 LD	226	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	227	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	228	};
	229	conf_dta {
	230	nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
	231	"spie", "spih", "uad", "uca", "ucb";
ba4104e7 LD	232	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	233	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	234	};
	235	conf_hdint {
	236	nvidia,pins = "hdint", "ld0", "ld1", "ld2",
	237	"ld3", "ld4", "ld5", "ld6", "ld7",
	238	"ld8", "ld9", "ld10", "ld11", "ld12",
	239	"ld13", "ld14", "ld15", "ld16", "ld17",
	240	"ldc", "ldi", "lhs", "lsc0", "lspi",
	241	"lvs", "pmc";
ba4104e7	242	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	243	};
	244	conf_lc {
	245	nvidia,pins = "lc", "ls";
ba4104e7	246	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb SW	247	};
	248	conf_lcsn {
	249	nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
	250	"lm0", "lm1", "lpp", "lpw0", "lpw1",
	251	"lpw2", "lsc1", "lsck", "lsda", "lsdi",
	252	"lvp0", "lvp1", "sdb";
ba4104e7	253	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	254	};
	255	conf_ld17_0 {
	256	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
	257	"ld23_22";
ba4104e7	258	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb SW	259	};
	260	};
	261	};
	262
2a5fdc9a SW	263	i2s@70002800 {
2a5fdc9a SW	264	status = "okay";
c04abb3a SW	265	};
	266
	267	serial@70006000 {
2a5fdc9a	268	status = "okay";
c04abb3a SW	269	};
c04abb3a SW	270
c04abb3a	271	serial@70006200 {
2a5fdc9a	272	status = "okay";
c04abb3a SW	273	};
c04abb3a SW	274
5816898b MD	275	pwm: pwm@7000a000 {
	276	status = "okay";
	277	};
	278
	279	lvds_ddc: i2c@7000c000 {
2a5fdc9a	280	status = "okay";
cc2afa43	281	clock-frequency = <400000>;
613e9657 LR	282
	283	alc5632: alc5632@1e {
	284	compatible = "realtek,alc5632";
	285	reg = <0x1e>;
	286	gpio-controller;
	287	#gpio-cells = <2>;
	288	};
cc2afa43 MD	289	};
cc2afa43 MD	290
11a3c868	291	hdmi_ddc: i2c@7000c400 {
2a5fdc9a	292	status = "okay";
11a3c868	293	clock-frequency = <100000>;
cc2afa43 MD	294	};
cc2afa43 MD	295
58ecb23f	296	nvec@7000c500 {
cc2afa43	297	compatible = "nvidia,nvec";
ba04c289	298	reg = <0x7000c500 0x100>;
6cecf916	299	interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
2eaab06e SW	300	#address-cells = <1>;
2eaab06e SW	301	#size-cells = <0>;
cc2afa43	302	clock-frequency = <80000>;
3325f1bc	303	request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
cc2afa43	304	slave-addr = <138>;
885a8cfa	305	clocks = <&tegra_car TEGRA20_CLK_I2C3>,
067cc286	306	<&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
d409b3af	307	clock-names = "div-clk", "fast-clk";
3393d422 SW	308	resets = <&tegra_car 67>;
3393d422 SW	309	reset-names = "i2c";
cc2afa43 MD	310	};
	311
	312	i2c@7000d000 {
2a5fdc9a	313	status = "okay";
cc2afa43	314	clock-frequency = <400000>;
1266f897	315
217b8f0f SW	316	pmic: tps6586x@34 {
	317	compatible = "ti,tps6586x";
	318	reg = <0x34>;
6cecf916	319	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
217b8f0f SW	320
	321	#gpio-cells = <2>;
	322	gpio-controller;
	323
	324	sys-supply = <&p5valw_reg>;
	325	vin-sm0-supply = <&sys_reg>;
	326	vin-sm1-supply = <&sys_reg>;
	327	vin-sm2-supply = <&sys_reg>;
	328	vinldo01-supply = <&sm2_reg>;
	329	vinldo23-supply = <&sm2_reg>;
	330	vinldo4-supply = <&sm2_reg>;
	331	vinldo678-supply = <&sm2_reg>;
	332	vinldo9-supply = <&sm2_reg>;
	333
	334	regulators {
b9c665d7	335	sys_reg: sys {
217b8f0f SW	336	regulator-name = "vdd_sys";
	337	regulator-always-on;
	338	};
	339
b9c665d7	340	sm0 {
217b8f0f SW	341	regulator-name = "+1.2vs_sm0,vdd_core";
	342	regulator-min-microvolt = <1200000>;
	343	regulator-max-microvolt = <1200000>;
	344	regulator-always-on;
	345	};
	346
b9c665d7	347	sm1 {
217b8f0f SW	348	regulator-name = "+1.0vs_sm1,vdd_cpu";
	349	regulator-min-microvolt = <1000000>;
	350	regulator-max-microvolt = <1000000>;
	351	regulator-always-on;
	352	};
	353
b9c665d7	354	sm2_reg: sm2 {
217b8f0f SW	355	regulator-name = "+3.7vs_sm2,vin_ldo*";
	356	regulator-min-microvolt = <3700000>;
	357	regulator-max-microvolt = <3700000>;
	358	regulator-always-on;
	359	};
	360
	361	/* LDO0 is not connected to anything */
	362
b9c665d7	363	ldo1 {
217b8f0f SW	364	regulator-name = "+1.1vs_ldo1,avdd_pll*";
	365	regulator-min-microvolt = <1100000>;
	366	regulator-max-microvolt = <1100000>;
	367	regulator-always-on;
	368	};
	369
b9c665d7	370	ldo2 {
217b8f0f SW	371	regulator-name = "+1.2vs_ldo2,vdd_rtc";
	372	regulator-min-microvolt = <1200000>;
	373	regulator-max-microvolt = <1200000>;
	374	};
	375
b9c665d7	376	ldo3 {
217b8f0f SW	377	regulator-name = "+3.3vs_ldo3,avdd_usb*";
	378	regulator-min-microvolt = <3300000>;
	379	regulator-max-microvolt = <3300000>;
	380	regulator-always-on;
	381	};
	382
b9c665d7	383	ldo4 {
217b8f0f SW	384	regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
	385	regulator-min-microvolt = <1800000>;
	386	regulator-max-microvolt = <1800000>;
	387	regulator-always-on;
	388	};
	389
b9c665d7	390	ldo5 {
217b8f0f SW	391	regulator-name = "+2.85vs_ldo5,vcore_mmc";
	392	regulator-min-microvolt = <2850000>;
	393	regulator-max-microvolt = <2850000>;
	394	regulator-always-on;
	395	};
	396
b9c665d7	397	ldo6 {
217b8f0f SW	398	/*
	399	* Research indicates this should be
	400	* 1.8v; other boards that use this
	401	* rail for the same purpose need it
	402	* set to 1.8v. The schematic signal
	403	* name is incorrect; perhaps copied
	404	* from an incorrect NVIDIA reference.
	405	*/
	406	regulator-name = "+2.85vs_ldo6,avdd_vdac";
	407	regulator-min-microvolt = <1800000>;
	408	regulator-max-microvolt = <1800000>;
	409	};
	410
11a3c868	411	hdmi_vdd_reg: ldo7 {
217b8f0f SW	412	regulator-name = "+3.3vs_ldo7,avdd_hdmi";
	413	regulator-min-microvolt = <3300000>;
	414	regulator-max-microvolt = <3300000>;
	415	};
	416
11a3c868	417	hdmi_pll_reg: ldo8 {
217b8f0f SW	418	regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
	419	regulator-min-microvolt = <1800000>;
	420	regulator-max-microvolt = <1800000>;
	421	};
	422
b9c665d7	423	ldo9 {
217b8f0f SW	424	regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
	425	regulator-min-microvolt = <2850000>;
	426	regulator-max-microvolt = <2850000>;
	427	regulator-always-on;
	428	};
	429
b9c665d7	430	ldo_rtc {
217b8f0f SW	431	regulator-name = "+3.3vs_rtc";
	432	regulator-min-microvolt = <3300000>;
	433	regulator-max-microvolt = <3300000>;
	434	regulator-always-on;
	435	};
	436	};
	437	};
	438
1266f897 MD	439	adt7461@4c {
	440	compatible = "adi,adt7461";
	441	reg = <0x4c>;
	442	};
cc2afa43 MD	443	};
cc2afa43 MD	444
58ecb23f	445	pmc@7000e400 {
217b8f0f	446	nvidia,invert-interrupt;
47d2d63b	447	nvidia,suspend-mode = <1>;
a44a019d JL	448	nvidia,cpu-pwr-good-time = <2000>;
	449	nvidia,cpu-pwr-off-time = <0>;
	450	nvidia,core-pwr-good-time = <3845 3845>;
	451	nvidia,core-pwr-off-time = <0>;
	452	nvidia,sys-clock-req-active-high;
217b8f0f SW	453	};
217b8f0f SW	454
2a5fdc9a	455	usb@c5000000 {
e3ff43b6	456	compatible = "nvidia,tegra20-udc";
2a5fdc9a	457	status = "okay";
e3ff43b6	458	dr_mode = "peripheral";
2a5fdc9a SW	459	};
2a5fdc9a SW	460
4c94c8b5 VB	461	usb-phy@c5000000 {
	462	status = "okay";
	463	};
	464
c04abb3a	465	usb@c5004000 {
2a5fdc9a	466	status = "okay";
3325f1bc SW	467	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
3325f1bc SW	468	GPIO_ACTIVE_LOW>;
cc2afa43 MD	469	};
cc2afa43 MD	470
9dffe3be	471	usb-phy@c5004000 {
4c94c8b5	472	status = "okay";
3325f1bc SW	473	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
3325f1bc SW	474	GPIO_ACTIVE_LOW>;
2a5fdc9a SW	475	};
2a5fdc9a SW	476
9dffe3be VB	477	usb@c5008000 {
9dffe3be VB	478	status = "okay";
40e8b3a6 VB	479	};
40e8b3a6 VB	480
4c94c8b5 VB	481	usb-phy@c5008000 {
	482	status = "okay";
	483	};
	484
cc2afa43	485	sdhci@c8000000 {
2a5fdc9a	486	status = "okay";
3325f1bc SW	487	cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
	488	wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	489	power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
7f217794	490	bus-width = <4>;
cc2afa43 MD	491	};
cc2afa43 MD	492
cc2afa43	493	sdhci@c8000600 {
2a5fdc9a	494	status = "okay";
7f217794	495	bus-width = <8>;
7a2617a6	496	non-removable;
cc2afa43	497	};
d8d56c84	498
5816898b MD	499	backlight: backlight {
	500	compatible = "pwm-backlight";
	501
	502	enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
	503	pwms = <&pwm 0 5000000>;
	504
	505	brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
	506	default-brightness-level = <10>;
	507
	508	backlight-boot-off;
	509	};
	510
7021d122 JL	511	clocks {
	512	compatible = "simple-bus";
	513	#address-cells = <1>;
	514	#size-cells = <0>;
	515
58ecb23f	516	clk32k_in: clock@0 {
7021d122	517	compatible = "fixed-clock";
4ec2e601	518	reg = <0>;
7021d122 JL	519	#clock-cells = <0>;
	520	clock-frequency = <32768>;
	521	};
	522	};
	523
d8d56c84 MD	524	gpio-keys {
	525	compatible = "gpio-keys";
	526
	527	power {
	528	label = "Power";
3325f1bc	529	gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
6bccbd5e	530	linux,code = <KEY_POWER>;
d1c04d30	531	wakeup-source;
d8d56c84 MD	532	};
d8d56c84 MD	533	};
80c9473d MD	534
	535	gpio-leds {
	536	compatible = "gpio-leds";
	537
	538	wifi {
	539	label = "wifi-led";
3325f1bc	540	gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
80c9473d MD	541	linux,default-trigger = "rfkill0";
	542	};
	543	};
aa607ebf	544
5816898b MD	545	panel: panel {
	546	compatible = "samsung,ltn101nt05", "simple-panel";
	547
	548	ddc-i2c-bus = <&lvds_ddc>;
	549	power-supply = <&vdd_pnl_reg>;
	550	enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
	551
	552	backlight = <&backlight>;
	553	};
	554
217b8f0f SW	555	regulators {
	556	compatible = "simple-bus";
	557	#address-cells = <1>;
	558	#size-cells = <0>;
	559
	560	p5valw_reg: regulator@0 {
	561	compatible = "regulator-fixed";
	562	reg = <0>;
	563	regulator-name = "+5valw";
	564	regulator-min-microvolt = <5000000>;
	565	regulator-max-microvolt = <5000000>;
	566	regulator-always-on;
	567	};
5816898b MD	568
	569	vdd_pnl_reg: regulator@1 {
	570	compatible = "regulator-fixed";
	571	reg = <1>;
	572	regulator-name = "+3VS,vdd_pnl";
	573	regulator-min-microvolt = <3300000>;
	574	regulator-max-microvolt = <3300000>;
0c18927f	575	regulator-boot-on;
5816898b MD	576	gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
	577	enable-active-high;
	578	};
217b8f0f SW	579	};
217b8f0f SW	580
c04abb3a SW	581	sound {
	582	compatible = "nvidia,tegra-audio-alc5632-paz00",
	583	"nvidia,tegra-audio-alc5632";
	584
	585	nvidia,model = "Compal PAZ00";
	586
	587	nvidia,audio-routing =
	588	"Int Spk", "SPKOUT",
	589	"Int Spk", "SPKOUTN",
	590	"Headset Mic", "MICBIAS1",
	591	"MIC1", "Headset Mic",
	592	"Headset Stereophone", "HPR",
	593	"Headset Stereophone", "HPL",
	594	"DMICDAT", "Digital Mic";
	595
	596	nvidia,audio-codec = <&alc5632>;
	597	nvidia,i2s-controller = <&tegra_i2s1>;
3325f1bc SW	598	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
3325f1bc SW	599	GPIO_ACTIVE_HIGH>;
f9cd2b3b	600
885a8cfa	601	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
067cc286 TR	602	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
067cc286 TR	603	<&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b	604	clock-names = "pll_a", "pll_a_out0", "mclk";
aa607ebf	605	};
cc2afa43	606	};