projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 8471a202 LB |
1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* | |
| 3 | * Copyright (C) STMicroelectronics 2017 - All Rights Reserved | |
| 4 | * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. | |
| 5 | */ | |
| 6 | #include <dt-bindings/pinctrl/stm32-pinfunc.h> | |
| 7 | ||
| 8 | / { | |
| 9 | soc { | |
| 10 | pinctrl: pin-controller { | |
| 11 | #address-cells = <1>; | |
| 12 | #size-cells = <1>; | |
| 13 | compatible = "st,stm32mp157-pinctrl"; | |
| 14 | ranges = <0 0x50002000 0xa400>; | |
| 15 | pins-are-numbered; | |
| 16 | ||
| 17 | gpioa: gpio@50002000 { | |
| 18 | gpio-controller; | |
| 19 | #gpio-cells = <2>; | |
| 20 | interrupt-controller; | |
| 21 | #interrupt-cells = <2>; | |
| 22 | reg = <0x0 0x400>; | |
| 3599a8af | 23 | clocks = <&rcc GPIOA>; |
| 8471a202 LB |
24 | st,bank-name = "GPIOA"; |
| 25 | ngpios = <16>; | |
| 26 | gpio-ranges = <&pinctrl 0 0 16>; | |
| 27 | }; | |
| 28 | ||
| 29 | gpiob: gpio@50003000 { | |
| 30 | gpio-controller; | |
| 31 | #gpio-cells = <2>; | |
| 32 | interrupt-controller; | |
| 33 | #interrupt-cells = <2>; | |
| 34 | reg = <0x1000 0x400>; | |
| 3599a8af | 35 | clocks = <&rcc GPIOB>; |
| 8471a202 LB |
36 | st,bank-name = "GPIOB"; |
| 37 | ngpios = <16>; | |
| 38 | gpio-ranges = <&pinctrl 0 16 16>; | |
| 39 | }; | |
| 40 | ||
| 41 | gpioc: gpio@50004000 { | |
| 42 | gpio-controller; | |
| 43 | #gpio-cells = <2>; | |
| 44 | interrupt-controller; | |
| 45 | #interrupt-cells = <2>; | |
| 46 | reg = <0x2000 0x400>; | |
| 3599a8af | 47 | clocks = <&rcc GPIOC>; |
| 8471a202 LB |
48 | st,bank-name = "GPIOC"; |
| 49 | ngpios = <16>; | |
| 50 | gpio-ranges = <&pinctrl 0 32 16>; | |
| 51 | }; | |
| 52 | ||
| 53 | gpiod: gpio@50005000 { | |
| 54 | gpio-controller; | |
| 55 | #gpio-cells = <2>; | |
| 56 | interrupt-controller; | |
| 57 | #interrupt-cells = <2>; | |
| 58 | reg = <0x3000 0x400>; | |
| 3599a8af | 59 | clocks = <&rcc GPIOD>; |
| 8471a202 LB |
60 | st,bank-name = "GPIOD"; |
| 61 | ngpios = <16>; | |
| 62 | gpio-ranges = <&pinctrl 0 48 16>; | |
| 63 | }; | |
| 64 | ||
| 65 | gpioe: gpio@50006000 { | |
| 66 | gpio-controller; | |
| 67 | #gpio-cells = <2>; | |
| 68 | interrupt-controller; | |
| 69 | #interrupt-cells = <2>; | |
| 70 | reg = <0x4000 0x400>; | |
| 3599a8af | 71 | clocks = <&rcc GPIOE>; |
| 8471a202 LB |
72 | st,bank-name = "GPIOE"; |
| 73 | ngpios = <16>; | |
| 74 | gpio-ranges = <&pinctrl 0 64 16>; | |
| 75 | }; | |
| 76 | ||
| 77 | gpiof: gpio@50007000 { | |
| 78 | gpio-controller; | |
| 79 | #gpio-cells = <2>; | |
| 80 | interrupt-controller; | |
| 81 | #interrupt-cells = <2>; | |
| 82 | reg = <0x5000 0x400>; | |
| 3599a8af | 83 | clocks = <&rcc GPIOF>; |
| 8471a202 LB |
84 | st,bank-name = "GPIOF"; |
| 85 | ngpios = <16>; | |
| 86 | gpio-ranges = <&pinctrl 0 80 16>; | |
| 87 | }; | |
| 88 | ||
| 89 | gpiog: gpio@50008000 { | |
| 90 | gpio-controller; | |
| 91 | #gpio-cells = <2>; | |
| 92 | interrupt-controller; | |
| 93 | #interrupt-cells = <2>; | |
| 94 | reg = <0x6000 0x400>; | |
| 3599a8af | 95 | clocks = <&rcc GPIOG>; |
| 8471a202 LB |
96 | st,bank-name = "GPIOG"; |
| 97 | ngpios = <16>; | |
| 98 | gpio-ranges = <&pinctrl 0 96 16>; | |
| 99 | }; | |
| 100 | ||
| 101 | gpioh: gpio@50009000 { | |
| 102 | gpio-controller; | |
| 103 | #gpio-cells = <2>; | |
| 104 | interrupt-controller; | |
| 105 | #interrupt-cells = <2>; | |
| 106 | reg = <0x7000 0x400>; | |
| 3599a8af | 107 | clocks = <&rcc GPIOH>; |
| 8471a202 LB |
108 | st,bank-name = "GPIOH"; |
| 109 | ngpios = <16>; | |
| 110 | gpio-ranges = <&pinctrl 0 112 16>; | |
| 111 | }; | |
| 112 | ||
| 113 | gpioi: gpio@5000a000 { | |
| 114 | gpio-controller; | |
| 115 | #gpio-cells = <2>; | |
| 116 | interrupt-controller; | |
| 117 | #interrupt-cells = <2>; | |
| 118 | reg = <0x8000 0x400>; | |
| 3599a8af | 119 | clocks = <&rcc GPIOI>; |
| 8471a202 LB |
120 | st,bank-name = "GPIOI"; |
| 121 | ngpios = <16>; | |
| 122 | gpio-ranges = <&pinctrl 0 128 16>; | |
| 123 | }; | |
| 124 | ||
| 125 | gpioj: gpio@5000b000 { | |
| 126 | gpio-controller; | |
| 127 | #gpio-cells = <2>; | |
| 128 | interrupt-controller; | |
| 129 | #interrupt-cells = <2>; | |
| 130 | reg = <0x9000 0x400>; | |
| 3599a8af | 131 | clocks = <&rcc GPIOJ>; |
| 8471a202 LB |
132 | st,bank-name = "GPIOJ"; |
| 133 | ngpios = <16>; | |
| 134 | gpio-ranges = <&pinctrl 0 144 16>; | |
| 135 | }; | |
| 136 | ||
| 137 | gpiok: gpio@5000c000 { | |
| 138 | gpio-controller; | |
| 139 | #gpio-cells = <2>; | |
| 140 | interrupt-controller; | |
| 141 | #interrupt-cells = <2>; | |
| 142 | reg = <0xa000 0x400>; | |
| 3599a8af | 143 | clocks = <&rcc GPIOK>; |
| 8471a202 LB |
144 | st,bank-name = "GPIOK"; |
| 145 | ngpios = <8>; | |
| 146 | gpio-ranges = <&pinctrl 0 160 8>; | |
| 147 | }; | |
| bcc4f4e1 | 148 | |
| 7123be3b | 149 | cec_pins_a: cec-0 { |
| 150 | pins { | |
| 151 | pinmux = <STM32_PINMUX('A', 15, AF4)>; | |
| 152 | bias-disable; | |
| 153 | drive-open-drain; | |
| 154 | slew-rate = <0>; | |
| 155 | }; | |
| 156 | }; | |
| 157 | ||
| 4d58a474 PYM |
158 | i2c1_pins_a: i2c1-0 { |
| 159 | pins { | |
| 160 | pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ | |
| 161 | <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ | |
| 162 | bias-disable; | |
| 163 | drive-open-drain; | |
| 164 | slew-rate = <0>; | |
| 165 | }; | |
| 166 | }; | |
| 167 | ||
| 168 | i2c2_pins_a: i2c2-0 { | |
| 169 | pins { | |
| 170 | pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */ | |
| 171 | <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ | |
| 172 | bias-disable; | |
| 173 | drive-open-drain; | |
| 174 | slew-rate = <0>; | |
| 175 | }; | |
| 176 | }; | |
| 177 | ||
| 178 | i2c5_pins_a: i2c5-0 { | |
| 179 | pins { | |
| 180 | pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */ | |
| 181 | <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */ | |
| 182 | bias-disable; | |
| 183 | drive-open-drain; | |
| 184 | slew-rate = <0>; | |
| 185 | }; | |
| 186 | }; | |
| 187 | ||
| 52545823 FG |
188 | pwm2_pins_a: pwm2-0 { |
| 189 | pins { | |
| 190 | pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ | |
| 191 | bias-pull-down; | |
| 192 | drive-push-pull; | |
| 193 | slew-rate = <0>; | |
| 194 | }; | |
| 195 | }; | |
| 196 | ||
| 197 | pwm8_pins_a: pwm8-0 { | |
| 198 | pins { | |
| 199 | pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */ | |
| 200 | bias-pull-down; | |
| 201 | drive-push-pull; | |
| 202 | slew-rate = <0>; | |
| 203 | }; | |
| 204 | }; | |
| 205 | ||
| 206 | pwm12_pins_a: pwm12-0 { | |
| 207 | pins { | |
| 208 | pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */ | |
| 209 | bias-pull-down; | |
| 210 | drive-push-pull; | |
| 211 | slew-rate = <0>; | |
| 212 | }; | |
| 213 | }; | |
| 214 | ||
| bcc4f4e1 LB |
215 | uart4_pins_a: uart4@0 { |
| 216 | pins1 { | |
| 217 | pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ | |
| 218 | bias-disable; | |
| 219 | drive-push-pull; | |
| 220 | slew-rate = <0>; | |
| 221 | }; | |
| 222 | pins2 { | |
| 223 | pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ | |
| 224 | bias-disable; | |
| 225 | }; | |
| 226 | }; | |
| 8471a202 LB |
227 | }; |
| 228 | ||
| 229 | pinctrl_z: pin-controller-z { | |
| 230 | #address-cells = <1>; | |
| 231 | #size-cells = <1>; | |
| 232 | compatible = "st,stm32mp157-z-pinctrl"; | |
| 233 | ranges = <0 0x54004000 0x400>; | |
| 234 | pins-are-numbered; | |
| 235 | status = "disabled"; | |
| 236 | ||
| 237 | gpioz: gpio@54004000 { | |
| 238 | gpio-controller; | |
| 239 | #gpio-cells = <2>; | |
| 240 | interrupt-controller; | |
| 241 | #interrupt-cells = <2>; | |
| 242 | reg = <0 0x400>; | |
| 3599a8af | 243 | clocks = <&rcc GPIOZ>; |
| 8471a202 LB |
244 | st,bank-name = "GPIOZ"; |
| 245 | st,bank-ioport = <11>; | |
| 246 | ngpios = <8>; | |
| 247 | gpio-ranges = <&pinctrl_z 0 400 8>; | |
| 248 | }; | |
| 4d58a474 PYM |
249 | |
| 250 | i2c4_pins_a: i2c4-0 { | |
| 251 | pins { | |
| 252 | pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */ | |
| 253 | <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */ | |
| 254 | bias-disable; | |
| 255 | drive-open-drain; | |
| 256 | slew-rate = <0>; | |
| 257 | }; | |
| 258 | }; | |
| 8471a202 LB |
259 | }; |
| 260 | }; | |
| 261 | }; |