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1 | /* |
2 | * DTS file for SPEAr310 SoC | |
3 | * | |
10d8935f | 4 | * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> |
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5 | * |
6 | * The code contained herein is licensed under the GNU General Public | |
7 | * License. You may obtain a copy of the GNU General Public License | |
8 | * Version 2 or later at the following locations: | |
9 | * | |
10 | * http://www.opensource.org/licenses/gpl-license.html | |
11 | * http://www.gnu.org/copyleft/gpl.html | |
12 | */ | |
13 | ||
14 | /include/ "spear3xx.dtsi" | |
15 | ||
16 | / { | |
17 | ahb { | |
18 | #address-cells = <1>; | |
19 | #size-cells = <1>; | |
20 | compatible = "simple-bus"; | |
21 | ranges = <0x40000000 0x40000000 0x10000000 | |
22 | 0xb0000000 0xb0000000 0x10000000 | |
23 | 0xd0000000 0xd0000000 0x30000000>; | |
24 | ||
4ddb1c29 | 25 | pinmux: pinmux@b4000000 { |
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26 | compatible = "st,spear310-pinmux"; |
27 | reg = <0xb4000000 0x1000>; | |
4ddb1c29 | 28 | #gpio-range-cells = <2>; |
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29 | }; |
30 | ||
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31 | fsmc: flash@44000000 { |
32 | compatible = "st,spear600-fsmc-nand"; | |
33 | #address-cells = <1>; | |
34 | #size-cells = <1>; | |
35 | reg = <0x44000000 0x1000 /* FSMC Register */ | |
36 | 0x40000000 0x0010>; /* NAND Base */ | |
37 | reg-names = "fsmc_regs", "nand_data"; | |
38 | st,ale-off = <0x10000>; | |
39 | st,cle-off = <0x20000>; | |
40 | status = "disabled"; | |
41 | }; | |
42 | ||
43 | apb { | |
44 | #address-cells = <1>; | |
45 | #size-cells = <1>; | |
46 | compatible = "simple-bus"; | |
47 | ranges = <0xb0000000 0xb0000000 0x10000000 | |
48 | 0xd0000000 0xd0000000 0x30000000>; | |
49 | ||
50 | serial@b2000000 { | |
51 | compatible = "arm,pl011", "arm,primecell"; | |
52 | reg = <0xb2000000 0x1000>; | |
53 | status = "disabled"; | |
54 | }; | |
55 | ||
56 | serial@b2080000 { | |
57 | compatible = "arm,pl011", "arm,primecell"; | |
58 | reg = <0xb2080000 0x1000>; | |
59 | status = "disabled"; | |
60 | }; | |
61 | ||
62 | serial@b2100000 { | |
63 | compatible = "arm,pl011", "arm,primecell"; | |
64 | reg = <0xb2100000 0x1000>; | |
65 | status = "disabled"; | |
66 | }; | |
67 | ||
68 | serial@b2180000 { | |
69 | compatible = "arm,pl011", "arm,primecell"; | |
70 | reg = <0xb2180000 0x1000>; | |
71 | status = "disabled"; | |
72 | }; | |
73 | ||
74 | serial@b2200000 { | |
75 | compatible = "arm,pl011", "arm,primecell"; | |
76 | reg = <0xb2200000 0x1000>; | |
77 | status = "disabled"; | |
78 | }; | |
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79 | |
80 | gpiopinctrl: gpio@b4000000 { | |
81 | compatible = "st,spear-plgpio"; | |
82 | reg = <0xb4000000 0x1000>; | |
83 | #interrupt-cells = <1>; | |
84 | interrupt-controller; | |
85 | gpio-controller; | |
86 | #gpio-cells = <2>; | |
87 | gpio-ranges = <&pinmux 0 102>; | |
88 | status = "disabled"; | |
89 | ||
90 | st-plgpio,ngpio = <102>; | |
91 | st-plgpio,enb-reg = <0x10>; | |
92 | st-plgpio,wdata-reg = <0x20>; | |
93 | st-plgpio,dir-reg = <0x30>; | |
94 | st-plgpio,ie-reg = <0x50>; | |
95 | st-plgpio,rdata-reg = <0x40>; | |
96 | st-plgpio,mis-reg = <0x60>; | |
97 | }; | |
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98 | }; |
99 | }; | |
100 | }; |