Commit | Line | Data |
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a3f22db5 SH |
1 | /* |
2 | * Device Tree Source for the SH73A0 SoC | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /include/ "skeleton.dtsi" | |
12 | ||
5f75e73c LP |
13 | #include <dt-bindings/interrupt-controller/irq.h> |
14 | ||
a3f22db5 SH |
15 | / { |
16 | compatible = "renesas,sh73a0"; | |
17 | ||
18 | cpus { | |
c5795aec SH |
19 | #address-cells = <1>; |
20 | #size-cells = <0>; | |
21 | ||
a3f22db5 | 22 | cpu@0 { |
c5795aec | 23 | device_type = "cpu"; |
a3f22db5 | 24 | compatible = "arm,cortex-a9"; |
c5795aec | 25 | reg = <0>; |
a3f22db5 SH |
26 | }; |
27 | cpu@1 { | |
c5795aec | 28 | device_type = "cpu"; |
a3f22db5 | 29 | compatible = "arm,cortex-a9"; |
c5795aec | 30 | reg = <1>; |
a3f22db5 SH |
31 | }; |
32 | }; | |
33 | ||
34 | gic: interrupt-controller@f0001000 { | |
35 | compatible = "arm,cortex-a9-gic"; | |
36 | #interrupt-cells = <3>; | |
a3f22db5 SH |
37 | interrupt-controller; |
38 | reg = <0xf0001000 0x1000>, | |
39 | <0xf0000100 0x100>; | |
40 | }; | |
48609533 | 41 | |
4c90483a MD |
42 | pmu { |
43 | compatible = "arm,cortex-a9-pmu"; | |
5f75e73c LP |
44 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>, |
45 | <0 56 IRQ_TYPE_LEVEL_HIGH>; | |
4c90483a MD |
46 | }; |
47 | ||
558f8740 | 48 | irqpin0: irqpin@e6900000 { |
8bb44445 | 49 | compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; |
558f8740 GL |
50 | #interrupt-cells = <2>; |
51 | interrupt-controller; | |
52 | reg = <0xe6900000 4>, | |
53 | <0xe6900010 4>, | |
54 | <0xe6900020 1>, | |
55 | <0xe6900040 1>, | |
56 | <0xe6900060 1>; | |
57 | interrupt-parent = <&gic>; | |
5f75e73c LP |
58 | interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH |
59 | 0 2 IRQ_TYPE_LEVEL_HIGH | |
60 | 0 3 IRQ_TYPE_LEVEL_HIGH | |
61 | 0 4 IRQ_TYPE_LEVEL_HIGH | |
62 | 0 5 IRQ_TYPE_LEVEL_HIGH | |
63 | 0 6 IRQ_TYPE_LEVEL_HIGH | |
64 | 0 7 IRQ_TYPE_LEVEL_HIGH | |
65 | 0 8 IRQ_TYPE_LEVEL_HIGH>; | |
558f8740 GL |
66 | }; |
67 | ||
68 | irqpin1: irqpin@e6900004 { | |
8bb44445 | 69 | compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; |
558f8740 GL |
70 | #interrupt-cells = <2>; |
71 | interrupt-controller; | |
72 | reg = <0xe6900004 4>, | |
73 | <0xe6900014 4>, | |
74 | <0xe6900024 1>, | |
75 | <0xe6900044 1>, | |
76 | <0xe6900064 1>; | |
77 | interrupt-parent = <&gic>; | |
5f75e73c LP |
78 | interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH |
79 | 0 10 IRQ_TYPE_LEVEL_HIGH | |
80 | 0 11 IRQ_TYPE_LEVEL_HIGH | |
81 | 0 12 IRQ_TYPE_LEVEL_HIGH | |
82 | 0 13 IRQ_TYPE_LEVEL_HIGH | |
83 | 0 14 IRQ_TYPE_LEVEL_HIGH | |
84 | 0 15 IRQ_TYPE_LEVEL_HIGH | |
85 | 0 16 IRQ_TYPE_LEVEL_HIGH>; | |
558f8740 GL |
86 | control-parent; |
87 | }; | |
88 | ||
89 | irqpin2: irqpin@e6900008 { | |
8bb44445 | 90 | compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; |
558f8740 GL |
91 | #interrupt-cells = <2>; |
92 | interrupt-controller; | |
93 | reg = <0xe6900008 4>, | |
94 | <0xe6900018 4>, | |
95 | <0xe6900028 1>, | |
96 | <0xe6900048 1>, | |
97 | <0xe6900068 1>; | |
98 | interrupt-parent = <&gic>; | |
5f75e73c LP |
99 | interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH |
100 | 0 18 IRQ_TYPE_LEVEL_HIGH | |
101 | 0 19 IRQ_TYPE_LEVEL_HIGH | |
102 | 0 20 IRQ_TYPE_LEVEL_HIGH | |
103 | 0 21 IRQ_TYPE_LEVEL_HIGH | |
104 | 0 22 IRQ_TYPE_LEVEL_HIGH | |
105 | 0 23 IRQ_TYPE_LEVEL_HIGH | |
106 | 0 24 IRQ_TYPE_LEVEL_HIGH>; | |
558f8740 GL |
107 | }; |
108 | ||
109 | irqpin3: irqpin@e690000c { | |
8bb44445 | 110 | compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; |
558f8740 GL |
111 | #interrupt-cells = <2>; |
112 | interrupt-controller; | |
113 | reg = <0xe690000c 4>, | |
114 | <0xe690001c 4>, | |
115 | <0xe690002c 1>, | |
116 | <0xe690004c 1>, | |
117 | <0xe690006c 1>; | |
118 | interrupt-parent = <&gic>; | |
5f75e73c LP |
119 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH |
120 | 0 26 IRQ_TYPE_LEVEL_HIGH | |
121 | 0 27 IRQ_TYPE_LEVEL_HIGH | |
122 | 0 28 IRQ_TYPE_LEVEL_HIGH | |
123 | 0 29 IRQ_TYPE_LEVEL_HIGH | |
124 | 0 30 IRQ_TYPE_LEVEL_HIGH | |
125 | 0 31 IRQ_TYPE_LEVEL_HIGH | |
126 | 0 32 IRQ_TYPE_LEVEL_HIGH>; | |
558f8740 GL |
127 | }; |
128 | ||
561a1a31 | 129 | i2c0: i2c@e6820000 { |
48609533 SH |
130 | #address-cells = <1>; |
131 | #size-cells = <0>; | |
132 | compatible = "renesas,rmobile-iic"; | |
133 | reg = <0xe6820000 0x425>; | |
134 | interrupt-parent = <&gic>; | |
5f75e73c LP |
135 | interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH |
136 | 0 168 IRQ_TYPE_LEVEL_HIGH | |
137 | 0 169 IRQ_TYPE_LEVEL_HIGH | |
138 | 0 170 IRQ_TYPE_LEVEL_HIGH>; | |
eda3a4fa | 139 | status = "disabled"; |
48609533 SH |
140 | }; |
141 | ||
561a1a31 | 142 | i2c1: i2c@e6822000 { |
48609533 SH |
143 | #address-cells = <1>; |
144 | #size-cells = <0>; | |
145 | compatible = "renesas,rmobile-iic"; | |
146 | reg = <0xe6822000 0x425>; | |
147 | interrupt-parent = <&gic>; | |
5f75e73c LP |
148 | interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH |
149 | 0 52 IRQ_TYPE_LEVEL_HIGH | |
150 | 0 53 IRQ_TYPE_LEVEL_HIGH | |
151 | 0 54 IRQ_TYPE_LEVEL_HIGH>; | |
eda3a4fa | 152 | status = "disabled"; |
48609533 SH |
153 | }; |
154 | ||
561a1a31 | 155 | i2c2: i2c@e6824000 { |
48609533 SH |
156 | #address-cells = <1>; |
157 | #size-cells = <0>; | |
158 | compatible = "renesas,rmobile-iic"; | |
159 | reg = <0xe6824000 0x425>; | |
160 | interrupt-parent = <&gic>; | |
5f75e73c LP |
161 | interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH |
162 | 0 172 IRQ_TYPE_LEVEL_HIGH | |
163 | 0 173 IRQ_TYPE_LEVEL_HIGH | |
164 | 0 174 IRQ_TYPE_LEVEL_HIGH>; | |
eda3a4fa | 165 | status = "disabled"; |
48609533 SH |
166 | }; |
167 | ||
561a1a31 | 168 | i2c3: i2c@e6826000 { |
48609533 SH |
169 | #address-cells = <1>; |
170 | #size-cells = <0>; | |
171 | compatible = "renesas,rmobile-iic"; | |
172 | reg = <0xe6826000 0x425>; | |
173 | interrupt-parent = <&gic>; | |
5f75e73c LP |
174 | interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH |
175 | 0 184 IRQ_TYPE_LEVEL_HIGH | |
176 | 0 185 IRQ_TYPE_LEVEL_HIGH | |
177 | 0 186 IRQ_TYPE_LEVEL_HIGH>; | |
eda3a4fa | 178 | status = "disabled"; |
48609533 SH |
179 | }; |
180 | ||
561a1a31 | 181 | i2c4: i2c@e6828000 { |
48609533 SH |
182 | #address-cells = <1>; |
183 | #size-cells = <0>; | |
184 | compatible = "renesas,rmobile-iic"; | |
185 | reg = <0xe6828000 0x425>; | |
186 | interrupt-parent = <&gic>; | |
5f75e73c LP |
187 | interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH |
188 | 0 188 IRQ_TYPE_LEVEL_HIGH | |
189 | 0 189 IRQ_TYPE_LEVEL_HIGH | |
190 | 0 190 IRQ_TYPE_LEVEL_HIGH>; | |
eda3a4fa | 191 | status = "disabled"; |
48609533 | 192 | }; |
546e5d3e | 193 | |
33f6be3b | 194 | mmcif: mmc@e6bd0000 { |
546e5d3e GL |
195 | compatible = "renesas,sh-mmcif"; |
196 | reg = <0xe6bd0000 0x100>; | |
197 | interrupt-parent = <&gic>; | |
5f75e73c LP |
198 | interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH |
199 | 0 141 IRQ_TYPE_LEVEL_HIGH>; | |
546e5d3e GL |
200 | reg-io-width = <4>; |
201 | status = "disabled"; | |
202 | }; | |
203 | ||
33f6be3b | 204 | sdhi0: sd@ee100000 { |
e8a8b8a3 | 205 | compatible = "renesas,sdhi-sh73a0"; |
546e5d3e GL |
206 | reg = <0xee100000 0x100>; |
207 | interrupt-parent = <&gic>; | |
5f75e73c LP |
208 | interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH |
209 | 0 84 IRQ_TYPE_LEVEL_HIGH | |
210 | 0 85 IRQ_TYPE_LEVEL_HIGH>; | |
a463f731 | 211 | cap-sd-highspeed; |
546e5d3e GL |
212 | status = "disabled"; |
213 | }; | |
214 | ||
215 | /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ | |
33f6be3b | 216 | sdhi1: sd@ee120000 { |
e8a8b8a3 | 217 | compatible = "renesas,sdhi-sh73a0"; |
546e5d3e GL |
218 | reg = <0xee120000 0x100>; |
219 | interrupt-parent = <&gic>; | |
5f75e73c LP |
220 | interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH |
221 | 0 89 IRQ_TYPE_LEVEL_HIGH>; | |
546e5d3e | 222 | toshiba,mmc-wrprotect-disable; |
a463f731 | 223 | cap-sd-highspeed; |
546e5d3e GL |
224 | status = "disabled"; |
225 | }; | |
226 | ||
33f6be3b | 227 | sdhi2: sd@ee140000 { |
e8a8b8a3 | 228 | compatible = "renesas,sdhi-sh73a0"; |
546e5d3e GL |
229 | reg = <0xee140000 0x100>; |
230 | interrupt-parent = <&gic>; | |
5f75e73c LP |
231 | interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH |
232 | 0 105 IRQ_TYPE_LEVEL_HIGH>; | |
546e5d3e | 233 | toshiba,mmc-wrprotect-disable; |
a463f731 | 234 | cap-sd-highspeed; |
546e5d3e GL |
235 | status = "disabled"; |
236 | }; | |
3f59007e LP |
237 | |
238 | pfc: pfc@e6050000 { | |
239 | compatible = "renesas,pfc-sh73a0"; | |
240 | reg = <0xe6050000 0x8000>, | |
241 | <0xe605801c 0x1c>; | |
242 | gpio-controller; | |
243 | #gpio-cells = <2>; | |
aba76d28 LP |
244 | interrupts-extended = |
245 | <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, | |
246 | <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, | |
247 | <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, | |
248 | <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, | |
249 | <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, | |
250 | <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, | |
251 | <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, | |
252 | <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; | |
3f59007e | 253 | }; |
63b1303d KM |
254 | |
255 | sh_fsi2: sound@ec230000 { | |
256 | #sound-dai-cells = <1>; | |
257 | compatible = "renesas,sh_fsi2"; | |
258 | reg = <0xec230000 0x400>; | |
259 | interrupt-parent = <&gic>; | |
260 | interrupts = <0 146 0x4>; | |
261 | status = "disabled"; | |
262 | }; | |
a3f22db5 | 263 | }; |