Commit | Line | Data |
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a742795b UH |
1 | /* |
2 | * Device Tree Source for the Alt board | |
3 | * | |
4 | * Copyright (C) 2014 Renesas Electronics Corporation | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | #include "r8a7794.dtsi" | |
2b41091b | 13 | #include <dt-bindings/gpio/gpio.h> |
a742795b UH |
14 | |
15 | / { | |
16 | model = "Alt"; | |
17 | compatible = "renesas,alt", "renesas,r8a7794"; | |
18 | ||
19 | aliases { | |
20 | serial0 = &scif2; | |
e60a19f0 SH |
21 | i2c10 = &gpioi2c4; |
22 | i2c12 = &i2cexio4; | |
a742795b UH |
23 | }; |
24 | ||
25 | chosen { | |
89aeff99 | 26 | bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
b575f994 | 27 | stdout-path = "serial0:115200n8"; |
a742795b UH |
28 | }; |
29 | ||
30 | memory@40000000 { | |
31 | device_type = "memory"; | |
32 | reg = <0 0x40000000 0 0x40000000>; | |
33 | }; | |
34 | ||
e6ed3f53 SH |
35 | d3_3v: regulator-d3-3v { |
36 | compatible = "regulator-fixed"; | |
37 | regulator-name = "D3.3V"; | |
38 | regulator-min-microvolt = <3300000>; | |
39 | regulator-max-microvolt = <3300000>; | |
40 | regulator-boot-on; | |
41 | regulator-always-on; | |
42 | }; | |
43 | ||
2b41091b SH |
44 | vcc_sdhi0: regulator-vcc-sdhi0 { |
45 | compatible = "regulator-fixed"; | |
46 | ||
47 | regulator-name = "SDHI0 Vcc"; | |
48 | regulator-min-microvolt = <3300000>; | |
49 | regulator-max-microvolt = <3300000>; | |
50 | ||
51 | gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; | |
52 | enable-active-high; | |
53 | }; | |
54 | ||
55 | vccq_sdhi0: regulator-vccq-sdhi0 { | |
56 | compatible = "regulator-gpio"; | |
57 | ||
58 | regulator-name = "SDHI0 VccQ"; | |
59 | regulator-min-microvolt = <1800000>; | |
60 | regulator-max-microvolt = <3300000>; | |
61 | ||
62 | gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; | |
63 | gpios-states = <1>; | |
64 | states = <3300000 1 | |
65 | 1800000 0>; | |
66 | }; | |
67 | ||
68 | vcc_sdhi1: regulator-vcc-sdhi1 { | |
69 | compatible = "regulator-fixed"; | |
70 | ||
71 | regulator-name = "SDHI1 Vcc"; | |
72 | regulator-min-microvolt = <3300000>; | |
73 | regulator-max-microvolt = <3300000>; | |
74 | ||
75 | gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; | |
76 | enable-active-high; | |
77 | }; | |
78 | ||
79 | vccq_sdhi1: regulator-vccq-sdhi1 { | |
80 | compatible = "regulator-gpio"; | |
81 | ||
82 | regulator-name = "SDHI1 VccQ"; | |
83 | regulator-min-microvolt = <1800000>; | |
84 | regulator-max-microvolt = <3300000>; | |
85 | ||
86 | gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; | |
87 | gpios-states = <1>; | |
88 | states = <3300000 1 | |
89 | 1800000 0>; | |
90 | }; | |
91 | ||
a742795b UH |
92 | lbsc { |
93 | #address-cells = <1>; | |
94 | #size-cells = <1>; | |
95 | }; | |
876e7fb9 MD |
96 | |
97 | vga-encoder { | |
98 | compatible = "adi,adv7123"; | |
99 | ||
100 | ports { | |
101 | #address-cells = <1>; | |
102 | #size-cells = <0>; | |
103 | ||
104 | port@0 { | |
105 | reg = <0>; | |
106 | adv7123_in: endpoint { | |
107 | remote-endpoint = <&du_out_rgb1>; | |
108 | }; | |
109 | }; | |
110 | port@1 { | |
111 | reg = <1>; | |
112 | adv7123_out: endpoint { | |
113 | remote-endpoint = <&vga_in>; | |
114 | }; | |
115 | }; | |
116 | }; | |
117 | }; | |
118 | ||
119 | vga { | |
120 | compatible = "vga-connector"; | |
121 | ||
122 | port { | |
123 | vga_in: endpoint { | |
124 | remote-endpoint = <&adv7123_out>; | |
125 | }; | |
126 | }; | |
127 | }; | |
128 | ||
129 | x2_clk: x2-clock { | |
130 | compatible = "fixed-clock"; | |
131 | #clock-cells = <0>; | |
132 | clock-frequency = <74250000>; | |
133 | }; | |
134 | ||
135 | x13_clk: x13-clock { | |
136 | compatible = "fixed-clock"; | |
137 | #clock-cells = <0>; | |
138 | clock-frequency = <148500000>; | |
139 | }; | |
e60a19f0 SH |
140 | |
141 | gpioi2c4: i2c-10 { | |
142 | #address-cells = <1>; | |
143 | #size-cells = <0>; | |
144 | compatible = "i2c-gpio"; | |
145 | status = "disabled"; | |
146 | gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */ | |
147 | &gpio4 8 GPIO_ACTIVE_HIGH /* scl */ | |
148 | >; | |
149 | i2c-gpio,delay-us = <5>; | |
150 | }; | |
151 | ||
152 | /* | |
153 | * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA). | |
154 | * A fallback to GPIO is provided. | |
155 | */ | |
156 | i2cexio4: i2c-14 { | |
157 | compatible = "i2c-demux-pinctrl"; | |
158 | i2c-parent = <&i2c4>, <&gpioi2c4>; | |
159 | i2c-bus-name = "i2c-exio4"; | |
160 | #address-cells = <1>; | |
161 | #size-cells = <0>; | |
162 | }; | |
876e7fb9 MD |
163 | }; |
164 | ||
165 | &du { | |
13b8b8e8 MD |
166 | pinctrl-0 = <&du_pins>; |
167 | pinctrl-names = "default"; | |
876e7fb9 MD |
168 | status = "okay"; |
169 | ||
170 | clocks = <&mstp7_clks R8A7794_CLK_DU0>, | |
171 | <&mstp7_clks R8A7794_CLK_DU0>, | |
172 | <&x13_clk>, <&x2_clk>; | |
173 | clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; | |
174 | ||
175 | ports { | |
176 | port@1 { | |
177 | endpoint { | |
178 | remote-endpoint = <&adv7123_in>; | |
179 | }; | |
180 | }; | |
181 | }; | |
a742795b UH |
182 | }; |
183 | ||
184 | &extal_clk { | |
185 | clock-frequency = <20000000>; | |
186 | }; | |
187 | ||
22b16071 | 188 | &pfc { |
8a758a94 GU |
189 | pinctrl-0 = <&scif_clk_pins>; |
190 | pinctrl-names = "default"; | |
191 | ||
13b8b8e8 | 192 | du_pins: du { |
5591aa42 JM |
193 | groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; |
194 | function = "du1"; | |
13b8b8e8 MD |
195 | }; |
196 | ||
d88f5bc4 | 197 | scif2_pins: scif2 { |
be7359dd SH |
198 | groups = "scif2_data"; |
199 | function = "scif2"; | |
22b16071 SH |
200 | }; |
201 | ||
8a758a94 | 202 | scif_clk_pins: scif_clk { |
be7359dd SH |
203 | groups = "scif_clk"; |
204 | function = "scif_clk"; | |
8a758a94 GU |
205 | }; |
206 | ||
22b16071 | 207 | ether_pins: ether { |
be7359dd SH |
208 | groups = "eth_link", "eth_mdio", "eth_rmii"; |
209 | function = "eth"; | |
22b16071 SH |
210 | }; |
211 | ||
c175e7ab | 212 | phy1_pins: phy1 { |
be7359dd SH |
213 | groups = "intc_irq8"; |
214 | function = "intc"; | |
22b16071 | 215 | }; |
7f81bf72 UH |
216 | |
217 | i2c1_pins: i2c1 { | |
be7359dd SH |
218 | groups = "i2c1"; |
219 | function = "i2c1"; | |
7f81bf72 | 220 | }; |
d537543b | 221 | |
e60a19f0 SH |
222 | i2c4_pins: i2c4 { |
223 | groups = "i2c4"; | |
224 | function = "i2c4"; | |
225 | }; | |
226 | ||
d537543b | 227 | vin0_pins: vin0 { |
be7359dd SH |
228 | groups = "vin0_data8", "vin0_clk"; |
229 | function = "vin0"; | |
d537543b | 230 | }; |
2b41091b | 231 | |
e6ed3f53 SH |
232 | mmcif0_pins: mmcif0 { |
233 | groups = "mmc_data8", "mmc_ctrl"; | |
234 | function = "mmc"; | |
235 | }; | |
236 | ||
2b41091b SH |
237 | sdhi0_pins: sd0 { |
238 | groups = "sdhi0_data4", "sdhi0_ctrl"; | |
239 | function = "sdhi0"; | |
9510f349 SH |
240 | power-source = <3300>; |
241 | }; | |
242 | ||
243 | sdhi0_pins_uhs: sd0_uhs { | |
244 | groups = "sdhi0_data4", "sdhi0_ctrl"; | |
245 | function = "sdhi0"; | |
246 | power-source = <1800>; | |
2b41091b SH |
247 | }; |
248 | ||
249 | sdhi1_pins: sd1 { | |
250 | groups = "sdhi1_data4", "sdhi1_ctrl"; | |
251 | function = "sdhi1"; | |
9510f349 SH |
252 | power-source = <3300>; |
253 | }; | |
254 | ||
255 | sdhi1_pins_uhs: sd1_uhs { | |
256 | groups = "sdhi1_data4", "sdhi1_ctrl"; | |
257 | function = "sdhi1"; | |
258 | power-source = <1800>; | |
2b41091b | 259 | }; |
22b16071 SH |
260 | }; |
261 | ||
a742795b | 262 | &cmt0 { |
38e02908 | 263 | status = "okay"; |
a742795b UH |
264 | }; |
265 | ||
6b78e6ae | 266 | &pfc { |
fc10f3c9 | 267 | qspi_pins: qspi { |
be7359dd SH |
268 | groups = "qspi_ctrl", "qspi_data4"; |
269 | function = "qspi"; | |
6b78e6ae SH |
270 | }; |
271 | }; | |
272 | ||
a895b7cd | 273 | ðer { |
c175e7ab SH |
274 | pinctrl-0 = <ðer_pins &phy1_pins>; |
275 | pinctrl-names = "default"; | |
276 | ||
a895b7cd LP |
277 | phy-handle = <&phy1>; |
278 | renesas,ether-link-active-low; | |
279 | status = "okay"; | |
280 | ||
281 | phy1: ethernet-phy@1 { | |
282 | reg = <1>; | |
283 | interrupt-parent = <&irqc0>; | |
1fc58015 | 284 | interrupts = <8 IRQ_TYPE_LEVEL_LOW>; |
a895b7cd LP |
285 | micrel,led-mode = <1>; |
286 | }; | |
287 | }; | |
288 | ||
e6ed3f53 SH |
289 | &mmcif0 { |
290 | pinctrl-0 = <&mmcif0_pins>; | |
291 | pinctrl-names = "default"; | |
292 | ||
293 | vmmc-supply = <&d3_3v>; | |
294 | vqmmc-supply = <&d3_3v>; | |
295 | bus-width = <8>; | |
296 | non-removable; | |
297 | status = "okay"; | |
298 | }; | |
299 | ||
2b41091b SH |
300 | &sdhi0 { |
301 | pinctrl-0 = <&sdhi0_pins>; | |
9510f349 SH |
302 | pinctrl-1 = <&sdhi0_pins_uhs>; |
303 | pinctrl-names = "default", "state_uhs"; | |
2b41091b SH |
304 | |
305 | vmmc-supply = <&vcc_sdhi0>; | |
306 | vqmmc-supply = <&vccq_sdhi0>; | |
307 | cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; | |
308 | wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; | |
9510f349 | 309 | sd-uhs-sdr50; |
f9f2fc0b | 310 | sd-uhs-sdr104; |
2b41091b SH |
311 | status = "okay"; |
312 | }; | |
313 | ||
314 | &sdhi1 { | |
315 | pinctrl-0 = <&sdhi1_pins>; | |
9510f349 SH |
316 | pinctrl-1 = <&sdhi1_pins_uhs>; |
317 | pinctrl-names = "default", "state_uhs"; | |
2b41091b SH |
318 | |
319 | vmmc-supply = <&vcc_sdhi1>; | |
320 | vqmmc-supply = <&vccq_sdhi1>; | |
321 | cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; | |
322 | wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; | |
9510f349 | 323 | sd-uhs-sdr50; |
2b41091b SH |
324 | status = "okay"; |
325 | }; | |
326 | ||
7f81bf72 UH |
327 | &i2c1 { |
328 | pinctrl-0 = <&i2c1_pins>; | |
329 | pinctrl-names = "default"; | |
330 | ||
331 | status = "okay"; | |
332 | clock-frequency = <400000>; | |
d537543b UH |
333 | |
334 | composite-in@20 { | |
335 | compatible = "adi,adv7180"; | |
336 | reg = <0x20>; | |
337 | remote = <&vin0>; | |
338 | ||
339 | port { | |
340 | adv7180: endpoint { | |
341 | bus-width = <8>; | |
342 | remote-endpoint = <&vin0ep>; | |
343 | }; | |
344 | }; | |
345 | }; | |
346 | }; | |
347 | ||
e60a19f0 SH |
348 | &i2c4 { |
349 | pinctrl-0 = <&i2c4_pins>; | |
350 | pinctrl-names = "i2c-exio4"; | |
351 | }; | |
352 | ||
d537543b UH |
353 | &vin0 { |
354 | status = "okay"; | |
355 | pinctrl-0 = <&vin0_pins>; | |
356 | pinctrl-names = "default"; | |
357 | ||
358 | port { | |
359 | #address-cells = <1>; | |
360 | #size-cells = <0>; | |
361 | ||
362 | vin0ep: endpoint { | |
363 | remote-endpoint = <&adv7180>; | |
364 | bus-width = <8>; | |
365 | }; | |
366 | }; | |
7f81bf72 UH |
367 | }; |
368 | ||
a742795b | 369 | &scif2 { |
7256587c SH |
370 | pinctrl-0 = <&scif2_pins>; |
371 | pinctrl-names = "default"; | |
372 | ||
38e02908 | 373 | status = "okay"; |
a742795b | 374 | }; |
6b78e6ae | 375 | |
8a758a94 GU |
376 | &scif_clk { |
377 | clock-frequency = <14745600>; | |
378 | status = "okay"; | |
379 | }; | |
380 | ||
6b78e6ae SH |
381 | &qspi { |
382 | pinctrl-0 = <&qspi_pins>; | |
383 | pinctrl-names = "default"; | |
384 | ||
385 | status = "okay"; | |
386 | ||
387 | flash@0 { | |
388 | compatible = "spansion,s25fl512s", "jedec,spi-nor"; | |
389 | reg = <0>; | |
390 | spi-max-frequency = <30000000>; | |
391 | spi-tx-bus-width = <4>; | |
392 | spi-rx-bus-width = <4>; | |
393 | spi-cpol; | |
394 | spi-cpha; | |
395 | m25p,fast-read; | |
396 | ||
397 | partitions { | |
398 | compatible = "fixed-partitions"; | |
399 | #address-cells = <1>; | |
400 | #size-cells = <1>; | |
401 | ||
402 | partition@0 { | |
403 | label = "loader"; | |
404 | reg = <0x00000000 0x00040000>; | |
405 | read-only; | |
406 | }; | |
407 | partition@40000 { | |
408 | label = "system"; | |
409 | reg = <0x00040000 0x00040000>; | |
410 | read-only; | |
411 | }; | |
412 | partition@80000 { | |
413 | label = "user"; | |
414 | reg = <0x00080000 0x03f80000>; | |
415 | }; | |
416 | }; | |
417 | }; | |
418 | }; |