Commit | Line | Data |
---|---|---|
0d0771ab HN |
1 | /* |
2 | * Device Tree Source for the r8a7791 SoC | |
3 | * | |
118e4e6a | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
2e5d55ce SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0d0771ab HN |
7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | |
9 | * version 2. This program is licensed "as is" without any warranty of any | |
10 | * kind, whether express or implied. | |
11 | */ | |
12 | ||
362b334b | 13 | #include <dt-bindings/clock/r8a7791-cpg-mssr.h> |
5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
8574de86 | 16 | #include <dt-bindings/power/r8a7791-sysc.h> |
5f75e73c | 17 | |
0d0771ab HN |
18 | / { |
19 | compatible = "renesas,r8a7791"; | |
0d0771ab HN |
20 | #address-cells = <2>; |
21 | #size-cells = <2>; | |
22 | ||
5bd3de7b WS |
23 | aliases { |
24 | i2c0 = &i2c0; | |
25 | i2c1 = &i2c1; | |
26 | i2c2 = &i2c2; | |
27 | i2c3 = &i2c3; | |
28 | i2c4 = &i2c4; | |
29 | i2c5 = &i2c5; | |
36408d9d WS |
30 | i2c6 = &i2c6; |
31 | i2c7 = &i2c7; | |
32 | i2c8 = &i2c8; | |
6f3e4ee3 | 33 | spi0 = &qspi; |
7713d3ab GU |
34 | spi1 = &msiof0; |
35 | spi2 = &msiof1; | |
36 | spi3 = &msiof2; | |
0b8d1d57 SS |
37 | vin0 = &vin0; |
38 | vin1 = &vin1; | |
39 | vin2 = &vin2; | |
5bd3de7b WS |
40 | }; |
41 | ||
21b05c52 SH |
42 | /* |
43 | * The external audio clocks are configured as 0 Hz fixed frequency | |
44 | * clocks by default. | |
45 | * Boards that provide audio clocks should override them. | |
46 | */ | |
47 | audio_clk_a: audio_clk_a { | |
48 | compatible = "fixed-clock"; | |
49 | #clock-cells = <0>; | |
50 | clock-frequency = <0>; | |
51 | }; | |
52 | audio_clk_b: audio_clk_b { | |
53 | compatible = "fixed-clock"; | |
54 | #clock-cells = <0>; | |
55 | clock-frequency = <0>; | |
56 | }; | |
57 | audio_clk_c: audio_clk_c { | |
58 | compatible = "fixed-clock"; | |
59 | #clock-cells = <0>; | |
60 | clock-frequency = <0>; | |
61 | }; | |
62 | ||
63 | /* External CAN clock */ | |
64 | can_clk: can { | |
65 | compatible = "fixed-clock"; | |
66 | #clock-cells = <0>; | |
67 | /* This value must be overridden by the board. */ | |
68 | clock-frequency = <0>; | |
69 | }; | |
70 | ||
0d0771ab HN |
71 | cpus { |
72 | #address-cells = <1>; | |
73 | #size-cells = <0>; | |
477cbcbd | 74 | enable-method = "renesas,apmu"; |
0d0771ab HN |
75 | |
76 | cpu0: cpu@0 { | |
77 | device_type = "cpu"; | |
78 | compatible = "arm,cortex-a15"; | |
79 | reg = <0>; | |
896b79df | 80 | clock-frequency = <1500000000>; |
a57004ec | 81 | voltage-tolerance = <1>; /* 1% */ |
362b334b | 82 | clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; |
a57004ec | 83 | clock-latency = <300000>; /* 300 us */ |
8574de86 | 84 | power-domains = <&sysc R8A7791_PD_CA15_CPU0>; |
8ffe93a5 | 85 | next-level-cache = <&L2_CA15>; |
a57004ec GI |
86 | |
87 | /* kHz - uV - OPPs unknown yet */ | |
88 | operating-points = <1500000 1000000>, | |
89 | <1312500 1000000>, | |
90 | <1125000 1000000>, | |
91 | < 937500 1000000>, | |
92 | < 750000 1000000>, | |
93 | < 375000 1000000>; | |
0d0771ab | 94 | }; |
15ab426c MD |
95 | |
96 | cpu1: cpu@1 { | |
97 | device_type = "cpu"; | |
98 | compatible = "arm,cortex-a15"; | |
99 | reg = <1>; | |
896b79df | 100 | clock-frequency = <1500000000>; |
60b672fe | 101 | clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; |
8574de86 | 102 | power-domains = <&sysc R8A7791_PD_CA15_CPU1>; |
8ffe93a5 | 103 | next-level-cache = <&L2_CA15>; |
15ab426c | 104 | }; |
6f9314ce | 105 | |
5d6a2165 | 106 | L2_CA15: cache-controller-0 { |
6f9314ce | 107 | compatible = "cache"; |
6f9314ce GU |
108 | power-domains = <&sysc R8A7791_PD_CA15_SCU>; |
109 | cache-unified; | |
110 | cache-level = <2>; | |
111 | }; | |
0d0771ab HN |
112 | }; |
113 | ||
21b05c52 SH |
114 | /* External root clock */ |
115 | extal_clk: extal { | |
116 | compatible = "fixed-clock"; | |
117 | #clock-cells = <0>; | |
118 | /* This value must be overridden by the board. */ | |
119 | clock-frequency = <0>; | |
120 | }; | |
cac68a56 | 121 | |
21b05c52 SH |
122 | /* External PCIe clock - can be overridden by the board */ |
123 | pcie_bus_clk: pcie_bus { | |
124 | compatible = "fixed-clock"; | |
125 | #clock-cells = <0>; | |
126 | clock-frequency = <0>; | |
127 | }; | |
cac68a56 | 128 | |
21b05c52 SH |
129 | /* External SCIF clock */ |
130 | scif_clk: scif { | |
131 | compatible = "fixed-clock"; | |
132 | #clock-cells = <0>; | |
133 | /* This value must be overridden by the board. */ | |
134 | clock-frequency = <0>; | |
cac68a56 KM |
135 | }; |
136 | ||
bb21803e SH |
137 | soc { |
138 | compatible = "simple-bus"; | |
139 | interrupt-parent = <&gic>; | |
477cbcbd | 140 | |
bb21803e SH |
141 | #address-cells = <2>; |
142 | #size-cells = <2>; | |
143 | ranges; | |
144 | ||
145 | gpio0: gpio@e6050000 { | |
146 | compatible = "renesas,gpio-r8a7791", | |
147 | "renesas,rcar-gen2-gpio"; | |
148 | reg = <0 0xe6050000 0 0x50>; | |
149 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
150 | #gpio-cells = <2>; | |
151 | gpio-controller; | |
152 | gpio-ranges = <&pfc 0 0 32>; | |
153 | #interrupt-cells = <2>; | |
154 | interrupt-controller; | |
155 | clocks = <&cpg CPG_MOD 912>; | |
156 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
157 | resets = <&cpg 912>; | |
158 | }; | |
d77db73e | 159 | |
bb21803e SH |
160 | gpio1: gpio@e6051000 { |
161 | compatible = "renesas,gpio-r8a7791", | |
162 | "renesas,rcar-gen2-gpio"; | |
163 | reg = <0 0xe6051000 0 0x50>; | |
164 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
165 | #gpio-cells = <2>; | |
166 | gpio-controller; | |
167 | gpio-ranges = <&pfc 0 32 26>; | |
168 | #interrupt-cells = <2>; | |
169 | interrupt-controller; | |
170 | clocks = <&cpg CPG_MOD 911>; | |
171 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
172 | resets = <&cpg 911>; | |
173 | }; | |
ab87e3fc | 174 | |
bb21803e SH |
175 | gpio2: gpio@e6052000 { |
176 | compatible = "renesas,gpio-r8a7791", | |
177 | "renesas,rcar-gen2-gpio"; | |
178 | reg = <0 0xe6052000 0 0x50>; | |
179 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
180 | #gpio-cells = <2>; | |
181 | gpio-controller; | |
182 | gpio-ranges = <&pfc 0 64 32>; | |
183 | #interrupt-cells = <2>; | |
184 | interrupt-controller; | |
185 | clocks = <&cpg CPG_MOD 910>; | |
186 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
187 | resets = <&cpg 910>; | |
188 | }; | |
ab87e3fc | 189 | |
bb21803e SH |
190 | gpio3: gpio@e6053000 { |
191 | compatible = "renesas,gpio-r8a7791", | |
192 | "renesas,rcar-gen2-gpio"; | |
193 | reg = <0 0xe6053000 0 0x50>; | |
194 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
195 | #gpio-cells = <2>; | |
196 | gpio-controller; | |
197 | gpio-ranges = <&pfc 0 96 32>; | |
198 | #interrupt-cells = <2>; | |
199 | interrupt-controller; | |
200 | clocks = <&cpg CPG_MOD 909>; | |
201 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
202 | resets = <&cpg 909>; | |
203 | }; | |
ab87e3fc | 204 | |
bb21803e SH |
205 | gpio4: gpio@e6054000 { |
206 | compatible = "renesas,gpio-r8a7791", | |
207 | "renesas,rcar-gen2-gpio"; | |
208 | reg = <0 0xe6054000 0 0x50>; | |
209 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
210 | #gpio-cells = <2>; | |
211 | gpio-controller; | |
212 | gpio-ranges = <&pfc 0 128 32>; | |
213 | #interrupt-cells = <2>; | |
214 | interrupt-controller; | |
215 | clocks = <&cpg CPG_MOD 908>; | |
216 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
217 | resets = <&cpg 908>; | |
218 | }; | |
ab87e3fc | 219 | |
bb21803e SH |
220 | gpio5: gpio@e6055000 { |
221 | compatible = "renesas,gpio-r8a7791", | |
222 | "renesas,rcar-gen2-gpio"; | |
223 | reg = <0 0xe6055000 0 0x50>; | |
224 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
225 | #gpio-cells = <2>; | |
226 | gpio-controller; | |
227 | gpio-ranges = <&pfc 0 160 32>; | |
228 | #interrupt-cells = <2>; | |
229 | interrupt-controller; | |
230 | clocks = <&cpg CPG_MOD 907>; | |
231 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
232 | resets = <&cpg 907>; | |
233 | }; | |
ab87e3fc | 234 | |
bb21803e SH |
235 | gpio6: gpio@e6055400 { |
236 | compatible = "renesas,gpio-r8a7791", | |
237 | "renesas,rcar-gen2-gpio"; | |
238 | reg = <0 0xe6055400 0 0x50>; | |
239 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
240 | #gpio-cells = <2>; | |
241 | gpio-controller; | |
242 | gpio-ranges = <&pfc 0 192 32>; | |
243 | #interrupt-cells = <2>; | |
244 | interrupt-controller; | |
245 | clocks = <&cpg CPG_MOD 905>; | |
246 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
247 | resets = <&cpg 905>; | |
248 | }; | |
ab87e3fc | 249 | |
bb21803e SH |
250 | gpio7: gpio@e6055800 { |
251 | compatible = "renesas,gpio-r8a7791", | |
252 | "renesas,rcar-gen2-gpio"; | |
253 | reg = <0 0xe6055800 0 0x50>; | |
254 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
255 | #gpio-cells = <2>; | |
256 | gpio-controller; | |
257 | gpio-ranges = <&pfc 0 224 26>; | |
258 | #interrupt-cells = <2>; | |
259 | interrupt-controller; | |
260 | clocks = <&cpg CPG_MOD 904>; | |
261 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
262 | resets = <&cpg 904>; | |
263 | }; | |
ab87e3fc | 264 | |
bb21803e SH |
265 | pfc: pin-controller@e6060000 { |
266 | compatible = "renesas,pfc-r8a7791"; | |
267 | reg = <0 0xe6060000 0 0x250>; | |
268 | }; | |
ab87e3fc | 269 | |
bb21803e SH |
270 | cpg: clock-controller@e6150000 { |
271 | compatible = "renesas,r8a7791-cpg-mssr"; | |
272 | reg = <0 0xe6150000 0 0x1000>; | |
273 | clocks = <&extal_clk>, <&usb_extal_clk>; | |
274 | clock-names = "extal", "usb_extal"; | |
275 | #clock-cells = <2>; | |
276 | #power-domain-cells = <0>; | |
277 | #reset-cells = <1>; | |
278 | }; | |
d103f4d3 | 279 | |
bb21803e SH |
280 | apmu@e6152000 { |
281 | compatible = "renesas,r8a7791-apmu", "renesas,apmu"; | |
282 | reg = <0 0xe6152000 0 0x188>; | |
283 | cpus = <&cpu0 &cpu1>; | |
284 | }; | |
03586acf | 285 | |
bb21803e SH |
286 | rst: reset-controller@e6160000 { |
287 | compatible = "renesas,r8a7791-rst"; | |
288 | reg = <0 0xe6160000 0 0x0100>; | |
289 | }; | |
ceaa1894 | 290 | |
bb21803e SH |
291 | sysc: system-controller@e6180000 { |
292 | compatible = "renesas,r8a7791-sysc"; | |
293 | reg = <0 0xe6180000 0 0x0200>; | |
294 | #power-domain-cells = <1>; | |
295 | }; | |
ceaa1894 | 296 | |
bb21803e SH |
297 | irqc0: interrupt-controller@e61c0000 { |
298 | compatible = "renesas,irqc-r8a7791", "renesas,irqc"; | |
299 | #interrupt-cells = <2>; | |
300 | interrupt-controller; | |
301 | reg = <0 0xe61c0000 0 0x200>; | |
302 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, | |
303 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
304 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
305 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | |
306 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, | |
307 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, | |
308 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, | |
309 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, | |
310 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, | |
311 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
312 | clocks = <&cpg CPG_MOD 407>; | |
313 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
314 | resets = <&cpg 407>; | |
315 | }; | |
55146927 | 316 | |
bb21803e SH |
317 | thermal: thermal@e61f0000 { |
318 | compatible = "renesas,thermal-r8a7791", | |
319 | "renesas,rcar-gen2-thermal", | |
320 | "renesas,rcar-thermal"; | |
321 | reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; | |
322 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
323 | clocks = <&cpg CPG_MOD 522>; | |
324 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
325 | resets = <&cpg 522>; | |
326 | #thermal-sensor-cells = <0>; | |
327 | }; | |
fde8feef | 328 | |
bb21803e SH |
329 | ipmmu_sy0: mmu@e6280000 { |
330 | compatible = "renesas,ipmmu-r8a7791", | |
331 | "renesas,ipmmu-vmsa"; | |
332 | reg = <0 0xe6280000 0 0x1000>; | |
333 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, | |
334 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
335 | #iommu-cells = <1>; | |
336 | status = "disabled"; | |
337 | }; | |
fde8feef | 338 | |
bb21803e SH |
339 | ipmmu_sy1: mmu@e6290000 { |
340 | compatible = "renesas,ipmmu-r8a7791", | |
341 | "renesas,ipmmu-vmsa"; | |
342 | reg = <0 0xe6290000 0 0x1000>; | |
343 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; | |
344 | #iommu-cells = <1>; | |
345 | status = "disabled"; | |
346 | }; | |
8994fff6 | 347 | |
bb21803e SH |
348 | ipmmu_ds: mmu@e6740000 { |
349 | compatible = "renesas,ipmmu-r8a7791", | |
350 | "renesas,ipmmu-vmsa"; | |
351 | reg = <0 0xe6740000 0 0x1000>; | |
352 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, | |
353 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
354 | #iommu-cells = <1>; | |
355 | status = "disabled"; | |
356 | }; | |
8994fff6 | 357 | |
bb21803e SH |
358 | ipmmu_mp: mmu@ec680000 { |
359 | compatible = "renesas,ipmmu-r8a7791", | |
360 | "renesas,ipmmu-vmsa"; | |
361 | reg = <0 0xec680000 0 0x1000>; | |
362 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; | |
363 | #iommu-cells = <1>; | |
364 | status = "disabled"; | |
365 | }; | |
e3e25edc | 366 | |
bb21803e SH |
367 | ipmmu_mx: mmu@fe951000 { |
368 | compatible = "renesas,ipmmu-r8a7791", | |
369 | "renesas,ipmmu-vmsa"; | |
370 | reg = <0 0xfe951000 0 0x1000>; | |
371 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, | |
372 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
373 | #iommu-cells = <1>; | |
374 | status = "disabled"; | |
375 | }; | |
e3e25edc | 376 | |
bb21803e SH |
377 | ipmmu_rt: mmu@ffc80000 { |
378 | compatible = "renesas,ipmmu-r8a7791", | |
379 | "renesas,ipmmu-vmsa"; | |
380 | reg = <0 0xffc80000 0 0x1000>; | |
381 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; | |
382 | #iommu-cells = <1>; | |
383 | status = "disabled"; | |
384 | }; | |
5bd3de7b | 385 | |
bb21803e SH |
386 | ipmmu_gp: mmu@e62a0000 { |
387 | compatible = "renesas,ipmmu-r8a7791", | |
388 | "renesas,ipmmu-vmsa"; | |
389 | reg = <0 0xe62a0000 0 0x1000>; | |
390 | interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, | |
391 | <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; | |
392 | #iommu-cells = <1>; | |
393 | status = "disabled"; | |
394 | }; | |
5bd3de7b | 395 | |
bb21803e SH |
396 | icram0: sram@e63a0000 { |
397 | compatible = "mmio-sram"; | |
398 | reg = <0 0xe63a0000 0 0x12000>; | |
399 | }; | |
5bd3de7b | 400 | |
bb21803e SH |
401 | icram1: sram@e63c0000 { |
402 | compatible = "mmio-sram"; | |
403 | reg = <0 0xe63c0000 0 0x1000>; | |
404 | #address-cells = <1>; | |
405 | #size-cells = <1>; | |
406 | ranges = <0 0 0xe63c0000 0x1000>; | |
5bd3de7b | 407 | |
bb21803e SH |
408 | smp-sram@0 { |
409 | compatible = "renesas,smp-sram"; | |
410 | reg = <0 0x10>; | |
411 | }; | |
412 | }; | |
5bd3de7b | 413 | |
bb21803e SH |
414 | /* The memory map in the User's Manual maps the cores to |
415 | * bus numbers | |
416 | */ | |
417 | i2c0: i2c@e6508000 { | |
418 | #address-cells = <1>; | |
419 | #size-cells = <0>; | |
420 | compatible = "renesas,i2c-r8a7791", | |
421 | "renesas,rcar-gen2-i2c"; | |
422 | reg = <0 0xe6508000 0 0x40>; | |
423 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
424 | clocks = <&cpg CPG_MOD 931>; | |
425 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
426 | resets = <&cpg 931>; | |
427 | i2c-scl-internal-delay-ns = <6>; | |
428 | status = "disabled"; | |
429 | }; | |
5bd3de7b | 430 | |
bb21803e SH |
431 | i2c1: i2c@e6518000 { |
432 | #address-cells = <1>; | |
433 | #size-cells = <0>; | |
434 | compatible = "renesas,i2c-r8a7791", | |
435 | "renesas,rcar-gen2-i2c"; | |
436 | reg = <0 0xe6518000 0 0x40>; | |
437 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
438 | clocks = <&cpg CPG_MOD 930>; | |
439 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
440 | resets = <&cpg 930>; | |
441 | i2c-scl-internal-delay-ns = <6>; | |
442 | status = "disabled"; | |
443 | }; | |
36408d9d | 444 | |
bb21803e SH |
445 | i2c2: i2c@e6530000 { |
446 | #address-cells = <1>; | |
447 | #size-cells = <0>; | |
448 | compatible = "renesas,i2c-r8a7791", | |
449 | "renesas,rcar-gen2-i2c"; | |
450 | reg = <0 0xe6530000 0 0x40>; | |
451 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
452 | clocks = <&cpg CPG_MOD 929>; | |
453 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
454 | resets = <&cpg 929>; | |
455 | i2c-scl-internal-delay-ns = <6>; | |
456 | status = "disabled"; | |
457 | }; | |
36408d9d | 458 | |
bb21803e SH |
459 | i2c3: i2c@e6540000 { |
460 | #address-cells = <1>; | |
461 | #size-cells = <0>; | |
462 | compatible = "renesas,i2c-r8a7791", | |
463 | "renesas,rcar-gen2-i2c"; | |
464 | reg = <0 0xe6540000 0 0x40>; | |
465 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
466 | clocks = <&cpg CPG_MOD 928>; | |
467 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
468 | resets = <&cpg 928>; | |
469 | i2c-scl-internal-delay-ns = <6>; | |
470 | status = "disabled"; | |
471 | }; | |
36408d9d | 472 | |
bb21803e SH |
473 | i2c4: i2c@e6520000 { |
474 | #address-cells = <1>; | |
475 | #size-cells = <0>; | |
476 | compatible = "renesas,i2c-r8a7791", | |
477 | "renesas,rcar-gen2-i2c"; | |
478 | reg = <0 0xe6520000 0 0x40>; | |
479 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
480 | clocks = <&cpg CPG_MOD 927>; | |
481 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
482 | resets = <&cpg 927>; | |
483 | i2c-scl-internal-delay-ns = <6>; | |
484 | status = "disabled"; | |
485 | }; | |
59e79895 | 486 | |
bb21803e SH |
487 | i2c5: i2c@e6528000 { |
488 | /* doesn't need pinmux */ | |
489 | #address-cells = <1>; | |
490 | #size-cells = <0>; | |
491 | compatible = "renesas,i2c-r8a7791", | |
492 | "renesas,rcar-gen2-i2c"; | |
493 | reg = <0 0xe6528000 0 0x40>; | |
494 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
495 | clocks = <&cpg CPG_MOD 925>; | |
496 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
497 | resets = <&cpg 925>; | |
498 | i2c-scl-internal-delay-ns = <110>; | |
499 | status = "disabled"; | |
500 | }; | |
8edae499 | 501 | |
bb21803e SH |
502 | i2c6: i2c@e60b0000 { |
503 | /* doesn't need pinmux */ | |
504 | #address-cells = <1>; | |
505 | #size-cells = <0>; | |
506 | compatible = "renesas,iic-r8a7791", | |
507 | "renesas,rcar-gen2-iic", | |
508 | "renesas,rmobile-iic"; | |
509 | reg = <0 0xe60b0000 0 0x425>; | |
510 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
511 | clocks = <&cpg CPG_MOD 926>; | |
512 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, | |
513 | <&dmac1 0x77>, <&dmac1 0x78>; | |
514 | dma-names = "tx", "rx", "tx", "rx"; | |
515 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
516 | resets = <&cpg 926>; | |
517 | status = "disabled"; | |
518 | }; | |
b7ed8a0d | 519 | |
bb21803e SH |
520 | i2c7: i2c@e6500000 { |
521 | #address-cells = <1>; | |
522 | #size-cells = <0>; | |
523 | compatible = "renesas,iic-r8a7791", | |
524 | "renesas,rcar-gen2-iic", | |
525 | "renesas,rmobile-iic"; | |
526 | reg = <0 0xe6500000 0 0x425>; | |
527 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; | |
528 | clocks = <&cpg CPG_MOD 318>; | |
529 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, | |
530 | <&dmac1 0x61>, <&dmac1 0x62>; | |
531 | dma-names = "tx", "rx", "tx", "rx"; | |
532 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
533 | resets = <&cpg 318>; | |
534 | status = "disabled"; | |
535 | }; | |
b7ed8a0d | 536 | |
bb21803e SH |
537 | i2c8: i2c@e6510000 { |
538 | #address-cells = <1>; | |
539 | #size-cells = <0>; | |
540 | compatible = "renesas,iic-r8a7791", | |
541 | "renesas,rcar-gen2-iic", | |
542 | "renesas,rmobile-iic"; | |
543 | reg = <0 0xe6510000 0 0x425>; | |
544 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; | |
545 | clocks = <&cpg CPG_MOD 323>; | |
546 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, | |
547 | <&dmac1 0x65>, <&dmac1 0x66>; | |
548 | dma-names = "tx", "rx", "tx", "rx"; | |
549 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
550 | resets = <&cpg 323>; | |
551 | status = "disabled"; | |
552 | }; | |
b7ed8a0d | 553 | |
bb21803e SH |
554 | hsusb: usb@e6590000 { |
555 | compatible = "renesas,usbhs-r8a7791", | |
556 | "renesas,rcar-gen2-usbhs"; | |
557 | reg = <0 0xe6590000 0 0x100>; | |
558 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
559 | clocks = <&cpg CPG_MOD 704>; | |
560 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
561 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
562 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
563 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
564 | resets = <&cpg 704>; | |
565 | renesas,buswait = <4>; | |
566 | phys = <&usb0 1>; | |
567 | phy-names = "usb"; | |
568 | status = "disabled"; | |
569 | }; | |
9640cf25 | 570 | |
bb21803e SH |
571 | usbphy: usb-phy@e6590100 { |
572 | compatible = "renesas,usb-phy-r8a7791", | |
573 | "renesas,rcar-gen2-usb-phy"; | |
574 | reg = <0 0xe6590100 0 0x100>; | |
575 | #address-cells = <1>; | |
576 | #size-cells = <0>; | |
577 | clocks = <&cpg CPG_MOD 704>; | |
578 | clock-names = "usbhs"; | |
579 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
580 | resets = <&cpg 704>; | |
581 | status = "disabled"; | |
9640cf25 | 582 | |
bb21803e SH |
583 | usb0: usb-channel@0 { |
584 | reg = <0>; | |
585 | #phy-cells = <1>; | |
586 | }; | |
587 | usb2: usb-channel@2 { | |
588 | reg = <2>; | |
589 | #phy-cells = <1>; | |
590 | }; | |
591 | }; | |
9640cf25 | 592 | |
bb21803e SH |
593 | usb_dmac0: dma-controller@e65a0000 { |
594 | compatible = "renesas,r8a7791-usb-dmac", | |
595 | "renesas,usb-dmac"; | |
596 | reg = <0 0xe65a0000 0 0x100>; | |
597 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
598 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
599 | interrupt-names = "ch0", "ch1"; | |
600 | clocks = <&cpg CPG_MOD 330>; | |
601 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
602 | resets = <&cpg 330>; | |
603 | #dma-cells = <1>; | |
604 | dma-channels = <2>; | |
605 | }; | |
9640cf25 | 606 | |
bb21803e SH |
607 | usb_dmac1: dma-controller@e65b0000 { |
608 | compatible = "renesas,r8a7791-usb-dmac", | |
609 | "renesas,usb-dmac"; | |
610 | reg = <0 0xe65b0000 0 0x100>; | |
611 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
612 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
613 | interrupt-names = "ch0", "ch1"; | |
614 | clocks = <&cpg CPG_MOD 331>; | |
615 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
616 | resets = <&cpg 331>; | |
617 | #dma-cells = <1>; | |
618 | dma-channels = <2>; | |
619 | }; | |
9640cf25 | 620 | |
bb21803e SH |
621 | dmac0: dma-controller@e6700000 { |
622 | compatible = "renesas,dmac-r8a7791", | |
623 | "renesas,rcar-dmac"; | |
624 | reg = <0 0xe6700000 0 0x20000>; | |
625 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH | |
626 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
627 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
628 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
629 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
630 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
631 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
632 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
633 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
634 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
635 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
636 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
637 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
638 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
639 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
640 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
641 | interrupt-names = "error", | |
642 | "ch0", "ch1", "ch2", "ch3", | |
643 | "ch4", "ch5", "ch6", "ch7", | |
644 | "ch8", "ch9", "ch10", "ch11", | |
645 | "ch12", "ch13", "ch14"; | |
646 | clocks = <&cpg CPG_MOD 219>; | |
647 | clock-names = "fck"; | |
648 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
649 | resets = <&cpg 219>; | |
650 | #dma-cells = <1>; | |
651 | dma-channels = <15>; | |
652 | }; | |
9640cf25 | 653 | |
bb21803e SH |
654 | dmac1: dma-controller@e6720000 { |
655 | compatible = "renesas,dmac-r8a7791", | |
656 | "renesas,rcar-dmac"; | |
657 | reg = <0 0xe6720000 0 0x20000>; | |
658 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
659 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
660 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
661 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
662 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
663 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
664 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
665 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
666 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
667 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
668 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
669 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
670 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
671 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
672 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
673 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
674 | interrupt-names = "error", | |
675 | "ch0", "ch1", "ch2", "ch3", | |
676 | "ch4", "ch5", "ch6", "ch7", | |
677 | "ch8", "ch9", "ch10", "ch11", | |
678 | "ch12", "ch13", "ch14"; | |
679 | clocks = <&cpg CPG_MOD 218>; | |
680 | clock-names = "fck"; | |
681 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
682 | resets = <&cpg 218>; | |
683 | #dma-cells = <1>; | |
684 | dma-channels = <15>; | |
685 | }; | |
9640cf25 | 686 | |
bb21803e SH |
687 | avb: ethernet@e6800000 { |
688 | compatible = "renesas,etheravb-r8a7791", | |
689 | "renesas,etheravb-rcar-gen2"; | |
690 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; | |
691 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; | |
692 | clocks = <&cpg CPG_MOD 812>; | |
693 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
694 | resets = <&cpg 812>; | |
695 | #address-cells = <1>; | |
696 | #size-cells = <0>; | |
697 | status = "disabled"; | |
698 | }; | |
9640cf25 | 699 | |
bb21803e SH |
700 | qspi: spi@e6b10000 { |
701 | compatible = "renesas,qspi-r8a7791", "renesas,qspi"; | |
702 | reg = <0 0xe6b10000 0 0x2c>; | |
703 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; | |
704 | clocks = <&cpg CPG_MOD 917>; | |
705 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, | |
706 | <&dmac1 0x17>, <&dmac1 0x18>; | |
707 | dma-names = "tx", "rx", "tx", "rx"; | |
708 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
709 | resets = <&cpg 917>; | |
710 | num-cs = <1>; | |
711 | #address-cells = <1>; | |
712 | #size-cells = <0>; | |
713 | status = "disabled"; | |
714 | }; | |
9640cf25 | 715 | |
bb21803e SH |
716 | scifa0: serial@e6c40000 { |
717 | compatible = "renesas,scifa-r8a7791", | |
718 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
719 | reg = <0 0xe6c40000 0 64>; | |
720 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
721 | clocks = <&cpg CPG_MOD 204>; | |
722 | clock-names = "fck"; | |
723 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, | |
724 | <&dmac1 0x21>, <&dmac1 0x22>; | |
725 | dma-names = "tx", "rx", "tx", "rx"; | |
726 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
727 | resets = <&cpg 204>; | |
728 | status = "disabled"; | |
729 | }; | |
9640cf25 | 730 | |
bb21803e SH |
731 | scifa1: serial@e6c50000 { |
732 | compatible = "renesas,scifa-r8a7791", | |
733 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
734 | reg = <0 0xe6c50000 0 64>; | |
735 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
736 | clocks = <&cpg CPG_MOD 203>; | |
737 | clock-names = "fck"; | |
738 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, | |
739 | <&dmac1 0x25>, <&dmac1 0x26>; | |
740 | dma-names = "tx", "rx", "tx", "rx"; | |
741 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
742 | resets = <&cpg 203>; | |
743 | status = "disabled"; | |
744 | }; | |
9640cf25 | 745 | |
bb21803e SH |
746 | scifa2: serial@e6c60000 { |
747 | compatible = "renesas,scifa-r8a7791", | |
748 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
749 | reg = <0 0xe6c60000 0 64>; | |
750 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; | |
751 | clocks = <&cpg CPG_MOD 202>; | |
752 | clock-names = "fck"; | |
753 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, | |
754 | <&dmac1 0x27>, <&dmac1 0x28>; | |
755 | dma-names = "tx", "rx", "tx", "rx"; | |
756 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
757 | resets = <&cpg 202>; | |
758 | status = "disabled"; | |
759 | }; | |
e15ebbfa | 760 | |
bb21803e SH |
761 | scifa3: serial@e6c70000 { |
762 | compatible = "renesas,scifa-r8a7791", | |
763 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
764 | reg = <0 0xe6c70000 0 64>; | |
765 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
766 | clocks = <&cpg CPG_MOD 1106>; | |
767 | clock-names = "fck"; | |
768 | dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, | |
769 | <&dmac1 0x1b>, <&dmac1 0x1c>; | |
770 | dma-names = "tx", "rx", "tx", "rx"; | |
771 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
772 | resets = <&cpg 1106>; | |
773 | status = "disabled"; | |
774 | }; | |
9640cf25 | 775 | |
bb21803e SH |
776 | scifa4: serial@e6c78000 { |
777 | compatible = "renesas,scifa-r8a7791", | |
778 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
779 | reg = <0 0xe6c78000 0 64>; | |
780 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
781 | clocks = <&cpg CPG_MOD 1107>; | |
782 | clock-names = "fck"; | |
783 | dmas = <&dmac0 0x1f>, <&dmac0 0x20>, | |
784 | <&dmac1 0x1f>, <&dmac1 0x20>; | |
785 | dma-names = "tx", "rx", "tx", "rx"; | |
786 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
787 | resets = <&cpg 1107>; | |
788 | status = "disabled"; | |
789 | }; | |
9640cf25 | 790 | |
bb21803e SH |
791 | scifa5: serial@e6c80000 { |
792 | compatible = "renesas,scifa-r8a7791", | |
793 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
794 | reg = <0 0xe6c80000 0 64>; | |
795 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | |
796 | clocks = <&cpg CPG_MOD 1108>; | |
797 | clock-names = "fck"; | |
798 | dmas = <&dmac0 0x23>, <&dmac0 0x24>, | |
799 | <&dmac1 0x23>, <&dmac1 0x24>; | |
800 | dma-names = "tx", "rx", "tx", "rx"; | |
801 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
802 | resets = <&cpg 1108>; | |
803 | status = "disabled"; | |
804 | }; | |
9640cf25 | 805 | |
bb21803e SH |
806 | scifb0: serial@e6c20000 { |
807 | compatible = "renesas,scifb-r8a7791", | |
808 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
809 | reg = <0 0xe6c20000 0 0x100>; | |
810 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
811 | clocks = <&cpg CPG_MOD 206>; | |
812 | clock-names = "fck"; | |
813 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, | |
814 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
815 | dma-names = "tx", "rx", "tx", "rx"; | |
816 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
817 | resets = <&cpg 206>; | |
818 | status = "disabled"; | |
819 | }; | |
9640cf25 | 820 | |
bb21803e SH |
821 | scifb1: serial@e6c30000 { |
822 | compatible = "renesas,scifb-r8a7791", | |
823 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
824 | reg = <0 0xe6c30000 0 0x100>; | |
825 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; | |
826 | clocks = <&cpg CPG_MOD 207>; | |
827 | clock-names = "fck"; | |
828 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, | |
829 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
830 | dma-names = "tx", "rx", "tx", "rx"; | |
831 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
832 | resets = <&cpg 207>; | |
833 | status = "disabled"; | |
834 | }; | |
9640cf25 | 835 | |
bb21803e SH |
836 | scifb2: serial@e6ce0000 { |
837 | compatible = "renesas,scifb-r8a7791", | |
838 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
839 | reg = <0 0xe6ce0000 0 0x100>; | |
840 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | |
841 | clocks = <&cpg CPG_MOD 216>; | |
842 | clock-names = "fck"; | |
843 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, | |
844 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
845 | dma-names = "tx", "rx", "tx", "rx"; | |
846 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
847 | resets = <&cpg 216>; | |
848 | status = "disabled"; | |
849 | }; | |
9640cf25 | 850 | |
bb21803e SH |
851 | scif0: serial@e6e60000 { |
852 | compatible = "renesas,scif-r8a7791", | |
853 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
854 | reg = <0 0xe6e60000 0 64>; | |
855 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
856 | clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
857 | <&scif_clk>; | |
858 | clock-names = "fck", "brg_int", "scif_clk"; | |
859 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, | |
860 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
861 | dma-names = "tx", "rx", "tx", "rx"; | |
862 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
863 | resets = <&cpg 721>; | |
864 | status = "disabled"; | |
865 | }; | |
9640cf25 | 866 | |
bb21803e SH |
867 | scif1: serial@e6e68000 { |
868 | compatible = "renesas,scif-r8a7791", | |
869 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
870 | reg = <0 0xe6e68000 0 64>; | |
871 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
872 | clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
873 | <&scif_clk>; | |
874 | clock-names = "fck", "brg_int", "scif_clk"; | |
875 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, | |
876 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
877 | dma-names = "tx", "rx", "tx", "rx"; | |
878 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
879 | resets = <&cpg 720>; | |
880 | status = "disabled"; | |
881 | }; | |
5ccce438 | 882 | |
bb21803e SH |
883 | scif2: serial@e6e58000 { |
884 | compatible = "renesas,scif-r8a7791", | |
885 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
886 | reg = <0 0xe6e58000 0 64>; | |
887 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; | |
888 | clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
889 | <&scif_clk>; | |
890 | clock-names = "fck", "brg_int", "scif_clk"; | |
891 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, | |
892 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
893 | dma-names = "tx", "rx", "tx", "rx"; | |
894 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
895 | resets = <&cpg 719>; | |
896 | status = "disabled"; | |
897 | }; | |
d7ff9382 | 898 | |
bb21803e SH |
899 | scif3: serial@e6ea8000 { |
900 | compatible = "renesas,scif-r8a7791", | |
901 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
902 | reg = <0 0xe6ea8000 0 64>; | |
903 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
904 | clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
905 | <&scif_clk>; | |
906 | clock-names = "fck", "brg_int", "scif_clk"; | |
907 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>, | |
908 | <&dmac1 0x2f>, <&dmac1 0x30>; | |
909 | dma-names = "tx", "rx", "tx", "rx"; | |
910 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
911 | resets = <&cpg 718>; | |
912 | status = "disabled"; | |
d7ff9382 | 913 | }; |
5ccce438 | 914 | |
bb21803e SH |
915 | scif4: serial@e6ee0000 { |
916 | compatible = "renesas,scif-r8a7791", | |
917 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
918 | reg = <0 0xe6ee0000 0 64>; | |
919 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | |
920 | clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
921 | <&scif_clk>; | |
922 | clock-names = "fck", "brg_int", "scif_clk"; | |
923 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, | |
924 | <&dmac1 0xfb>, <&dmac1 0xfc>; | |
925 | dma-names = "tx", "rx", "tx", "rx"; | |
926 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
927 | resets = <&cpg 715>; | |
928 | status = "disabled"; | |
929 | }; | |
2e5d55ce | 930 | |
bb21803e SH |
931 | scif5: serial@e6ee8000 { |
932 | compatible = "renesas,scif-r8a7791", | |
933 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
934 | reg = <0 0xe6ee8000 0 64>; | |
935 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
936 | clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
937 | <&scif_clk>; | |
938 | clock-names = "fck", "brg_int", "scif_clk"; | |
939 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, | |
940 | <&dmac1 0xfd>, <&dmac1 0xfe>; | |
941 | dma-names = "tx", "rx", "tx", "rx"; | |
942 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
943 | resets = <&cpg 714>; | |
944 | status = "disabled"; | |
945 | }; | |
46ece349 | 946 | |
bb21803e SH |
947 | hscif0: serial@e62c0000 { |
948 | compatible = "renesas,hscif-r8a7791", | |
949 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
950 | reg = <0 0xe62c0000 0 96>; | |
951 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
952 | clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
953 | <&scif_clk>; | |
954 | clock-names = "fck", "brg_int", "scif_clk"; | |
955 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, | |
956 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
957 | dma-names = "tx", "rx", "tx", "rx"; | |
958 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
959 | resets = <&cpg 717>; | |
960 | status = "disabled"; | |
961 | }; | |
b8532c69 | 962 | |
bb21803e SH |
963 | hscif1: serial@e62c8000 { |
964 | compatible = "renesas,hscif-r8a7791", | |
965 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
966 | reg = <0 0xe62c8000 0 96>; | |
967 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
968 | clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
969 | <&scif_clk>; | |
970 | clock-names = "fck", "brg_int", "scif_clk"; | |
971 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, | |
972 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
973 | dma-names = "tx", "rx", "tx", "rx"; | |
974 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
975 | resets = <&cpg 716>; | |
976 | status = "disabled"; | |
977 | }; | |
b8532c69 | 978 | |
bb21803e SH |
979 | hscif2: serial@e62d0000 { |
980 | compatible = "renesas,hscif-r8a7791", | |
981 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
982 | reg = <0 0xe62d0000 0 96>; | |
983 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
984 | clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
985 | <&scif_clk>; | |
986 | clock-names = "fck", "brg_int", "scif_clk"; | |
987 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, | |
988 | <&dmac1 0x3b>, <&dmac1 0x3c>; | |
989 | dma-names = "tx", "rx", "tx", "rx"; | |
990 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
991 | resets = <&cpg 713>; | |
992 | status = "disabled"; | |
993 | }; | |
1c1fee7c | 994 | |
bb21803e SH |
995 | msiof0: spi@e6e20000 { |
996 | compatible = "renesas,msiof-r8a7791", | |
997 | "renesas,rcar-gen2-msiof"; | |
998 | reg = <0 0xe6e20000 0 0x0064>; | |
999 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
1000 | clocks = <&cpg CPG_MOD 000>; | |
1001 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, | |
1002 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1003 | dma-names = "tx", "rx", "tx", "rx"; | |
1004 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1005 | resets = <&cpg 0>; | |
1006 | #address-cells = <1>; | |
1007 | #size-cells = <0>; | |
1008 | status = "disabled"; | |
1009 | }; | |
3b7e530d | 1010 | |
bb21803e SH |
1011 | msiof1: spi@e6e10000 { |
1012 | compatible = "renesas,msiof-r8a7791", | |
1013 | "renesas,rcar-gen2-msiof"; | |
1014 | reg = <0 0xe6e10000 0 0x0064>; | |
1015 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
1016 | clocks = <&cpg CPG_MOD 208>; | |
1017 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, | |
1018 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1019 | dma-names = "tx", "rx", "tx", "rx"; | |
1020 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1021 | resets = <&cpg 208>; | |
1022 | #address-cells = <1>; | |
1023 | #size-cells = <0>; | |
1024 | status = "disabled"; | |
3b7e530d | 1025 | }; |
bb21803e SH |
1026 | |
1027 | msiof2: spi@e6e00000 { | |
1028 | compatible = "renesas,msiof-r8a7791", | |
1029 | "renesas,rcar-gen2-msiof"; | |
1030 | reg = <0 0xe6e00000 0 0x0064>; | |
1031 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
1032 | clocks = <&cpg CPG_MOD 205>; | |
1033 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, | |
1034 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1035 | dma-names = "tx", "rx", "tx", "rx"; | |
1036 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1037 | resets = <&cpg 205>; | |
1038 | #address-cells = <1>; | |
1039 | #size-cells = <0>; | |
1040 | status = "disabled"; | |
3b7e530d | 1041 | }; |
3b7e530d | 1042 | |
bb21803e SH |
1043 | adc: adc@e6e54000 { |
1044 | compatible = "renesas,r8a7791-gyroadc", | |
1045 | "renesas,rcar-gyroadc"; | |
1046 | reg = <0 0xe6e54000 0 64>; | |
1047 | clocks = <&cpg CPG_MOD 901>; | |
1048 | clock-names = "fck"; | |
1049 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1050 | resets = <&cpg 901>; | |
1051 | status = "disabled"; | |
1052 | }; | |
0b8d1d57 | 1053 | |
bb21803e SH |
1054 | can0: can@e6e80000 { |
1055 | compatible = "renesas,can-r8a7791", | |
1056 | "renesas,rcar-gen2-can"; | |
1057 | reg = <0 0xe6e80000 0 0x1000>; | |
1058 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
1059 | clocks = <&cpg CPG_MOD 916>, | |
1060 | <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; | |
1061 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1062 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1063 | resets = <&cpg 916>; | |
1064 | status = "disabled"; | |
1065 | }; | |
0b8d1d57 | 1066 | |
bb21803e SH |
1067 | can1: can@e6e88000 { |
1068 | compatible = "renesas,can-r8a7791", | |
1069 | "renesas,rcar-gen2-can"; | |
1070 | reg = <0 0xe6e88000 0 0x1000>; | |
1071 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
1072 | clocks = <&cpg CPG_MOD 915>, | |
1073 | <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; | |
1074 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1075 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1076 | resets = <&cpg 915>; | |
1077 | status = "disabled"; | |
1078 | }; | |
0b8d1d57 | 1079 | |
bb21803e SH |
1080 | vin0: video@e6ef0000 { |
1081 | compatible = "renesas,vin-r8a7791", | |
1082 | "renesas,rcar-gen2-vin"; | |
1083 | reg = <0 0xe6ef0000 0 0x1000>; | |
1084 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; | |
1085 | clocks = <&cpg CPG_MOD 811>; | |
1086 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1087 | resets = <&cpg 811>; | |
1088 | status = "disabled"; | |
1089 | }; | |
8eefac2d | 1090 | |
bb21803e SH |
1091 | vin1: video@e6ef1000 { |
1092 | compatible = "renesas,vin-r8a7791", | |
1093 | "renesas,rcar-gen2-vin"; | |
1094 | reg = <0 0xe6ef1000 0 0x1000>; | |
1095 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; | |
1096 | clocks = <&cpg CPG_MOD 810>; | |
1097 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1098 | resets = <&cpg 810>; | |
1099 | status = "disabled"; | |
1100 | }; | |
8eefac2d | 1101 | |
bb21803e SH |
1102 | vin2: video@e6ef2000 { |
1103 | compatible = "renesas,vin-r8a7791", | |
1104 | "renesas,rcar-gen2-vin"; | |
1105 | reg = <0 0xe6ef2000 0 0x1000>; | |
1106 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; | |
1107 | clocks = <&cpg CPG_MOD 809>; | |
1108 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1109 | resets = <&cpg 809>; | |
1110 | status = "disabled"; | |
1111 | }; | |
1112 | ||
1113 | rcar_sound: sound@ec500000 { | |
1114 | /* | |
1115 | * #sound-dai-cells is required | |
1116 | * | |
1117 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1118 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1119 | */ | |
1120 | compatible = "renesas,rcar_sound-r8a7791", | |
1121 | "renesas,rcar_sound-gen2"; | |
1122 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
1123 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1124 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
1125 | <0 0xec541000 0 0x280>, /* SSI */ | |
1126 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
1127 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
1128 | ||
1129 | clocks = <&cpg CPG_MOD 1005>, | |
1130 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1131 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1132 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1133 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1134 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
1135 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, | |
1136 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1137 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1138 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1139 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
1140 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1141 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1142 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, | |
1143 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, | |
1144 | <&cpg CPG_CORE R8A7791_CLK_M2>; | |
1145 | clock-names = "ssi-all", | |
1146 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1147 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1148 | "ssi.1", "ssi.0", "src.9", "src.8", | |
1149 | "src.7", "src.6", "src.5", "src.4", | |
1150 | "src.3", "src.2", "src.1", "src.0", | |
1151 | "ctu.0", "ctu.1", | |
1152 | "mix.0", "mix.1", | |
1153 | "dvc.0", "dvc.1", | |
1154 | "clk_a", "clk_b", "clk_c", "clk_i"; | |
1155 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1156 | resets = <&cpg 1005>, | |
1157 | <&cpg 1006>, <&cpg 1007>, | |
1158 | <&cpg 1008>, <&cpg 1009>, | |
1159 | <&cpg 1010>, <&cpg 1011>, | |
1160 | <&cpg 1012>, <&cpg 1013>, | |
1161 | <&cpg 1014>, <&cpg 1015>; | |
1162 | reset-names = "ssi-all", | |
1163 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1164 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1165 | "ssi.1", "ssi.0"; | |
1166 | ||
1167 | status = "disabled"; | |
1168 | ||
1169 | rcar_sound,dvc { | |
1170 | dvc0: dvc-0 { | |
1171 | dmas = <&audma1 0xbc>; | |
1172 | dma-names = "tx"; | |
1173 | }; | |
1174 | dvc1: dvc-1 { | |
1175 | dmas = <&audma1 0xbe>; | |
1176 | dma-names = "tx"; | |
1177 | }; | |
1178 | }; | |
1179 | ||
1180 | rcar_sound,mix { | |
1181 | mix0: mix-0 { }; | |
1182 | mix1: mix-1 { }; | |
1183 | }; | |
1184 | ||
1185 | rcar_sound,ctu { | |
1186 | ctu00: ctu-0 { }; | |
1187 | ctu01: ctu-1 { }; | |
1188 | ctu02: ctu-2 { }; | |
1189 | ctu03: ctu-3 { }; | |
1190 | ctu10: ctu-4 { }; | |
1191 | ctu11: ctu-5 { }; | |
1192 | ctu12: ctu-6 { }; | |
1193 | ctu13: ctu-7 { }; | |
1194 | }; | |
1195 | ||
1196 | rcar_sound,src { | |
1197 | src0: src-0 { | |
1198 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; | |
1199 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
1200 | dma-names = "rx", "tx"; | |
1201 | }; | |
1202 | src1: src-1 { | |
1203 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; | |
1204 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
1205 | dma-names = "rx", "tx"; | |
1206 | }; | |
1207 | src2: src-2 { | |
1208 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | |
1209 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
1210 | dma-names = "rx", "tx"; | |
1211 | }; | |
1212 | src3: src-3 { | |
1213 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | |
1214 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
1215 | dma-names = "rx", "tx"; | |
1216 | }; | |
1217 | src4: src-4 { | |
1218 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | |
1219 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
1220 | dma-names = "rx", "tx"; | |
1221 | }; | |
1222 | src5: src-5 { | |
1223 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | |
1224 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
1225 | dma-names = "rx", "tx"; | |
1226 | }; | |
1227 | src6: src-6 { | |
1228 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | |
1229 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
1230 | dma-names = "rx", "tx"; | |
1231 | }; | |
1232 | src7: src-7 { | |
1233 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | |
1234 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
1235 | dma-names = "rx", "tx"; | |
1236 | }; | |
1237 | src8: src-8 { | |
1238 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | |
1239 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
1240 | dma-names = "rx", "tx"; | |
1241 | }; | |
1242 | src9: src-9 { | |
1243 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | |
1244 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
1245 | dma-names = "rx", "tx"; | |
1246 | }; | |
1247 | }; | |
1248 | ||
1249 | rcar_sound,ssi { | |
1250 | ssi0: ssi-0 { | |
1251 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; | |
1252 | dmas = <&audma0 0x01>, <&audma1 0x02>, | |
1253 | <&audma0 0x15>, <&audma1 0x16>; | |
1254 | dma-names = "rx", "tx", "rxu", "txu"; | |
1255 | }; | |
1256 | ssi1: ssi-1 { | |
1257 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; | |
1258 | dmas = <&audma0 0x03>, <&audma1 0x04>, | |
1259 | <&audma0 0x49>, <&audma1 0x4a>; | |
1260 | dma-names = "rx", "tx", "rxu", "txu"; | |
1261 | }; | |
1262 | ssi2: ssi-2 { | |
1263 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | |
1264 | dmas = <&audma0 0x05>, <&audma1 0x06>, | |
1265 | <&audma0 0x63>, <&audma1 0x64>; | |
1266 | dma-names = "rx", "tx", "rxu", "txu"; | |
1267 | }; | |
1268 | ssi3: ssi-3 { | |
1269 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | |
1270 | dmas = <&audma0 0x07>, <&audma1 0x08>, | |
1271 | <&audma0 0x6f>, <&audma1 0x70>; | |
1272 | dma-names = "rx", "tx", "rxu", "txu"; | |
1273 | }; | |
1274 | ssi4: ssi-4 { | |
1275 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | |
1276 | dmas = <&audma0 0x09>, <&audma1 0x0a>, | |
1277 | <&audma0 0x71>, <&audma1 0x72>; | |
1278 | dma-names = "rx", "tx", "rxu", "txu"; | |
1279 | }; | |
1280 | ssi5: ssi-5 { | |
1281 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | |
1282 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, | |
1283 | <&audma0 0x73>, <&audma1 0x74>; | |
1284 | dma-names = "rx", "tx", "rxu", "txu"; | |
1285 | }; | |
1286 | ssi6: ssi-6 { | |
1287 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | |
1288 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, | |
1289 | <&audma0 0x75>, <&audma1 0x76>; | |
1290 | dma-names = "rx", "tx", "rxu", "txu"; | |
1291 | }; | |
1292 | ssi7: ssi-7 { | |
1293 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | |
1294 | dmas = <&audma0 0x0f>, <&audma1 0x10>, | |
1295 | <&audma0 0x79>, <&audma1 0x7a>; | |
1296 | dma-names = "rx", "tx", "rxu", "txu"; | |
1297 | }; | |
1298 | ssi8: ssi-8 { | |
1299 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | |
1300 | dmas = <&audma0 0x11>, <&audma1 0x12>, | |
1301 | <&audma0 0x7b>, <&audma1 0x7c>; | |
1302 | dma-names = "rx", "tx", "rxu", "txu"; | |
1303 | }; | |
1304 | ssi9: ssi-9 { | |
1305 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | |
1306 | dmas = <&audma0 0x13>, <&audma1 0x14>, | |
1307 | <&audma0 0x7d>, <&audma1 0x7e>; | |
1308 | dma-names = "rx", "tx", "rxu", "txu"; | |
1309 | }; | |
1310 | }; | |
1311 | }; | |
1312 | ||
1313 | audma0: dma-controller@ec700000 { | |
1314 | compatible = "renesas,dmac-r8a7791", | |
1315 | "renesas,rcar-dmac"; | |
1316 | reg = <0 0xec700000 0 0x10000>; | |
1317 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
1318 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
1319 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
1320 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
1321 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
1322 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
1323 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
1324 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
1325 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
1326 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
1327 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
1328 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
1329 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
1330 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
1331 | interrupt-names = "error", | |
1332 | "ch0", "ch1", "ch2", "ch3", | |
1333 | "ch4", "ch5", "ch6", "ch7", | |
1334 | "ch8", "ch9", "ch10", "ch11", | |
1335 | "ch12"; | |
1336 | clocks = <&cpg CPG_MOD 502>; | |
1337 | clock-names = "fck"; | |
1338 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1339 | resets = <&cpg 502>; | |
1340 | #dma-cells = <1>; | |
1341 | dma-channels = <13>; | |
1342 | }; | |
1343 | ||
1344 | audma1: dma-controller@ec720000 { | |
1345 | compatible = "renesas,dmac-r8a7791", | |
1346 | "renesas,rcar-dmac"; | |
1347 | reg = <0 0xec720000 0 0x10000>; | |
1348 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
1349 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
1350 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
1351 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
1352 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
1353 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
1354 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
1355 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
1356 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
1357 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
1358 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
1359 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
1360 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
1361 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
1362 | interrupt-names = "error", | |
1363 | "ch0", "ch1", "ch2", "ch3", | |
1364 | "ch4", "ch5", "ch6", "ch7", | |
1365 | "ch8", "ch9", "ch10", "ch11", | |
1366 | "ch12"; | |
1367 | clocks = <&cpg CPG_MOD 501>; | |
1368 | clock-names = "fck"; | |
1369 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1370 | resets = <&cpg 501>; | |
1371 | #dma-cells = <1>; | |
1372 | dma-channels = <13>; | |
1373 | }; | |
8eefac2d | 1374 | |
bb21803e SH |
1375 | xhci: usb@ee000000 { |
1376 | compatible = "renesas,xhci-r8a7791", | |
1377 | "renesas,rcar-gen2-xhci"; | |
1378 | reg = <0 0xee000000 0 0xc00>; | |
1379 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; | |
1380 | clocks = <&cpg CPG_MOD 328>; | |
1381 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1382 | resets = <&cpg 328>; | |
1383 | phys = <&usb2 1>; | |
1384 | phy-names = "usb"; | |
1385 | status = "disabled"; | |
1386 | }; | |
1387 | ||
1388 | pci0: pci@ee090000 { | |
1389 | compatible = "renesas,pci-r8a7791", | |
1390 | "renesas,pci-rcar-gen2"; | |
1391 | device_type = "pci"; | |
1392 | reg = <0 0xee090000 0 0xc00>, | |
1393 | <0 0xee080000 0 0x1100>; | |
1394 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1395 | clocks = <&cpg CPG_MOD 703>; | |
1396 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1397 | resets = <&cpg 703>; | |
1398 | status = "disabled"; | |
1399 | ||
1400 | bus-range = <0 0>; | |
1401 | #address-cells = <3>; | |
1402 | #size-cells = <2>; | |
1403 | #interrupt-cells = <1>; | |
1404 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1405 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
1406 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1407 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1408 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1409 | ||
1410 | usb@1,0 { | |
1411 | reg = <0x800 0 0 0 0>; | |
1412 | phys = <&usb0 0>; | |
1413 | phy-names = "usb"; | |
1414 | }; | |
1415 | ||
1416 | usb@2,0 { | |
1417 | reg = <0x1000 0 0 0 0>; | |
1418 | phys = <&usb0 0>; | |
1419 | phy-names = "usb"; | |
1420 | }; | |
1421 | }; | |
1422 | ||
1423 | pci1: pci@ee0d0000 { | |
1424 | compatible = "renesas,pci-r8a7791", | |
1425 | "renesas,pci-rcar-gen2"; | |
1426 | device_type = "pci"; | |
1427 | reg = <0 0xee0d0000 0 0xc00>, | |
1428 | <0 0xee0c0000 0 0x1100>; | |
1429 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1430 | clocks = <&cpg CPG_MOD 703>; | |
1431 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1432 | resets = <&cpg 703>; | |
1433 | status = "disabled"; | |
1434 | ||
1435 | bus-range = <1 1>; | |
1436 | #address-cells = <3>; | |
1437 | #size-cells = <2>; | |
1438 | #interrupt-cells = <1>; | |
1439 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1440 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
1441 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1442 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1443 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1444 | ||
1445 | usb@1,0 { | |
1446 | reg = <0x10800 0 0 0 0>; | |
1447 | phys = <&usb2 0>; | |
1448 | phy-names = "usb"; | |
1449 | }; | |
1450 | ||
1451 | usb@2,0 { | |
1452 | reg = <0x11000 0 0 0 0>; | |
1453 | phys = <&usb2 0>; | |
1454 | phy-names = "usb"; | |
1455 | }; | |
1456 | }; | |
1457 | ||
1458 | sdhi0: sd@ee100000 { | |
1459 | compatible = "renesas,sdhi-r8a7791", | |
1460 | "renesas,rcar-gen2-sdhi"; | |
1461 | reg = <0 0xee100000 0 0x328>; | |
1462 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
1463 | clocks = <&cpg CPG_MOD 314>; | |
1464 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, | |
1465 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
1466 | dma-names = "tx", "rx", "tx", "rx"; | |
1467 | max-frequency = <195000000>; | |
1468 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1469 | resets = <&cpg 314>; | |
1470 | status = "disabled"; | |
1471 | }; | |
1472 | ||
1473 | sdhi1: sd@ee140000 { | |
1474 | compatible = "renesas,sdhi-r8a7791", | |
1475 | "renesas,rcar-gen2-sdhi"; | |
1476 | reg = <0 0xee140000 0 0x100>; | |
1477 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; | |
1478 | clocks = <&cpg CPG_MOD 312>; | |
1479 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, | |
1480 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
1481 | dma-names = "tx", "rx", "tx", "rx"; | |
1482 | max-frequency = <97500000>; | |
1483 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1484 | resets = <&cpg 312>; | |
1485 | status = "disabled"; | |
1486 | }; | |
1487 | ||
1488 | sdhi2: sd@ee160000 { | |
1489 | compatible = "renesas,sdhi-r8a7791", | |
1490 | "renesas,rcar-gen2-sdhi"; | |
1491 | reg = <0 0xee160000 0 0x100>; | |
1492 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
1493 | clocks = <&cpg CPG_MOD 311>; | |
1494 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, | |
1495 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
1496 | dma-names = "tx", "rx", "tx", "rx"; | |
1497 | max-frequency = <97500000>; | |
1498 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1499 | resets = <&cpg 311>; | |
1500 | status = "disabled"; | |
1501 | }; | |
1502 | ||
1503 | mmcif0: mmc@ee200000 { | |
1504 | compatible = "renesas,mmcif-r8a7791", | |
1505 | "renesas,sh-mmcif"; | |
1506 | reg = <0 0xee200000 0 0x80>; | |
1507 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
1508 | clocks = <&cpg CPG_MOD 315>; | |
1509 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, | |
1510 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
1511 | dma-names = "tx", "rx", "tx", "rx"; | |
1512 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1513 | resets = <&cpg 315>; | |
1514 | reg-io-width = <4>; | |
1515 | status = "disabled"; | |
1516 | max-frequency = <97500000>; | |
1517 | }; | |
1518 | ||
1519 | sata0: sata@ee300000 { | |
1520 | compatible = "renesas,sata-r8a7791", | |
1521 | "renesas,rcar-gen2-sata"; | |
1522 | reg = <0 0xee300000 0 0x2000>; | |
1523 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
1524 | clocks = <&cpg CPG_MOD 815>; | |
1525 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1526 | resets = <&cpg 815>; | |
1527 | status = "disabled"; | |
1528 | }; | |
1529 | ||
1530 | sata1: sata@ee500000 { | |
1531 | compatible = "renesas,sata-r8a7791", | |
1532 | "renesas,rcar-gen2-sata"; | |
1533 | reg = <0 0xee500000 0 0x2000>; | |
1534 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; | |
1535 | clocks = <&cpg CPG_MOD 814>; | |
1536 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1537 | resets = <&cpg 814>; | |
1538 | status = "disabled"; | |
1539 | }; | |
1540 | ||
1541 | ether: ethernet@ee700000 { | |
1542 | compatible = "renesas,ether-r8a7791", | |
1543 | "renesas,rcar-gen2-ether"; | |
1544 | reg = <0 0xee700000 0 0x400>; | |
1545 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; | |
1546 | clocks = <&cpg CPG_MOD 813>; | |
1547 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1548 | resets = <&cpg 813>; | |
1549 | phy-mode = "rmii"; | |
8eefac2d LP |
1550 | #address-cells = <1>; |
1551 | #size-cells = <0>; | |
bb21803e SH |
1552 | status = "disabled"; |
1553 | }; | |
8eefac2d | 1554 | |
bb21803e SH |
1555 | gic: interrupt-controller@f1001000 { |
1556 | compatible = "arm,gic-400"; | |
1557 | #interrupt-cells = <3>; | |
1558 | #address-cells = <0>; | |
1559 | interrupt-controller; | |
1560 | reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, | |
1561 | <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; | |
1562 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; | |
1563 | clocks = <&cpg CPG_MOD 408>; | |
1564 | clock-names = "clk"; | |
1565 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1566 | resets = <&cpg 408>; | |
1567 | }; | |
1568 | ||
1569 | pciec: pcie@fe000000 { | |
1570 | compatible = "renesas,pcie-r8a7791", | |
1571 | "renesas,pcie-rcar-gen2"; | |
1572 | reg = <0 0xfe000000 0 0x80000>; | |
1573 | #address-cells = <3>; | |
1574 | #size-cells = <2>; | |
1575 | bus-range = <0x00 0xff>; | |
1576 | device_type = "pci"; | |
1577 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1578 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1579 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1580 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1581 | /* Map all possible DDR as inbound ranges */ | |
1582 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1583 | 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; | |
1584 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | |
1585 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1586 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
1587 | #interrupt-cells = <1>; | |
1588 | interrupt-map-mask = <0 0 0 0>; | |
1589 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
1590 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
1591 | clock-names = "pcie", "pcie_bus"; | |
1592 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1593 | resets = <&cpg 319>; | |
1594 | status = "disabled"; | |
1595 | }; | |
1596 | ||
1597 | vsp@fe928000 { | |
1598 | compatible = "renesas,vsp1"; | |
1599 | reg = <0 0xfe928000 0 0x8000>; | |
1600 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; | |
1601 | clocks = <&cpg CPG_MOD 131>; | |
1602 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1603 | resets = <&cpg 131>; | |
1604 | }; | |
1605 | ||
1606 | vsp@fe930000 { | |
1607 | compatible = "renesas,vsp1"; | |
1608 | reg = <0 0xfe930000 0 0x8000>; | |
1609 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; | |
1610 | clocks = <&cpg CPG_MOD 128>; | |
1611 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1612 | resets = <&cpg 128>; | |
1613 | }; | |
1614 | ||
1615 | vsp@fe938000 { | |
1616 | compatible = "renesas,vsp1"; | |
1617 | reg = <0 0xfe938000 0 0x8000>; | |
1618 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; | |
1619 | clocks = <&cpg CPG_MOD 127>; | |
1620 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1621 | resets = <&cpg 127>; | |
1622 | }; | |
1623 | ||
1624 | jpu: jpeg-codec@fe980000 { | |
1625 | compatible = "renesas,jpu-r8a7791", | |
1626 | "renesas,rcar-gen2-jpu"; | |
1627 | reg = <0 0xfe980000 0 0x10300>; | |
1628 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; | |
1629 | clocks = <&cpg CPG_MOD 106>; | |
1630 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1631 | resets = <&cpg 106>; | |
1632 | }; | |
1633 | ||
1634 | du: display@feb00000 { | |
1635 | compatible = "renesas,du-r8a7791"; | |
e5c3f470 | 1636 | reg = <0 0xfeb00000 0 0x40000>; |
bb21803e SH |
1637 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
1638 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; | |
1639 | clocks = <&cpg CPG_MOD 724>, | |
e5c3f470 LP |
1640 | <&cpg CPG_MOD 723>; |
1641 | clock-names = "du.0", "du.1"; | |
bb21803e SH |
1642 | status = "disabled"; |
1643 | ||
1644 | ports { | |
1645 | #address-cells = <1>; | |
1646 | #size-cells = <0>; | |
1647 | ||
1648 | port@0 { | |
1649 | reg = <0>; | |
1650 | du_out_rgb: endpoint { | |
1651 | }; | |
8eefac2d | 1652 | }; |
bb21803e SH |
1653 | port@1 { |
1654 | reg = <1>; | |
1655 | du_out_lvds0: endpoint { | |
e5c3f470 LP |
1656 | remote-endpoint = <&lvds0_in>; |
1657 | }; | |
1658 | }; | |
1659 | }; | |
1660 | }; | |
1661 | ||
1662 | lvds0: lvds@feb90000 { | |
1663 | compatible = "renesas,r8a7791-lvds"; | |
1664 | reg = <0 0xfeb90000 0 0x1c>; | |
1665 | clocks = <&cpg CPG_MOD 726>; | |
1666 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1667 | resets = <&cpg 726>; | |
1668 | status = "disabled"; | |
1669 | ||
1670 | ports { | |
1671 | #address-cells = <1>; | |
1672 | #size-cells = <0>; | |
1673 | ||
1674 | port@0 { | |
1675 | reg = <0>; | |
1676 | lvds0_in: endpoint { | |
1677 | remote-endpoint = <&du_out_lvds0>; | |
1678 | }; | |
1679 | }; | |
1680 | port@1 { | |
1681 | reg = <1>; | |
1682 | lvds0_out: endpoint { | |
bb21803e | 1683 | }; |
8eefac2d LP |
1684 | }; |
1685 | }; | |
1686 | }; | |
8eefac2d | 1687 | |
bb21803e SH |
1688 | prr: chipid@ff000044 { |
1689 | compatible = "renesas,prr"; | |
1690 | reg = <0 0xff000044 0 4>; | |
1691 | }; | |
1692 | ||
1693 | cmt0: timer@ffca0000 { | |
1694 | compatible = "renesas,r8a7791-cmt0", | |
1695 | "renesas,rcar-gen2-cmt0"; | |
1696 | reg = <0 0xffca0000 0 0x1004>; | |
1697 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, | |
1698 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
1699 | clocks = <&cpg CPG_MOD 124>; | |
1700 | clock-names = "fck"; | |
1701 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1702 | resets = <&cpg 124>; | |
1703 | ||
1704 | status = "disabled"; | |
1705 | }; | |
3cf01884 | 1706 | |
bb21803e SH |
1707 | cmt1: timer@e6130000 { |
1708 | compatible = "renesas,r8a7791-cmt1", | |
1709 | "renesas,rcar-gen2-cmt1"; | |
1710 | reg = <0 0xe6130000 0 0x1004>; | |
1711 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, | |
1712 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
1713 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
1714 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
1715 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
1716 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
1717 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
1718 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
1719 | clocks = <&cpg CPG_MOD 329>; | |
1720 | clock-names = "fck"; | |
1721 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1722 | resets = <&cpg 329>; | |
1723 | ||
1724 | status = "disabled"; | |
1725 | }; | |
3cf01884 SS |
1726 | }; |
1727 | ||
21b05c52 SH |
1728 | thermal-zones { |
1729 | cpu_thermal: cpu-thermal { | |
c57c1b7c SH |
1730 | polling-delay-passive = <0>; |
1731 | polling-delay = <0>; | |
21b05c52 SH |
1732 | |
1733 | thermal-sensors = <&thermal>; | |
1734 | ||
1735 | trips { | |
1736 | cpu-crit { | |
c57c1b7c SH |
1737 | temperature = <95000>; |
1738 | hysteresis = <0>; | |
1739 | type = "critical"; | |
21b05c52 SH |
1740 | }; |
1741 | }; | |
1742 | cooling-maps { | |
1743 | }; | |
1744 | }; | |
1745 | }; | |
1746 | ||
bb21803e SH |
1747 | timer { |
1748 | compatible = "arm,armv7-timer"; | |
1749 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1750 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1751 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1752 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
0caa3660 MU |
1753 | }; |
1754 | ||
580aa7cb GU |
1755 | /* External USB clock - can be overridden by the board */ |
1756 | usb_extal_clk: usb_extal { | |
1757 | compatible = "fixed-clock"; | |
1758 | #clock-cells = <0>; | |
1759 | clock-frequency = <48000000>; | |
1760 | }; | |
0d0771ab | 1761 | }; |