Commit | Line | Data |
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cdbfaf64 | 1 | // SPDX-License-Identifier: GPL-2.0 |
0d0771ab | 2 | /* |
89b43b08 | 3 | * Device Tree Source for the R-Car M2-W (R8A77910) SoC |
0d0771ab | 4 | * |
118e4e6a | 5 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
2e5d55ce SS |
6 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
7 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0d0771ab HN |
8 | */ |
9 | ||
362b334b | 10 | #include <dt-bindings/clock/r8a7791-cpg-mssr.h> |
5f75e73c LP |
11 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
12 | #include <dt-bindings/interrupt-controller/irq.h> | |
8574de86 | 13 | #include <dt-bindings/power/r8a7791-sysc.h> |
5f75e73c | 14 | |
0d0771ab HN |
15 | / { |
16 | compatible = "renesas,r8a7791"; | |
0d0771ab HN |
17 | #address-cells = <2>; |
18 | #size-cells = <2>; | |
19 | ||
5bd3de7b WS |
20 | aliases { |
21 | i2c0 = &i2c0; | |
22 | i2c1 = &i2c1; | |
23 | i2c2 = &i2c2; | |
24 | i2c3 = &i2c3; | |
25 | i2c4 = &i2c4; | |
26 | i2c5 = &i2c5; | |
36408d9d WS |
27 | i2c6 = &i2c6; |
28 | i2c7 = &i2c7; | |
29 | i2c8 = &i2c8; | |
6f3e4ee3 | 30 | spi0 = &qspi; |
7713d3ab GU |
31 | spi1 = &msiof0; |
32 | spi2 = &msiof1; | |
33 | spi3 = &msiof2; | |
0b8d1d57 SS |
34 | vin0 = &vin0; |
35 | vin1 = &vin1; | |
36 | vin2 = &vin2; | |
5bd3de7b WS |
37 | }; |
38 | ||
21b05c52 SH |
39 | /* |
40 | * The external audio clocks are configured as 0 Hz fixed frequency | |
41 | * clocks by default. | |
42 | * Boards that provide audio clocks should override them. | |
43 | */ | |
44 | audio_clk_a: audio_clk_a { | |
45 | compatible = "fixed-clock"; | |
46 | #clock-cells = <0>; | |
47 | clock-frequency = <0>; | |
48 | }; | |
49 | audio_clk_b: audio_clk_b { | |
50 | compatible = "fixed-clock"; | |
51 | #clock-cells = <0>; | |
52 | clock-frequency = <0>; | |
53 | }; | |
54 | audio_clk_c: audio_clk_c { | |
55 | compatible = "fixed-clock"; | |
56 | #clock-cells = <0>; | |
57 | clock-frequency = <0>; | |
58 | }; | |
59 | ||
60 | /* External CAN clock */ | |
61 | can_clk: can { | |
62 | compatible = "fixed-clock"; | |
63 | #clock-cells = <0>; | |
64 | /* This value must be overridden by the board. */ | |
65 | clock-frequency = <0>; | |
66 | }; | |
67 | ||
0d0771ab HN |
68 | cpus { |
69 | #address-cells = <1>; | |
70 | #size-cells = <0>; | |
477cbcbd | 71 | enable-method = "renesas,apmu"; |
0d0771ab HN |
72 | |
73 | cpu0: cpu@0 { | |
74 | device_type = "cpu"; | |
75 | compatible = "arm,cortex-a15"; | |
76 | reg = <0>; | |
896b79df | 77 | clock-frequency = <1500000000>; |
362b334b | 78 | clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; |
8574de86 | 79 | power-domains = <&sysc R8A7791_PD_CA15_CPU0>; |
8ffe93a5 | 80 | next-level-cache = <&L2_CA15>; |
8199e49f VK |
81 | voltage-tolerance = <1>; /* 1% */ |
82 | clock-latency = <300000>; /* 300 us */ | |
a57004ec GI |
83 | |
84 | /* kHz - uV - OPPs unknown yet */ | |
85 | operating-points = <1500000 1000000>, | |
86 | <1312500 1000000>, | |
87 | <1125000 1000000>, | |
88 | < 937500 1000000>, | |
89 | < 750000 1000000>, | |
90 | < 375000 1000000>; | |
0d0771ab | 91 | }; |
15ab426c MD |
92 | |
93 | cpu1: cpu@1 { | |
94 | device_type = "cpu"; | |
95 | compatible = "arm,cortex-a15"; | |
96 | reg = <1>; | |
896b79df | 97 | clock-frequency = <1500000000>; |
60b672fe | 98 | clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; |
8574de86 | 99 | power-domains = <&sysc R8A7791_PD_CA15_CPU1>; |
8ffe93a5 | 100 | next-level-cache = <&L2_CA15>; |
8199e49f VK |
101 | voltage-tolerance = <1>; /* 1% */ |
102 | clock-latency = <300000>; /* 300 us */ | |
103 | ||
104 | /* kHz - uV - OPPs unknown yet */ | |
105 | operating-points = <1500000 1000000>, | |
106 | <1312500 1000000>, | |
107 | <1125000 1000000>, | |
108 | < 937500 1000000>, | |
109 | < 750000 1000000>, | |
110 | < 375000 1000000>; | |
15ab426c | 111 | }; |
6f9314ce | 112 | |
5d6a2165 | 113 | L2_CA15: cache-controller-0 { |
6f9314ce | 114 | compatible = "cache"; |
6f9314ce GU |
115 | power-domains = <&sysc R8A7791_PD_CA15_SCU>; |
116 | cache-unified; | |
117 | cache-level = <2>; | |
118 | }; | |
0d0771ab HN |
119 | }; |
120 | ||
21b05c52 SH |
121 | /* External root clock */ |
122 | extal_clk: extal { | |
123 | compatible = "fixed-clock"; | |
124 | #clock-cells = <0>; | |
125 | /* This value must be overridden by the board. */ | |
126 | clock-frequency = <0>; | |
127 | }; | |
cac68a56 | 128 | |
21b05c52 SH |
129 | /* External PCIe clock - can be overridden by the board */ |
130 | pcie_bus_clk: pcie_bus { | |
131 | compatible = "fixed-clock"; | |
132 | #clock-cells = <0>; | |
133 | clock-frequency = <0>; | |
134 | }; | |
cac68a56 | 135 | |
8607428c GU |
136 | pmu { |
137 | compatible = "arm,cortex-a15-pmu"; | |
138 | interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
139 | <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | |
140 | interrupt-affinity = <&cpu0>, <&cpu1>; | |
141 | }; | |
142 | ||
21b05c52 SH |
143 | /* External SCIF clock */ |
144 | scif_clk: scif { | |
145 | compatible = "fixed-clock"; | |
146 | #clock-cells = <0>; | |
147 | /* This value must be overridden by the board. */ | |
148 | clock-frequency = <0>; | |
cac68a56 KM |
149 | }; |
150 | ||
bb21803e SH |
151 | soc { |
152 | compatible = "simple-bus"; | |
153 | interrupt-parent = <&gic>; | |
477cbcbd | 154 | |
bb21803e SH |
155 | #address-cells = <2>; |
156 | #size-cells = <2>; | |
157 | ranges; | |
158 | ||
6912394d FC |
159 | rwdt: watchdog@e6020000 { |
160 | compatible = "renesas,r8a7791-wdt", | |
161 | "renesas,rcar-gen2-wdt"; | |
162 | reg = <0 0xe6020000 0 0x0c>; | |
163 | clocks = <&cpg CPG_MOD 402>; | |
164 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
165 | resets = <&cpg 402>; | |
166 | status = "disabled"; | |
167 | }; | |
168 | ||
bb21803e SH |
169 | gpio0: gpio@e6050000 { |
170 | compatible = "renesas,gpio-r8a7791", | |
171 | "renesas,rcar-gen2-gpio"; | |
172 | reg = <0 0xe6050000 0 0x50>; | |
173 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
174 | #gpio-cells = <2>; | |
175 | gpio-controller; | |
176 | gpio-ranges = <&pfc 0 0 32>; | |
177 | #interrupt-cells = <2>; | |
178 | interrupt-controller; | |
179 | clocks = <&cpg CPG_MOD 912>; | |
180 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
181 | resets = <&cpg 912>; | |
182 | }; | |
d77db73e | 183 | |
bb21803e SH |
184 | gpio1: gpio@e6051000 { |
185 | compatible = "renesas,gpio-r8a7791", | |
186 | "renesas,rcar-gen2-gpio"; | |
187 | reg = <0 0xe6051000 0 0x50>; | |
188 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
189 | #gpio-cells = <2>; | |
190 | gpio-controller; | |
191 | gpio-ranges = <&pfc 0 32 26>; | |
192 | #interrupt-cells = <2>; | |
193 | interrupt-controller; | |
194 | clocks = <&cpg CPG_MOD 911>; | |
195 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
196 | resets = <&cpg 911>; | |
197 | }; | |
ab87e3fc | 198 | |
bb21803e SH |
199 | gpio2: gpio@e6052000 { |
200 | compatible = "renesas,gpio-r8a7791", | |
201 | "renesas,rcar-gen2-gpio"; | |
202 | reg = <0 0xe6052000 0 0x50>; | |
203 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
204 | #gpio-cells = <2>; | |
205 | gpio-controller; | |
206 | gpio-ranges = <&pfc 0 64 32>; | |
207 | #interrupt-cells = <2>; | |
208 | interrupt-controller; | |
209 | clocks = <&cpg CPG_MOD 910>; | |
210 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
211 | resets = <&cpg 910>; | |
212 | }; | |
ab87e3fc | 213 | |
bb21803e SH |
214 | gpio3: gpio@e6053000 { |
215 | compatible = "renesas,gpio-r8a7791", | |
216 | "renesas,rcar-gen2-gpio"; | |
217 | reg = <0 0xe6053000 0 0x50>; | |
218 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
219 | #gpio-cells = <2>; | |
220 | gpio-controller; | |
221 | gpio-ranges = <&pfc 0 96 32>; | |
222 | #interrupt-cells = <2>; | |
223 | interrupt-controller; | |
224 | clocks = <&cpg CPG_MOD 909>; | |
225 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
226 | resets = <&cpg 909>; | |
227 | }; | |
ab87e3fc | 228 | |
bb21803e SH |
229 | gpio4: gpio@e6054000 { |
230 | compatible = "renesas,gpio-r8a7791", | |
231 | "renesas,rcar-gen2-gpio"; | |
232 | reg = <0 0xe6054000 0 0x50>; | |
233 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
234 | #gpio-cells = <2>; | |
235 | gpio-controller; | |
236 | gpio-ranges = <&pfc 0 128 32>; | |
237 | #interrupt-cells = <2>; | |
238 | interrupt-controller; | |
239 | clocks = <&cpg CPG_MOD 908>; | |
240 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
241 | resets = <&cpg 908>; | |
242 | }; | |
ab87e3fc | 243 | |
bb21803e SH |
244 | gpio5: gpio@e6055000 { |
245 | compatible = "renesas,gpio-r8a7791", | |
246 | "renesas,rcar-gen2-gpio"; | |
247 | reg = <0 0xe6055000 0 0x50>; | |
248 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
249 | #gpio-cells = <2>; | |
250 | gpio-controller; | |
251 | gpio-ranges = <&pfc 0 160 32>; | |
252 | #interrupt-cells = <2>; | |
253 | interrupt-controller; | |
254 | clocks = <&cpg CPG_MOD 907>; | |
255 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
256 | resets = <&cpg 907>; | |
257 | }; | |
ab87e3fc | 258 | |
bb21803e SH |
259 | gpio6: gpio@e6055400 { |
260 | compatible = "renesas,gpio-r8a7791", | |
261 | "renesas,rcar-gen2-gpio"; | |
262 | reg = <0 0xe6055400 0 0x50>; | |
263 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
264 | #gpio-cells = <2>; | |
265 | gpio-controller; | |
266 | gpio-ranges = <&pfc 0 192 32>; | |
267 | #interrupt-cells = <2>; | |
268 | interrupt-controller; | |
269 | clocks = <&cpg CPG_MOD 905>; | |
270 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
271 | resets = <&cpg 905>; | |
272 | }; | |
ab87e3fc | 273 | |
bb21803e SH |
274 | gpio7: gpio@e6055800 { |
275 | compatible = "renesas,gpio-r8a7791", | |
276 | "renesas,rcar-gen2-gpio"; | |
277 | reg = <0 0xe6055800 0 0x50>; | |
278 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
279 | #gpio-cells = <2>; | |
280 | gpio-controller; | |
281 | gpio-ranges = <&pfc 0 224 26>; | |
282 | #interrupt-cells = <2>; | |
283 | interrupt-controller; | |
284 | clocks = <&cpg CPG_MOD 904>; | |
285 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
286 | resets = <&cpg 904>; | |
287 | }; | |
ab87e3fc | 288 | |
bb21803e SH |
289 | pfc: pin-controller@e6060000 { |
290 | compatible = "renesas,pfc-r8a7791"; | |
291 | reg = <0 0xe6060000 0 0x250>; | |
292 | }; | |
ab87e3fc | 293 | |
bb21803e SH |
294 | cpg: clock-controller@e6150000 { |
295 | compatible = "renesas,r8a7791-cpg-mssr"; | |
296 | reg = <0 0xe6150000 0 0x1000>; | |
297 | clocks = <&extal_clk>, <&usb_extal_clk>; | |
298 | clock-names = "extal", "usb_extal"; | |
299 | #clock-cells = <2>; | |
300 | #power-domain-cells = <0>; | |
301 | #reset-cells = <1>; | |
302 | }; | |
d103f4d3 | 303 | |
bb21803e SH |
304 | apmu@e6152000 { |
305 | compatible = "renesas,r8a7791-apmu", "renesas,apmu"; | |
306 | reg = <0 0xe6152000 0 0x188>; | |
307 | cpus = <&cpu0 &cpu1>; | |
308 | }; | |
03586acf | 309 | |
bb21803e SH |
310 | rst: reset-controller@e6160000 { |
311 | compatible = "renesas,r8a7791-rst"; | |
312 | reg = <0 0xe6160000 0 0x0100>; | |
313 | }; | |
ceaa1894 | 314 | |
bb21803e SH |
315 | sysc: system-controller@e6180000 { |
316 | compatible = "renesas,r8a7791-sysc"; | |
317 | reg = <0 0xe6180000 0 0x0200>; | |
318 | #power-domain-cells = <1>; | |
319 | }; | |
ceaa1894 | 320 | |
bb21803e SH |
321 | irqc0: interrupt-controller@e61c0000 { |
322 | compatible = "renesas,irqc-r8a7791", "renesas,irqc"; | |
323 | #interrupt-cells = <2>; | |
324 | interrupt-controller; | |
325 | reg = <0 0xe61c0000 0 0x200>; | |
326 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, | |
327 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
328 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
329 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | |
330 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, | |
331 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, | |
332 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, | |
333 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, | |
334 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, | |
335 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
336 | clocks = <&cpg CPG_MOD 407>; | |
337 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
338 | resets = <&cpg 407>; | |
339 | }; | |
55146927 | 340 | |
bb21803e SH |
341 | thermal: thermal@e61f0000 { |
342 | compatible = "renesas,thermal-r8a7791", | |
343 | "renesas,rcar-gen2-thermal", | |
344 | "renesas,rcar-thermal"; | |
345 | reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; | |
346 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
347 | clocks = <&cpg CPG_MOD 522>; | |
348 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
349 | resets = <&cpg 522>; | |
350 | #thermal-sensor-cells = <0>; | |
351 | }; | |
fde8feef | 352 | |
bb21803e SH |
353 | ipmmu_sy0: mmu@e6280000 { |
354 | compatible = "renesas,ipmmu-r8a7791", | |
355 | "renesas,ipmmu-vmsa"; | |
356 | reg = <0 0xe6280000 0 0x1000>; | |
357 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, | |
358 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
359 | #iommu-cells = <1>; | |
360 | status = "disabled"; | |
361 | }; | |
fde8feef | 362 | |
bb21803e SH |
363 | ipmmu_sy1: mmu@e6290000 { |
364 | compatible = "renesas,ipmmu-r8a7791", | |
365 | "renesas,ipmmu-vmsa"; | |
366 | reg = <0 0xe6290000 0 0x1000>; | |
367 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; | |
368 | #iommu-cells = <1>; | |
369 | status = "disabled"; | |
370 | }; | |
8994fff6 | 371 | |
bb21803e SH |
372 | ipmmu_ds: mmu@e6740000 { |
373 | compatible = "renesas,ipmmu-r8a7791", | |
374 | "renesas,ipmmu-vmsa"; | |
375 | reg = <0 0xe6740000 0 0x1000>; | |
376 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, | |
377 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
378 | #iommu-cells = <1>; | |
379 | status = "disabled"; | |
380 | }; | |
8994fff6 | 381 | |
bb21803e SH |
382 | ipmmu_mp: mmu@ec680000 { |
383 | compatible = "renesas,ipmmu-r8a7791", | |
384 | "renesas,ipmmu-vmsa"; | |
385 | reg = <0 0xec680000 0 0x1000>; | |
386 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; | |
387 | #iommu-cells = <1>; | |
388 | status = "disabled"; | |
389 | }; | |
e3e25edc | 390 | |
bb21803e SH |
391 | ipmmu_mx: mmu@fe951000 { |
392 | compatible = "renesas,ipmmu-r8a7791", | |
393 | "renesas,ipmmu-vmsa"; | |
394 | reg = <0 0xfe951000 0 0x1000>; | |
395 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, | |
396 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
397 | #iommu-cells = <1>; | |
398 | status = "disabled"; | |
399 | }; | |
e3e25edc | 400 | |
bb21803e SH |
401 | ipmmu_rt: mmu@ffc80000 { |
402 | compatible = "renesas,ipmmu-r8a7791", | |
403 | "renesas,ipmmu-vmsa"; | |
404 | reg = <0 0xffc80000 0 0x1000>; | |
405 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; | |
406 | #iommu-cells = <1>; | |
407 | status = "disabled"; | |
408 | }; | |
5bd3de7b | 409 | |
bb21803e SH |
410 | ipmmu_gp: mmu@e62a0000 { |
411 | compatible = "renesas,ipmmu-r8a7791", | |
412 | "renesas,ipmmu-vmsa"; | |
413 | reg = <0 0xe62a0000 0 0x1000>; | |
414 | interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, | |
415 | <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; | |
416 | #iommu-cells = <1>; | |
417 | status = "disabled"; | |
418 | }; | |
5bd3de7b | 419 | |
bb21803e SH |
420 | icram0: sram@e63a0000 { |
421 | compatible = "mmio-sram"; | |
422 | reg = <0 0xe63a0000 0 0x12000>; | |
423 | }; | |
5bd3de7b | 424 | |
bb21803e SH |
425 | icram1: sram@e63c0000 { |
426 | compatible = "mmio-sram"; | |
427 | reg = <0 0xe63c0000 0 0x1000>; | |
428 | #address-cells = <1>; | |
429 | #size-cells = <1>; | |
430 | ranges = <0 0 0xe63c0000 0x1000>; | |
5bd3de7b | 431 | |
bb21803e SH |
432 | smp-sram@0 { |
433 | compatible = "renesas,smp-sram"; | |
a3322100 | 434 | reg = <0 0x100>; |
bb21803e SH |
435 | }; |
436 | }; | |
5bd3de7b | 437 | |
bb21803e SH |
438 | /* The memory map in the User's Manual maps the cores to |
439 | * bus numbers | |
440 | */ | |
441 | i2c0: i2c@e6508000 { | |
442 | #address-cells = <1>; | |
443 | #size-cells = <0>; | |
444 | compatible = "renesas,i2c-r8a7791", | |
445 | "renesas,rcar-gen2-i2c"; | |
446 | reg = <0 0xe6508000 0 0x40>; | |
447 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
448 | clocks = <&cpg CPG_MOD 931>; | |
449 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
450 | resets = <&cpg 931>; | |
451 | i2c-scl-internal-delay-ns = <6>; | |
452 | status = "disabled"; | |
453 | }; | |
5bd3de7b | 454 | |
bb21803e SH |
455 | i2c1: i2c@e6518000 { |
456 | #address-cells = <1>; | |
457 | #size-cells = <0>; | |
458 | compatible = "renesas,i2c-r8a7791", | |
459 | "renesas,rcar-gen2-i2c"; | |
460 | reg = <0 0xe6518000 0 0x40>; | |
461 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
462 | clocks = <&cpg CPG_MOD 930>; | |
463 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
464 | resets = <&cpg 930>; | |
465 | i2c-scl-internal-delay-ns = <6>; | |
466 | status = "disabled"; | |
467 | }; | |
36408d9d | 468 | |
bb21803e SH |
469 | i2c2: i2c@e6530000 { |
470 | #address-cells = <1>; | |
471 | #size-cells = <0>; | |
472 | compatible = "renesas,i2c-r8a7791", | |
473 | "renesas,rcar-gen2-i2c"; | |
474 | reg = <0 0xe6530000 0 0x40>; | |
475 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
476 | clocks = <&cpg CPG_MOD 929>; | |
477 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
478 | resets = <&cpg 929>; | |
479 | i2c-scl-internal-delay-ns = <6>; | |
480 | status = "disabled"; | |
481 | }; | |
36408d9d | 482 | |
bb21803e SH |
483 | i2c3: i2c@e6540000 { |
484 | #address-cells = <1>; | |
485 | #size-cells = <0>; | |
486 | compatible = "renesas,i2c-r8a7791", | |
487 | "renesas,rcar-gen2-i2c"; | |
488 | reg = <0 0xe6540000 0 0x40>; | |
489 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
490 | clocks = <&cpg CPG_MOD 928>; | |
491 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
492 | resets = <&cpg 928>; | |
493 | i2c-scl-internal-delay-ns = <6>; | |
494 | status = "disabled"; | |
495 | }; | |
36408d9d | 496 | |
bb21803e SH |
497 | i2c4: i2c@e6520000 { |
498 | #address-cells = <1>; | |
499 | #size-cells = <0>; | |
500 | compatible = "renesas,i2c-r8a7791", | |
501 | "renesas,rcar-gen2-i2c"; | |
502 | reg = <0 0xe6520000 0 0x40>; | |
503 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
504 | clocks = <&cpg CPG_MOD 927>; | |
505 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
506 | resets = <&cpg 927>; | |
507 | i2c-scl-internal-delay-ns = <6>; | |
508 | status = "disabled"; | |
509 | }; | |
59e79895 | 510 | |
bb21803e SH |
511 | i2c5: i2c@e6528000 { |
512 | /* doesn't need pinmux */ | |
513 | #address-cells = <1>; | |
514 | #size-cells = <0>; | |
515 | compatible = "renesas,i2c-r8a7791", | |
516 | "renesas,rcar-gen2-i2c"; | |
517 | reg = <0 0xe6528000 0 0x40>; | |
518 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
519 | clocks = <&cpg CPG_MOD 925>; | |
520 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
521 | resets = <&cpg 925>; | |
522 | i2c-scl-internal-delay-ns = <110>; | |
523 | status = "disabled"; | |
524 | }; | |
8edae499 | 525 | |
bb21803e SH |
526 | i2c6: i2c@e60b0000 { |
527 | /* doesn't need pinmux */ | |
528 | #address-cells = <1>; | |
529 | #size-cells = <0>; | |
530 | compatible = "renesas,iic-r8a7791", | |
531 | "renesas,rcar-gen2-iic", | |
532 | "renesas,rmobile-iic"; | |
533 | reg = <0 0xe60b0000 0 0x425>; | |
534 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
535 | clocks = <&cpg CPG_MOD 926>; | |
536 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, | |
537 | <&dmac1 0x77>, <&dmac1 0x78>; | |
538 | dma-names = "tx", "rx", "tx", "rx"; | |
539 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
540 | resets = <&cpg 926>; | |
541 | status = "disabled"; | |
542 | }; | |
b7ed8a0d | 543 | |
bb21803e SH |
544 | i2c7: i2c@e6500000 { |
545 | #address-cells = <1>; | |
546 | #size-cells = <0>; | |
547 | compatible = "renesas,iic-r8a7791", | |
548 | "renesas,rcar-gen2-iic", | |
549 | "renesas,rmobile-iic"; | |
550 | reg = <0 0xe6500000 0 0x425>; | |
551 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; | |
552 | clocks = <&cpg CPG_MOD 318>; | |
553 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, | |
554 | <&dmac1 0x61>, <&dmac1 0x62>; | |
555 | dma-names = "tx", "rx", "tx", "rx"; | |
556 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
557 | resets = <&cpg 318>; | |
558 | status = "disabled"; | |
559 | }; | |
b7ed8a0d | 560 | |
bb21803e SH |
561 | i2c8: i2c@e6510000 { |
562 | #address-cells = <1>; | |
563 | #size-cells = <0>; | |
564 | compatible = "renesas,iic-r8a7791", | |
565 | "renesas,rcar-gen2-iic", | |
566 | "renesas,rmobile-iic"; | |
567 | reg = <0 0xe6510000 0 0x425>; | |
568 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; | |
569 | clocks = <&cpg CPG_MOD 323>; | |
570 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, | |
571 | <&dmac1 0x65>, <&dmac1 0x66>; | |
572 | dma-names = "tx", "rx", "tx", "rx"; | |
573 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
574 | resets = <&cpg 323>; | |
575 | status = "disabled"; | |
576 | }; | |
b7ed8a0d | 577 | |
bb21803e SH |
578 | hsusb: usb@e6590000 { |
579 | compatible = "renesas,usbhs-r8a7791", | |
580 | "renesas,rcar-gen2-usbhs"; | |
581 | reg = <0 0xe6590000 0 0x100>; | |
582 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
583 | clocks = <&cpg CPG_MOD 704>; | |
584 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
585 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
586 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
587 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
588 | resets = <&cpg 704>; | |
589 | renesas,buswait = <4>; | |
590 | phys = <&usb0 1>; | |
591 | phy-names = "usb"; | |
592 | status = "disabled"; | |
593 | }; | |
9640cf25 | 594 | |
bb21803e SH |
595 | usbphy: usb-phy@e6590100 { |
596 | compatible = "renesas,usb-phy-r8a7791", | |
597 | "renesas,rcar-gen2-usb-phy"; | |
598 | reg = <0 0xe6590100 0 0x100>; | |
599 | #address-cells = <1>; | |
600 | #size-cells = <0>; | |
601 | clocks = <&cpg CPG_MOD 704>; | |
602 | clock-names = "usbhs"; | |
603 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
604 | resets = <&cpg 704>; | |
605 | status = "disabled"; | |
9640cf25 | 606 | |
bb21803e SH |
607 | usb0: usb-channel@0 { |
608 | reg = <0>; | |
609 | #phy-cells = <1>; | |
610 | }; | |
611 | usb2: usb-channel@2 { | |
612 | reg = <2>; | |
613 | #phy-cells = <1>; | |
614 | }; | |
615 | }; | |
9640cf25 | 616 | |
bb21803e SH |
617 | usb_dmac0: dma-controller@e65a0000 { |
618 | compatible = "renesas,r8a7791-usb-dmac", | |
619 | "renesas,usb-dmac"; | |
620 | reg = <0 0xe65a0000 0 0x100>; | |
621 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
622 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
623 | interrupt-names = "ch0", "ch1"; | |
624 | clocks = <&cpg CPG_MOD 330>; | |
625 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
626 | resets = <&cpg 330>; | |
627 | #dma-cells = <1>; | |
628 | dma-channels = <2>; | |
629 | }; | |
9640cf25 | 630 | |
bb21803e SH |
631 | usb_dmac1: dma-controller@e65b0000 { |
632 | compatible = "renesas,r8a7791-usb-dmac", | |
633 | "renesas,usb-dmac"; | |
634 | reg = <0 0xe65b0000 0 0x100>; | |
635 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
636 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
637 | interrupt-names = "ch0", "ch1"; | |
638 | clocks = <&cpg CPG_MOD 331>; | |
639 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
640 | resets = <&cpg 331>; | |
641 | #dma-cells = <1>; | |
642 | dma-channels = <2>; | |
643 | }; | |
9640cf25 | 644 | |
bb21803e SH |
645 | dmac0: dma-controller@e6700000 { |
646 | compatible = "renesas,dmac-r8a7791", | |
647 | "renesas,rcar-dmac"; | |
648 | reg = <0 0xe6700000 0 0x20000>; | |
649 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH | |
650 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
651 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
652 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
653 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
654 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
655 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
656 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
657 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
658 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
659 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
660 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
661 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
662 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
663 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
664 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
665 | interrupt-names = "error", | |
666 | "ch0", "ch1", "ch2", "ch3", | |
667 | "ch4", "ch5", "ch6", "ch7", | |
668 | "ch8", "ch9", "ch10", "ch11", | |
669 | "ch12", "ch13", "ch14"; | |
670 | clocks = <&cpg CPG_MOD 219>; | |
671 | clock-names = "fck"; | |
672 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
673 | resets = <&cpg 219>; | |
674 | #dma-cells = <1>; | |
675 | dma-channels = <15>; | |
676 | }; | |
9640cf25 | 677 | |
bb21803e SH |
678 | dmac1: dma-controller@e6720000 { |
679 | compatible = "renesas,dmac-r8a7791", | |
680 | "renesas,rcar-dmac"; | |
681 | reg = <0 0xe6720000 0 0x20000>; | |
682 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
683 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
684 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
685 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
686 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
687 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
688 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
689 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
690 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
691 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
692 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
693 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
694 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
695 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
696 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
697 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
698 | interrupt-names = "error", | |
699 | "ch0", "ch1", "ch2", "ch3", | |
700 | "ch4", "ch5", "ch6", "ch7", | |
701 | "ch8", "ch9", "ch10", "ch11", | |
702 | "ch12", "ch13", "ch14"; | |
703 | clocks = <&cpg CPG_MOD 218>; | |
704 | clock-names = "fck"; | |
705 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
706 | resets = <&cpg 218>; | |
707 | #dma-cells = <1>; | |
708 | dma-channels = <15>; | |
709 | }; | |
9640cf25 | 710 | |
bb21803e SH |
711 | avb: ethernet@e6800000 { |
712 | compatible = "renesas,etheravb-r8a7791", | |
713 | "renesas,etheravb-rcar-gen2"; | |
714 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; | |
715 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; | |
716 | clocks = <&cpg CPG_MOD 812>; | |
717 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
718 | resets = <&cpg 812>; | |
719 | #address-cells = <1>; | |
720 | #size-cells = <0>; | |
721 | status = "disabled"; | |
722 | }; | |
9640cf25 | 723 | |
bb21803e SH |
724 | qspi: spi@e6b10000 { |
725 | compatible = "renesas,qspi-r8a7791", "renesas,qspi"; | |
726 | reg = <0 0xe6b10000 0 0x2c>; | |
727 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; | |
728 | clocks = <&cpg CPG_MOD 917>; | |
729 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, | |
730 | <&dmac1 0x17>, <&dmac1 0x18>; | |
731 | dma-names = "tx", "rx", "tx", "rx"; | |
732 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
733 | resets = <&cpg 917>; | |
734 | num-cs = <1>; | |
735 | #address-cells = <1>; | |
736 | #size-cells = <0>; | |
737 | status = "disabled"; | |
738 | }; | |
9640cf25 | 739 | |
bb21803e SH |
740 | scifa0: serial@e6c40000 { |
741 | compatible = "renesas,scifa-r8a7791", | |
742 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
743 | reg = <0 0xe6c40000 0 64>; | |
744 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
745 | clocks = <&cpg CPG_MOD 204>; | |
746 | clock-names = "fck"; | |
747 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, | |
748 | <&dmac1 0x21>, <&dmac1 0x22>; | |
749 | dma-names = "tx", "rx", "tx", "rx"; | |
750 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
751 | resets = <&cpg 204>; | |
752 | status = "disabled"; | |
753 | }; | |
9640cf25 | 754 | |
bb21803e SH |
755 | scifa1: serial@e6c50000 { |
756 | compatible = "renesas,scifa-r8a7791", | |
757 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
758 | reg = <0 0xe6c50000 0 64>; | |
759 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
760 | clocks = <&cpg CPG_MOD 203>; | |
761 | clock-names = "fck"; | |
762 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, | |
763 | <&dmac1 0x25>, <&dmac1 0x26>; | |
764 | dma-names = "tx", "rx", "tx", "rx"; | |
765 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
766 | resets = <&cpg 203>; | |
767 | status = "disabled"; | |
768 | }; | |
9640cf25 | 769 | |
bb21803e SH |
770 | scifa2: serial@e6c60000 { |
771 | compatible = "renesas,scifa-r8a7791", | |
772 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
773 | reg = <0 0xe6c60000 0 64>; | |
774 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; | |
775 | clocks = <&cpg CPG_MOD 202>; | |
776 | clock-names = "fck"; | |
777 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, | |
778 | <&dmac1 0x27>, <&dmac1 0x28>; | |
779 | dma-names = "tx", "rx", "tx", "rx"; | |
780 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
781 | resets = <&cpg 202>; | |
782 | status = "disabled"; | |
783 | }; | |
e15ebbfa | 784 | |
bb21803e SH |
785 | scifa3: serial@e6c70000 { |
786 | compatible = "renesas,scifa-r8a7791", | |
787 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
788 | reg = <0 0xe6c70000 0 64>; | |
789 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
790 | clocks = <&cpg CPG_MOD 1106>; | |
791 | clock-names = "fck"; | |
792 | dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, | |
793 | <&dmac1 0x1b>, <&dmac1 0x1c>; | |
794 | dma-names = "tx", "rx", "tx", "rx"; | |
795 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
796 | resets = <&cpg 1106>; | |
797 | status = "disabled"; | |
798 | }; | |
9640cf25 | 799 | |
bb21803e SH |
800 | scifa4: serial@e6c78000 { |
801 | compatible = "renesas,scifa-r8a7791", | |
802 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
803 | reg = <0 0xe6c78000 0 64>; | |
804 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
805 | clocks = <&cpg CPG_MOD 1107>; | |
806 | clock-names = "fck"; | |
807 | dmas = <&dmac0 0x1f>, <&dmac0 0x20>, | |
808 | <&dmac1 0x1f>, <&dmac1 0x20>; | |
809 | dma-names = "tx", "rx", "tx", "rx"; | |
810 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
811 | resets = <&cpg 1107>; | |
812 | status = "disabled"; | |
813 | }; | |
9640cf25 | 814 | |
bb21803e SH |
815 | scifa5: serial@e6c80000 { |
816 | compatible = "renesas,scifa-r8a7791", | |
817 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
818 | reg = <0 0xe6c80000 0 64>; | |
819 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | |
820 | clocks = <&cpg CPG_MOD 1108>; | |
821 | clock-names = "fck"; | |
822 | dmas = <&dmac0 0x23>, <&dmac0 0x24>, | |
823 | <&dmac1 0x23>, <&dmac1 0x24>; | |
824 | dma-names = "tx", "rx", "tx", "rx"; | |
825 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
826 | resets = <&cpg 1108>; | |
827 | status = "disabled"; | |
828 | }; | |
9640cf25 | 829 | |
bb21803e SH |
830 | scifb0: serial@e6c20000 { |
831 | compatible = "renesas,scifb-r8a7791", | |
832 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
833 | reg = <0 0xe6c20000 0 0x100>; | |
834 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
835 | clocks = <&cpg CPG_MOD 206>; | |
836 | clock-names = "fck"; | |
837 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, | |
838 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
839 | dma-names = "tx", "rx", "tx", "rx"; | |
840 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
841 | resets = <&cpg 206>; | |
842 | status = "disabled"; | |
843 | }; | |
9640cf25 | 844 | |
bb21803e SH |
845 | scifb1: serial@e6c30000 { |
846 | compatible = "renesas,scifb-r8a7791", | |
847 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
848 | reg = <0 0xe6c30000 0 0x100>; | |
849 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; | |
850 | clocks = <&cpg CPG_MOD 207>; | |
851 | clock-names = "fck"; | |
852 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, | |
853 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
854 | dma-names = "tx", "rx", "tx", "rx"; | |
855 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
856 | resets = <&cpg 207>; | |
857 | status = "disabled"; | |
858 | }; | |
9640cf25 | 859 | |
bb21803e SH |
860 | scifb2: serial@e6ce0000 { |
861 | compatible = "renesas,scifb-r8a7791", | |
862 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
863 | reg = <0 0xe6ce0000 0 0x100>; | |
864 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | |
865 | clocks = <&cpg CPG_MOD 216>; | |
866 | clock-names = "fck"; | |
867 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, | |
868 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
869 | dma-names = "tx", "rx", "tx", "rx"; | |
870 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
871 | resets = <&cpg 216>; | |
872 | status = "disabled"; | |
873 | }; | |
9640cf25 | 874 | |
bb21803e SH |
875 | scif0: serial@e6e60000 { |
876 | compatible = "renesas,scif-r8a7791", | |
877 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
878 | reg = <0 0xe6e60000 0 64>; | |
879 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
880 | clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
881 | <&scif_clk>; | |
882 | clock-names = "fck", "brg_int", "scif_clk"; | |
883 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, | |
884 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
885 | dma-names = "tx", "rx", "tx", "rx"; | |
886 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
887 | resets = <&cpg 721>; | |
888 | status = "disabled"; | |
889 | }; | |
9640cf25 | 890 | |
bb21803e SH |
891 | scif1: serial@e6e68000 { |
892 | compatible = "renesas,scif-r8a7791", | |
893 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
894 | reg = <0 0xe6e68000 0 64>; | |
895 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
896 | clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
897 | <&scif_clk>; | |
898 | clock-names = "fck", "brg_int", "scif_clk"; | |
899 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, | |
900 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
901 | dma-names = "tx", "rx", "tx", "rx"; | |
902 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
903 | resets = <&cpg 720>; | |
904 | status = "disabled"; | |
905 | }; | |
5ccce438 | 906 | |
bb21803e SH |
907 | scif2: serial@e6e58000 { |
908 | compatible = "renesas,scif-r8a7791", | |
909 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
910 | reg = <0 0xe6e58000 0 64>; | |
911 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; | |
912 | clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
913 | <&scif_clk>; | |
914 | clock-names = "fck", "brg_int", "scif_clk"; | |
915 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, | |
916 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
917 | dma-names = "tx", "rx", "tx", "rx"; | |
918 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
919 | resets = <&cpg 719>; | |
920 | status = "disabled"; | |
921 | }; | |
d7ff9382 | 922 | |
bb21803e SH |
923 | scif3: serial@e6ea8000 { |
924 | compatible = "renesas,scif-r8a7791", | |
925 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
926 | reg = <0 0xe6ea8000 0 64>; | |
927 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
928 | clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
929 | <&scif_clk>; | |
930 | clock-names = "fck", "brg_int", "scif_clk"; | |
931 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>, | |
932 | <&dmac1 0x2f>, <&dmac1 0x30>; | |
933 | dma-names = "tx", "rx", "tx", "rx"; | |
934 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
935 | resets = <&cpg 718>; | |
936 | status = "disabled"; | |
d7ff9382 | 937 | }; |
5ccce438 | 938 | |
bb21803e SH |
939 | scif4: serial@e6ee0000 { |
940 | compatible = "renesas,scif-r8a7791", | |
941 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
942 | reg = <0 0xe6ee0000 0 64>; | |
943 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | |
944 | clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
945 | <&scif_clk>; | |
946 | clock-names = "fck", "brg_int", "scif_clk"; | |
947 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, | |
948 | <&dmac1 0xfb>, <&dmac1 0xfc>; | |
949 | dma-names = "tx", "rx", "tx", "rx"; | |
950 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
951 | resets = <&cpg 715>; | |
952 | status = "disabled"; | |
953 | }; | |
2e5d55ce | 954 | |
bb21803e SH |
955 | scif5: serial@e6ee8000 { |
956 | compatible = "renesas,scif-r8a7791", | |
957 | "renesas,rcar-gen2-scif", "renesas,scif"; | |
958 | reg = <0 0xe6ee8000 0 64>; | |
959 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
960 | clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
961 | <&scif_clk>; | |
962 | clock-names = "fck", "brg_int", "scif_clk"; | |
963 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, | |
964 | <&dmac1 0xfd>, <&dmac1 0xfe>; | |
965 | dma-names = "tx", "rx", "tx", "rx"; | |
966 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
967 | resets = <&cpg 714>; | |
968 | status = "disabled"; | |
969 | }; | |
46ece349 | 970 | |
bb21803e SH |
971 | hscif0: serial@e62c0000 { |
972 | compatible = "renesas,hscif-r8a7791", | |
973 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
974 | reg = <0 0xe62c0000 0 96>; | |
975 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
976 | clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
977 | <&scif_clk>; | |
978 | clock-names = "fck", "brg_int", "scif_clk"; | |
979 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, | |
980 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
981 | dma-names = "tx", "rx", "tx", "rx"; | |
982 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
983 | resets = <&cpg 717>; | |
984 | status = "disabled"; | |
985 | }; | |
b8532c69 | 986 | |
bb21803e SH |
987 | hscif1: serial@e62c8000 { |
988 | compatible = "renesas,hscif-r8a7791", | |
989 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
990 | reg = <0 0xe62c8000 0 96>; | |
991 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
992 | clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
993 | <&scif_clk>; | |
994 | clock-names = "fck", "brg_int", "scif_clk"; | |
995 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, | |
996 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
997 | dma-names = "tx", "rx", "tx", "rx"; | |
998 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
999 | resets = <&cpg 716>; | |
1000 | status = "disabled"; | |
1001 | }; | |
b8532c69 | 1002 | |
bb21803e SH |
1003 | hscif2: serial@e62d0000 { |
1004 | compatible = "renesas,hscif-r8a7791", | |
1005 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
1006 | reg = <0 0xe62d0000 0 96>; | |
1007 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
1008 | clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, | |
1009 | <&scif_clk>; | |
1010 | clock-names = "fck", "brg_int", "scif_clk"; | |
1011 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, | |
1012 | <&dmac1 0x3b>, <&dmac1 0x3c>; | |
1013 | dma-names = "tx", "rx", "tx", "rx"; | |
1014 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1015 | resets = <&cpg 713>; | |
1016 | status = "disabled"; | |
1017 | }; | |
1c1fee7c | 1018 | |
bb21803e SH |
1019 | msiof0: spi@e6e20000 { |
1020 | compatible = "renesas,msiof-r8a7791", | |
1021 | "renesas,rcar-gen2-msiof"; | |
1022 | reg = <0 0xe6e20000 0 0x0064>; | |
1023 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
1024 | clocks = <&cpg CPG_MOD 000>; | |
1025 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, | |
1026 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1027 | dma-names = "tx", "rx", "tx", "rx"; | |
1028 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1029 | resets = <&cpg 0>; | |
1030 | #address-cells = <1>; | |
1031 | #size-cells = <0>; | |
1032 | status = "disabled"; | |
1033 | }; | |
3b7e530d | 1034 | |
bb21803e SH |
1035 | msiof1: spi@e6e10000 { |
1036 | compatible = "renesas,msiof-r8a7791", | |
1037 | "renesas,rcar-gen2-msiof"; | |
1038 | reg = <0 0xe6e10000 0 0x0064>; | |
1039 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
1040 | clocks = <&cpg CPG_MOD 208>; | |
1041 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, | |
1042 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1043 | dma-names = "tx", "rx", "tx", "rx"; | |
1044 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1045 | resets = <&cpg 208>; | |
1046 | #address-cells = <1>; | |
1047 | #size-cells = <0>; | |
1048 | status = "disabled"; | |
3b7e530d | 1049 | }; |
bb21803e SH |
1050 | |
1051 | msiof2: spi@e6e00000 { | |
1052 | compatible = "renesas,msiof-r8a7791", | |
1053 | "renesas,rcar-gen2-msiof"; | |
1054 | reg = <0 0xe6e00000 0 0x0064>; | |
1055 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
1056 | clocks = <&cpg CPG_MOD 205>; | |
1057 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, | |
1058 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1059 | dma-names = "tx", "rx", "tx", "rx"; | |
1060 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1061 | resets = <&cpg 205>; | |
1062 | #address-cells = <1>; | |
1063 | #size-cells = <0>; | |
1064 | status = "disabled"; | |
3b7e530d | 1065 | }; |
3b7e530d | 1066 | |
bb21803e SH |
1067 | adc: adc@e6e54000 { |
1068 | compatible = "renesas,r8a7791-gyroadc", | |
1069 | "renesas,rcar-gyroadc"; | |
1070 | reg = <0 0xe6e54000 0 64>; | |
1071 | clocks = <&cpg CPG_MOD 901>; | |
1072 | clock-names = "fck"; | |
1073 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1074 | resets = <&cpg 901>; | |
1075 | status = "disabled"; | |
1076 | }; | |
0b8d1d57 | 1077 | |
bb21803e SH |
1078 | can0: can@e6e80000 { |
1079 | compatible = "renesas,can-r8a7791", | |
1080 | "renesas,rcar-gen2-can"; | |
1081 | reg = <0 0xe6e80000 0 0x1000>; | |
1082 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
1083 | clocks = <&cpg CPG_MOD 916>, | |
1084 | <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; | |
1085 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1086 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1087 | resets = <&cpg 916>; | |
1088 | status = "disabled"; | |
1089 | }; | |
0b8d1d57 | 1090 | |
bb21803e SH |
1091 | can1: can@e6e88000 { |
1092 | compatible = "renesas,can-r8a7791", | |
1093 | "renesas,rcar-gen2-can"; | |
1094 | reg = <0 0xe6e88000 0 0x1000>; | |
1095 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
1096 | clocks = <&cpg CPG_MOD 915>, | |
1097 | <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; | |
1098 | clock-names = "clkp1", "clkp2", "can_clk"; | |
1099 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1100 | resets = <&cpg 915>; | |
1101 | status = "disabled"; | |
1102 | }; | |
0b8d1d57 | 1103 | |
bb21803e SH |
1104 | vin0: video@e6ef0000 { |
1105 | compatible = "renesas,vin-r8a7791", | |
1106 | "renesas,rcar-gen2-vin"; | |
1107 | reg = <0 0xe6ef0000 0 0x1000>; | |
1108 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; | |
1109 | clocks = <&cpg CPG_MOD 811>; | |
1110 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1111 | resets = <&cpg 811>; | |
1112 | status = "disabled"; | |
1113 | }; | |
8eefac2d | 1114 | |
bb21803e SH |
1115 | vin1: video@e6ef1000 { |
1116 | compatible = "renesas,vin-r8a7791", | |
1117 | "renesas,rcar-gen2-vin"; | |
1118 | reg = <0 0xe6ef1000 0 0x1000>; | |
1119 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; | |
1120 | clocks = <&cpg CPG_MOD 810>; | |
1121 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1122 | resets = <&cpg 810>; | |
1123 | status = "disabled"; | |
1124 | }; | |
8eefac2d | 1125 | |
bb21803e SH |
1126 | vin2: video@e6ef2000 { |
1127 | compatible = "renesas,vin-r8a7791", | |
1128 | "renesas,rcar-gen2-vin"; | |
1129 | reg = <0 0xe6ef2000 0 0x1000>; | |
1130 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; | |
1131 | clocks = <&cpg CPG_MOD 809>; | |
1132 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1133 | resets = <&cpg 809>; | |
1134 | status = "disabled"; | |
1135 | }; | |
1136 | ||
1137 | rcar_sound: sound@ec500000 { | |
1138 | /* | |
1139 | * #sound-dai-cells is required | |
1140 | * | |
1141 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1142 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1143 | */ | |
1144 | compatible = "renesas,rcar_sound-r8a7791", | |
1145 | "renesas,rcar_sound-gen2"; | |
1146 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
1147 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1148 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
1149 | <0 0xec541000 0 0x280>, /* SSI */ | |
1150 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
1151 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
1152 | ||
1153 | clocks = <&cpg CPG_MOD 1005>, | |
1154 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1155 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1156 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1157 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1158 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
1159 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, | |
1160 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1161 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1162 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1163 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
1164 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1165 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, | |
1166 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, | |
1167 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, | |
1168 | <&cpg CPG_CORE R8A7791_CLK_M2>; | |
1169 | clock-names = "ssi-all", | |
1170 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1171 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1172 | "ssi.1", "ssi.0", "src.9", "src.8", | |
1173 | "src.7", "src.6", "src.5", "src.4", | |
1174 | "src.3", "src.2", "src.1", "src.0", | |
1175 | "ctu.0", "ctu.1", | |
1176 | "mix.0", "mix.1", | |
1177 | "dvc.0", "dvc.1", | |
1178 | "clk_a", "clk_b", "clk_c", "clk_i"; | |
1179 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1180 | resets = <&cpg 1005>, | |
1181 | <&cpg 1006>, <&cpg 1007>, | |
1182 | <&cpg 1008>, <&cpg 1009>, | |
1183 | <&cpg 1010>, <&cpg 1011>, | |
1184 | <&cpg 1012>, <&cpg 1013>, | |
1185 | <&cpg 1014>, <&cpg 1015>; | |
1186 | reset-names = "ssi-all", | |
1187 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1188 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1189 | "ssi.1", "ssi.0"; | |
1190 | ||
1191 | status = "disabled"; | |
1192 | ||
1193 | rcar_sound,dvc { | |
1194 | dvc0: dvc-0 { | |
1195 | dmas = <&audma1 0xbc>; | |
1196 | dma-names = "tx"; | |
1197 | }; | |
1198 | dvc1: dvc-1 { | |
1199 | dmas = <&audma1 0xbe>; | |
1200 | dma-names = "tx"; | |
1201 | }; | |
1202 | }; | |
1203 | ||
1204 | rcar_sound,mix { | |
1205 | mix0: mix-0 { }; | |
1206 | mix1: mix-1 { }; | |
1207 | }; | |
1208 | ||
1209 | rcar_sound,ctu { | |
1210 | ctu00: ctu-0 { }; | |
1211 | ctu01: ctu-1 { }; | |
1212 | ctu02: ctu-2 { }; | |
1213 | ctu03: ctu-3 { }; | |
1214 | ctu10: ctu-4 { }; | |
1215 | ctu11: ctu-5 { }; | |
1216 | ctu12: ctu-6 { }; | |
1217 | ctu13: ctu-7 { }; | |
1218 | }; | |
1219 | ||
1220 | rcar_sound,src { | |
1221 | src0: src-0 { | |
1222 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; | |
1223 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
1224 | dma-names = "rx", "tx"; | |
1225 | }; | |
1226 | src1: src-1 { | |
1227 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; | |
1228 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
1229 | dma-names = "rx", "tx"; | |
1230 | }; | |
1231 | src2: src-2 { | |
1232 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | |
1233 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
1234 | dma-names = "rx", "tx"; | |
1235 | }; | |
1236 | src3: src-3 { | |
1237 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | |
1238 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
1239 | dma-names = "rx", "tx"; | |
1240 | }; | |
1241 | src4: src-4 { | |
1242 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | |
1243 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
1244 | dma-names = "rx", "tx"; | |
1245 | }; | |
1246 | src5: src-5 { | |
1247 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | |
1248 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
1249 | dma-names = "rx", "tx"; | |
1250 | }; | |
1251 | src6: src-6 { | |
1252 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | |
1253 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
1254 | dma-names = "rx", "tx"; | |
1255 | }; | |
1256 | src7: src-7 { | |
1257 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | |
1258 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
1259 | dma-names = "rx", "tx"; | |
1260 | }; | |
1261 | src8: src-8 { | |
1262 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | |
1263 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
1264 | dma-names = "rx", "tx"; | |
1265 | }; | |
1266 | src9: src-9 { | |
1267 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | |
1268 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
1269 | dma-names = "rx", "tx"; | |
1270 | }; | |
1271 | }; | |
1272 | ||
1273 | rcar_sound,ssi { | |
1274 | ssi0: ssi-0 { | |
1275 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; | |
1276 | dmas = <&audma0 0x01>, <&audma1 0x02>, | |
1277 | <&audma0 0x15>, <&audma1 0x16>; | |
1278 | dma-names = "rx", "tx", "rxu", "txu"; | |
1279 | }; | |
1280 | ssi1: ssi-1 { | |
1281 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; | |
1282 | dmas = <&audma0 0x03>, <&audma1 0x04>, | |
1283 | <&audma0 0x49>, <&audma1 0x4a>; | |
1284 | dma-names = "rx", "tx", "rxu", "txu"; | |
1285 | }; | |
1286 | ssi2: ssi-2 { | |
1287 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | |
1288 | dmas = <&audma0 0x05>, <&audma1 0x06>, | |
1289 | <&audma0 0x63>, <&audma1 0x64>; | |
1290 | dma-names = "rx", "tx", "rxu", "txu"; | |
1291 | }; | |
1292 | ssi3: ssi-3 { | |
1293 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | |
1294 | dmas = <&audma0 0x07>, <&audma1 0x08>, | |
1295 | <&audma0 0x6f>, <&audma1 0x70>; | |
1296 | dma-names = "rx", "tx", "rxu", "txu"; | |
1297 | }; | |
1298 | ssi4: ssi-4 { | |
1299 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | |
1300 | dmas = <&audma0 0x09>, <&audma1 0x0a>, | |
1301 | <&audma0 0x71>, <&audma1 0x72>; | |
1302 | dma-names = "rx", "tx", "rxu", "txu"; | |
1303 | }; | |
1304 | ssi5: ssi-5 { | |
1305 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | |
1306 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, | |
1307 | <&audma0 0x73>, <&audma1 0x74>; | |
1308 | dma-names = "rx", "tx", "rxu", "txu"; | |
1309 | }; | |
1310 | ssi6: ssi-6 { | |
1311 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | |
1312 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, | |
1313 | <&audma0 0x75>, <&audma1 0x76>; | |
1314 | dma-names = "rx", "tx", "rxu", "txu"; | |
1315 | }; | |
1316 | ssi7: ssi-7 { | |
1317 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | |
1318 | dmas = <&audma0 0x0f>, <&audma1 0x10>, | |
1319 | <&audma0 0x79>, <&audma1 0x7a>; | |
1320 | dma-names = "rx", "tx", "rxu", "txu"; | |
1321 | }; | |
1322 | ssi8: ssi-8 { | |
1323 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | |
1324 | dmas = <&audma0 0x11>, <&audma1 0x12>, | |
1325 | <&audma0 0x7b>, <&audma1 0x7c>; | |
1326 | dma-names = "rx", "tx", "rxu", "txu"; | |
1327 | }; | |
1328 | ssi9: ssi-9 { | |
1329 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | |
1330 | dmas = <&audma0 0x13>, <&audma1 0x14>, | |
1331 | <&audma0 0x7d>, <&audma1 0x7e>; | |
1332 | dma-names = "rx", "tx", "rxu", "txu"; | |
1333 | }; | |
1334 | }; | |
1335 | }; | |
1336 | ||
1337 | audma0: dma-controller@ec700000 { | |
1338 | compatible = "renesas,dmac-r8a7791", | |
1339 | "renesas,rcar-dmac"; | |
1340 | reg = <0 0xec700000 0 0x10000>; | |
1341 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
1342 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
1343 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
1344 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
1345 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
1346 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
1347 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
1348 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
1349 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
1350 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
1351 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
1352 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
1353 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
1354 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
1355 | interrupt-names = "error", | |
1356 | "ch0", "ch1", "ch2", "ch3", | |
1357 | "ch4", "ch5", "ch6", "ch7", | |
1358 | "ch8", "ch9", "ch10", "ch11", | |
1359 | "ch12"; | |
1360 | clocks = <&cpg CPG_MOD 502>; | |
1361 | clock-names = "fck"; | |
1362 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1363 | resets = <&cpg 502>; | |
1364 | #dma-cells = <1>; | |
1365 | dma-channels = <13>; | |
1366 | }; | |
1367 | ||
1368 | audma1: dma-controller@ec720000 { | |
1369 | compatible = "renesas,dmac-r8a7791", | |
1370 | "renesas,rcar-dmac"; | |
1371 | reg = <0 0xec720000 0 0x10000>; | |
1372 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
1373 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
1374 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
1375 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
1376 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
1377 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
1378 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
1379 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
1380 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
1381 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
1382 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
1383 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
1384 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
1385 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
1386 | interrupt-names = "error", | |
1387 | "ch0", "ch1", "ch2", "ch3", | |
1388 | "ch4", "ch5", "ch6", "ch7", | |
1389 | "ch8", "ch9", "ch10", "ch11", | |
1390 | "ch12"; | |
1391 | clocks = <&cpg CPG_MOD 501>; | |
1392 | clock-names = "fck"; | |
1393 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1394 | resets = <&cpg 501>; | |
1395 | #dma-cells = <1>; | |
1396 | dma-channels = <13>; | |
1397 | }; | |
8eefac2d | 1398 | |
bb21803e SH |
1399 | xhci: usb@ee000000 { |
1400 | compatible = "renesas,xhci-r8a7791", | |
1401 | "renesas,rcar-gen2-xhci"; | |
1402 | reg = <0 0xee000000 0 0xc00>; | |
1403 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; | |
1404 | clocks = <&cpg CPG_MOD 328>; | |
1405 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1406 | resets = <&cpg 328>; | |
1407 | phys = <&usb2 1>; | |
1408 | phy-names = "usb"; | |
1409 | status = "disabled"; | |
1410 | }; | |
1411 | ||
1412 | pci0: pci@ee090000 { | |
1413 | compatible = "renesas,pci-r8a7791", | |
1414 | "renesas,pci-rcar-gen2"; | |
1415 | device_type = "pci"; | |
1416 | reg = <0 0xee090000 0 0xc00>, | |
1417 | <0 0xee080000 0 0x1100>; | |
1418 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1419 | clocks = <&cpg CPG_MOD 703>; | |
1420 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1421 | resets = <&cpg 703>; | |
1422 | status = "disabled"; | |
1423 | ||
1424 | bus-range = <0 0>; | |
1425 | #address-cells = <3>; | |
1426 | #size-cells = <2>; | |
1427 | #interrupt-cells = <1>; | |
1428 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1429 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
1430 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1431 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1432 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
1433 | ||
1434 | usb@1,0 { | |
1435 | reg = <0x800 0 0 0 0>; | |
1436 | phys = <&usb0 0>; | |
1437 | phy-names = "usb"; | |
1438 | }; | |
1439 | ||
1440 | usb@2,0 { | |
1441 | reg = <0x1000 0 0 0 0>; | |
1442 | phys = <&usb0 0>; | |
1443 | phy-names = "usb"; | |
1444 | }; | |
1445 | }; | |
1446 | ||
1447 | pci1: pci@ee0d0000 { | |
1448 | compatible = "renesas,pci-r8a7791", | |
1449 | "renesas,pci-rcar-gen2"; | |
1450 | device_type = "pci"; | |
1451 | reg = <0 0xee0d0000 0 0xc00>, | |
1452 | <0 0xee0c0000 0 0x1100>; | |
1453 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1454 | clocks = <&cpg CPG_MOD 703>; | |
1455 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1456 | resets = <&cpg 703>; | |
1457 | status = "disabled"; | |
1458 | ||
1459 | bus-range = <1 1>; | |
1460 | #address-cells = <3>; | |
1461 | #size-cells = <2>; | |
1462 | #interrupt-cells = <1>; | |
1463 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1464 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
1465 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1466 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1467 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
1468 | ||
1469 | usb@1,0 { | |
1470 | reg = <0x10800 0 0 0 0>; | |
1471 | phys = <&usb2 0>; | |
1472 | phy-names = "usb"; | |
1473 | }; | |
1474 | ||
1475 | usb@2,0 { | |
1476 | reg = <0x11000 0 0 0 0>; | |
1477 | phys = <&usb2 0>; | |
1478 | phy-names = "usb"; | |
1479 | }; | |
1480 | }; | |
1481 | ||
1482 | sdhi0: sd@ee100000 { | |
1483 | compatible = "renesas,sdhi-r8a7791", | |
1484 | "renesas,rcar-gen2-sdhi"; | |
1485 | reg = <0 0xee100000 0 0x328>; | |
1486 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
1487 | clocks = <&cpg CPG_MOD 314>; | |
1488 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, | |
1489 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
1490 | dma-names = "tx", "rx", "tx", "rx"; | |
1491 | max-frequency = <195000000>; | |
1492 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1493 | resets = <&cpg 314>; | |
1494 | status = "disabled"; | |
1495 | }; | |
1496 | ||
1497 | sdhi1: sd@ee140000 { | |
1498 | compatible = "renesas,sdhi-r8a7791", | |
1499 | "renesas,rcar-gen2-sdhi"; | |
1500 | reg = <0 0xee140000 0 0x100>; | |
1501 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; | |
1502 | clocks = <&cpg CPG_MOD 312>; | |
1503 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, | |
1504 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
1505 | dma-names = "tx", "rx", "tx", "rx"; | |
1506 | max-frequency = <97500000>; | |
1507 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1508 | resets = <&cpg 312>; | |
1509 | status = "disabled"; | |
1510 | }; | |
1511 | ||
1512 | sdhi2: sd@ee160000 { | |
1513 | compatible = "renesas,sdhi-r8a7791", | |
1514 | "renesas,rcar-gen2-sdhi"; | |
1515 | reg = <0 0xee160000 0 0x100>; | |
1516 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
1517 | clocks = <&cpg CPG_MOD 311>; | |
1518 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, | |
1519 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
1520 | dma-names = "tx", "rx", "tx", "rx"; | |
1521 | max-frequency = <97500000>; | |
1522 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1523 | resets = <&cpg 311>; | |
1524 | status = "disabled"; | |
1525 | }; | |
1526 | ||
1527 | mmcif0: mmc@ee200000 { | |
1528 | compatible = "renesas,mmcif-r8a7791", | |
1529 | "renesas,sh-mmcif"; | |
1530 | reg = <0 0xee200000 0 0x80>; | |
1531 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
1532 | clocks = <&cpg CPG_MOD 315>; | |
1533 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, | |
1534 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
1535 | dma-names = "tx", "rx", "tx", "rx"; | |
1536 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1537 | resets = <&cpg 315>; | |
1538 | reg-io-width = <4>; | |
1539 | status = "disabled"; | |
1540 | max-frequency = <97500000>; | |
1541 | }; | |
1542 | ||
1543 | sata0: sata@ee300000 { | |
1544 | compatible = "renesas,sata-r8a7791", | |
1545 | "renesas,rcar-gen2-sata"; | |
441f61e3 | 1546 | reg = <0 0xee300000 0 0x200000>; |
bb21803e SH |
1547 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
1548 | clocks = <&cpg CPG_MOD 815>; | |
1549 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1550 | resets = <&cpg 815>; | |
1551 | status = "disabled"; | |
1552 | }; | |
1553 | ||
1554 | sata1: sata@ee500000 { | |
1555 | compatible = "renesas,sata-r8a7791", | |
1556 | "renesas,rcar-gen2-sata"; | |
441f61e3 | 1557 | reg = <0 0xee500000 0 0x200000>; |
bb21803e SH |
1558 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
1559 | clocks = <&cpg CPG_MOD 814>; | |
1560 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1561 | resets = <&cpg 814>; | |
1562 | status = "disabled"; | |
1563 | }; | |
1564 | ||
1565 | ether: ethernet@ee700000 { | |
1566 | compatible = "renesas,ether-r8a7791", | |
1567 | "renesas,rcar-gen2-ether"; | |
1568 | reg = <0 0xee700000 0 0x400>; | |
1569 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; | |
1570 | clocks = <&cpg CPG_MOD 813>; | |
1571 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1572 | resets = <&cpg 813>; | |
1573 | phy-mode = "rmii"; | |
8eefac2d LP |
1574 | #address-cells = <1>; |
1575 | #size-cells = <0>; | |
bb21803e SH |
1576 | status = "disabled"; |
1577 | }; | |
8eefac2d | 1578 | |
bb21803e SH |
1579 | gic: interrupt-controller@f1001000 { |
1580 | compatible = "arm,gic-400"; | |
1581 | #interrupt-cells = <3>; | |
1582 | #address-cells = <0>; | |
1583 | interrupt-controller; | |
1584 | reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, | |
1585 | <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; | |
1586 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; | |
1587 | clocks = <&cpg CPG_MOD 408>; | |
1588 | clock-names = "clk"; | |
1589 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1590 | resets = <&cpg 408>; | |
1591 | }; | |
1592 | ||
1593 | pciec: pcie@fe000000 { | |
1594 | compatible = "renesas,pcie-r8a7791", | |
1595 | "renesas,pcie-rcar-gen2"; | |
1596 | reg = <0 0xfe000000 0 0x80000>; | |
1597 | #address-cells = <3>; | |
1598 | #size-cells = <2>; | |
1599 | bus-range = <0x00 0xff>; | |
1600 | device_type = "pci"; | |
1601 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1602 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1603 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1604 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1605 | /* Map all possible DDR as inbound ranges */ | |
1606 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1607 | 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; | |
1608 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | |
1609 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1610 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
1611 | #interrupt-cells = <1>; | |
1612 | interrupt-map-mask = <0 0 0 0>; | |
1613 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
1614 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
1615 | clock-names = "pcie", "pcie_bus"; | |
1616 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1617 | resets = <&cpg 319>; | |
1618 | status = "disabled"; | |
1619 | }; | |
1620 | ||
1621 | vsp@fe928000 { | |
1622 | compatible = "renesas,vsp1"; | |
1623 | reg = <0 0xfe928000 0 0x8000>; | |
1624 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; | |
1625 | clocks = <&cpg CPG_MOD 131>; | |
1626 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1627 | resets = <&cpg 131>; | |
1628 | }; | |
1629 | ||
1630 | vsp@fe930000 { | |
1631 | compatible = "renesas,vsp1"; | |
1632 | reg = <0 0xfe930000 0 0x8000>; | |
1633 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; | |
1634 | clocks = <&cpg CPG_MOD 128>; | |
1635 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1636 | resets = <&cpg 128>; | |
1637 | }; | |
1638 | ||
1639 | vsp@fe938000 { | |
1640 | compatible = "renesas,vsp1"; | |
1641 | reg = <0 0xfe938000 0 0x8000>; | |
1642 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; | |
1643 | clocks = <&cpg CPG_MOD 127>; | |
1644 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1645 | resets = <&cpg 127>; | |
1646 | }; | |
1647 | ||
e7f36fb8 LP |
1648 | fdp1@fe940000 { |
1649 | compatible = "renesas,fdp1"; | |
1650 | reg = <0 0xfe940000 0 0x2400>; | |
1651 | interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; | |
1652 | clocks = <&cpg CPG_MOD 119>; | |
1653 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1654 | resets = <&cpg 119>; | |
1655 | }; | |
1656 | ||
1657 | fdp1@fe944000 { | |
1658 | compatible = "renesas,fdp1"; | |
1659 | reg = <0 0xfe944000 0 0x2400>; | |
1660 | interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; | |
1661 | clocks = <&cpg CPG_MOD 118>; | |
1662 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1663 | resets = <&cpg 118>; | |
1664 | }; | |
1665 | ||
bb21803e SH |
1666 | jpu: jpeg-codec@fe980000 { |
1667 | compatible = "renesas,jpu-r8a7791", | |
1668 | "renesas,rcar-gen2-jpu"; | |
1669 | reg = <0 0xfe980000 0 0x10300>; | |
1670 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; | |
1671 | clocks = <&cpg CPG_MOD 106>; | |
1672 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1673 | resets = <&cpg 106>; | |
1674 | }; | |
1675 | ||
1676 | du: display@feb00000 { | |
1677 | compatible = "renesas,du-r8a7791"; | |
e5c3f470 | 1678 | reg = <0 0xfeb00000 0 0x40000>; |
bb21803e SH |
1679 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
1680 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; | |
1681 | clocks = <&cpg CPG_MOD 724>, | |
e5c3f470 LP |
1682 | <&cpg CPG_MOD 723>; |
1683 | clock-names = "du.0", "du.1"; | |
bb21803e SH |
1684 | status = "disabled"; |
1685 | ||
1686 | ports { | |
1687 | #address-cells = <1>; | |
1688 | #size-cells = <0>; | |
1689 | ||
1690 | port@0 { | |
1691 | reg = <0>; | |
1692 | du_out_rgb: endpoint { | |
1693 | }; | |
8eefac2d | 1694 | }; |
bb21803e SH |
1695 | port@1 { |
1696 | reg = <1>; | |
1697 | du_out_lvds0: endpoint { | |
e5c3f470 LP |
1698 | remote-endpoint = <&lvds0_in>; |
1699 | }; | |
1700 | }; | |
1701 | }; | |
1702 | }; | |
1703 | ||
1704 | lvds0: lvds@feb90000 { | |
1705 | compatible = "renesas,r8a7791-lvds"; | |
1706 | reg = <0 0xfeb90000 0 0x1c>; | |
1707 | clocks = <&cpg CPG_MOD 726>; | |
1708 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1709 | resets = <&cpg 726>; | |
1710 | status = "disabled"; | |
1711 | ||
1712 | ports { | |
1713 | #address-cells = <1>; | |
1714 | #size-cells = <0>; | |
1715 | ||
1716 | port@0 { | |
1717 | reg = <0>; | |
1718 | lvds0_in: endpoint { | |
1719 | remote-endpoint = <&du_out_lvds0>; | |
1720 | }; | |
1721 | }; | |
1722 | port@1 { | |
1723 | reg = <1>; | |
1724 | lvds0_out: endpoint { | |
bb21803e | 1725 | }; |
8eefac2d LP |
1726 | }; |
1727 | }; | |
1728 | }; | |
8eefac2d | 1729 | |
bb21803e SH |
1730 | prr: chipid@ff000044 { |
1731 | compatible = "renesas,prr"; | |
1732 | reg = <0 0xff000044 0 4>; | |
1733 | }; | |
1734 | ||
1735 | cmt0: timer@ffca0000 { | |
1736 | compatible = "renesas,r8a7791-cmt0", | |
1737 | "renesas,rcar-gen2-cmt0"; | |
1738 | reg = <0 0xffca0000 0 0x1004>; | |
1739 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, | |
1740 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
1741 | clocks = <&cpg CPG_MOD 124>; | |
1742 | clock-names = "fck"; | |
1743 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1744 | resets = <&cpg 124>; | |
1745 | ||
1746 | status = "disabled"; | |
1747 | }; | |
3cf01884 | 1748 | |
bb21803e SH |
1749 | cmt1: timer@e6130000 { |
1750 | compatible = "renesas,r8a7791-cmt1", | |
1751 | "renesas,rcar-gen2-cmt1"; | |
1752 | reg = <0 0xe6130000 0 0x1004>; | |
1753 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, | |
1754 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
1755 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
1756 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
1757 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
1758 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
1759 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
1760 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
1761 | clocks = <&cpg CPG_MOD 329>; | |
1762 | clock-names = "fck"; | |
1763 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; | |
1764 | resets = <&cpg 329>; | |
1765 | ||
1766 | status = "disabled"; | |
1767 | }; | |
3cf01884 SS |
1768 | }; |
1769 | ||
21b05c52 SH |
1770 | thermal-zones { |
1771 | cpu_thermal: cpu-thermal { | |
c57c1b7c SH |
1772 | polling-delay-passive = <0>; |
1773 | polling-delay = <0>; | |
21b05c52 SH |
1774 | |
1775 | thermal-sensors = <&thermal>; | |
1776 | ||
1777 | trips { | |
1778 | cpu-crit { | |
c57c1b7c SH |
1779 | temperature = <95000>; |
1780 | hysteresis = <0>; | |
1781 | type = "critical"; | |
21b05c52 SH |
1782 | }; |
1783 | }; | |
1784 | cooling-maps { | |
1785 | }; | |
1786 | }; | |
1787 | }; | |
1788 | ||
bb21803e SH |
1789 | timer { |
1790 | compatible = "arm,armv7-timer"; | |
1791 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1792 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1793 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1794 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
0caa3660 MU |
1795 | }; |
1796 | ||
580aa7cb GU |
1797 | /* External USB clock - can be overridden by the board */ |
1798 | usb_extal_clk: usb_extal { | |
1799 | compatible = "fixed-clock"; | |
1800 | #clock-cells = <0>; | |
1801 | clock-frequency = <48000000>; | |
1802 | }; | |
0d0771ab | 1803 | }; |