ARM: dts: lager: use demuxer for IIC2/I2C2
[linux-2.6-block.git] / arch / arm / boot / dts / r8a7790-lager.dts
CommitLineData
3cc828fd
MD
1/*
2 * Device Tree Source for the Lager board
3 *
da4ea951
SS
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
880cb570 6 * Copyright (C) 2015-2016 Renesas Electronics Corporation
3cc828fd
MD
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
8ea7a44a
KM
13/*
14 * SSI-AK4643
15 *
16 * SW1: 1: AK4643
17 * 2: CN22
18 * 3: ADV7511
19 *
20 * This command is required when Playback/Capture
21 *
22 * amixer set "LINEOUT Mixer DACL" on
e110c541
KM
23 * amixer set "DVC Out" 100%
24 * amixer set "DVC In" 100%
25 *
26 * You can use Mute
27 *
28 * amixer set "DVC Out Mute" on
29 * amixer set "DVC In Mute" on
bd2e4a62
KM
30 *
31 * You can use Volume Ramp
32 *
33 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
34 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
35 * amixer set "DVC Out Ramp" on
36 * aplay xxx.wav &
37 * amixer set "DVC Out" 80% // Volume Down
38 * amixer set "DVC Out" 100% // Volume Up
8ea7a44a
KM
39 */
40
3cc828fd 41/dts-v1/;
31c46cbf 42#include "r8a7790.dtsi"
39fa511b 43#include <dt-bindings/gpio/gpio.h>
f7dcd382 44#include <dt-bindings/input/input.h>
3cc828fd
MD
45
46/ {
47 model = "Lager";
48 compatible = "renesas,lager", "renesas,r8a7790";
49
4e9c4877 50 aliases {
430d7bad 51 serial0 = &scif0;
78c11ec2 52 serial1 = &scifa1;
b2f15ca6 53 i2c8 = &gpioi2c1;
4e65e1b6 54 i2c9 = &gpioi2c2;
1e26fcf3 55 i2c10 = &i2cexio0;
b2f15ca6 56 i2c11 = &i2cexio1;
4e65e1b6 57 i2c12 = &i2chdmi;
4e9c4877
LP
58 };
59
3cc828fd 60 chosen {
569dd56c 61 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
57d19f81 62 stdout-path = "serial0:115200n8";
3cc828fd
MD
63 };
64
65 memory@40000000 {
66 device_type = "memory";
7b16c61a 67 reg = <0 0x40000000 0 0x40000000>;
3cc828fd
MD
68 };
69
126f998e 70 memory@140000000 {
62bc32a2 71 device_type = "memory";
7b16c61a 72 reg = <1 0x40000000 0 0xc0000000>;
62bc32a2
MD
73 };
74
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MD
75 lbsc {
76 #address-cells = <1>;
77 #size-cells = <1>;
78 };
39fa511b 79
54caf681 80 keyboard {
f7dcd382
MD
81 compatible = "gpio-keys";
82
affe802c 83 one {
f7dcd382
MD
84 linux,code = <KEY_1>;
85 label = "SW2-1";
0cc16889 86 wakeup-source;
f7dcd382
MD
87 debounce-interval = <20>;
88 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
89 };
affe802c 90 two {
f7dcd382
MD
91 linux,code = <KEY_2>;
92 label = "SW2-2";
0cc16889 93 wakeup-source;
f7dcd382
MD
94 debounce-interval = <20>;
95 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
96 };
affe802c 97 three {
f7dcd382
MD
98 linux,code = <KEY_3>;
99 label = "SW2-3";
0cc16889 100 wakeup-source;
f7dcd382
MD
101 debounce-interval = <20>;
102 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
103 };
affe802c 104 four {
f7dcd382
MD
105 linux,code = <KEY_4>;
106 label = "SW2-4";
0cc16889 107 wakeup-source;
f7dcd382
MD
108 debounce-interval = <20>;
109 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
110 };
111 };
112
39fa511b
LP
113 leds {
114 compatible = "gpio-leds";
115 led6 {
116 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
117 };
118 led7 {
119 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
120 };
121 led8 {
122 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
123 };
124 };
125
affe802c 126 fixedregulator3v3: regulator-3v3 {
39fa511b
LP
127 compatible = "regulator-fixed";
128 regulator-name = "fixed-3.3V";
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
131 regulator-boot-on;
132 regulator-always-on;
133 };
c6119944 134
affe802c 135 vcc_sdhi0: regulator-vcc-sdhi0 {
c6119944
KM
136 compatible = "regulator-fixed";
137
138 regulator-name = "SDHI0 Vcc";
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
141
142 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
143 enable-active-high;
144 };
145
affe802c 146 vccq_sdhi0: regulator-vccq-sdhi0 {
c6119944
KM
147 compatible = "regulator-gpio";
148
149 regulator-name = "SDHI0 VccQ";
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <3300000>;
152
153 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
154 gpios-states = <1>;
155 states = <3300000 1
156 1800000 0>;
157 };
158
affe802c 159 vcc_sdhi2: regulator-vcc-sdhi2 {
c6119944
KM
160 compatible = "regulator-fixed";
161
162 regulator-name = "SDHI2 Vcc";
163 regulator-min-microvolt = <3300000>;
164 regulator-max-microvolt = <3300000>;
165
166 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
167 enable-active-high;
168 };
169
affe802c 170 vccq_sdhi2: regulator-vccq-sdhi2 {
c6119944
KM
171 compatible = "regulator-gpio";
172
173 regulator-name = "SDHI2 VccQ";
174 regulator-min-microvolt = <1800000>;
175 regulator-max-microvolt = <3300000>;
176
177 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
178 gpios-states = <1>;
179 states = <3300000 1
180 1800000 0>;
181 };
3edd18ff 182
a5bad2c7 183 audio_clock: audio_clock {
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KM
184 compatible = "fixed-clock";
185 #clock-cells = <0>;
186 clock-frequency = <11289600>;
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KM
187 };
188
30be0ba5 189 rsnd_ak4643: sound {
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KM
190 compatible = "simple-audio-card";
191
192 simple-audio-card,format = "left_j";
193 simple-audio-card,bitclock-master = <&sndcodec>;
194 simple-audio-card,frame-master = <&sndcodec>;
195
196 sndcpu: simple-audio-card,cpu {
197 sound-dai = <&rcar_sound>;
198 };
199
200 sndcodec: simple-audio-card,codec {
201 sound-dai = <&ak4643>;
6bc651af 202 clocks = <&audio_clock>;
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KM
203 };
204 };
205
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LP
206 vga-encoder {
207 compatible = "adi,adv7123";
208
209 ports {
210 #address-cells = <1>;
211 #size-cells = <0>;
212
213 port@0 {
214 reg = <0>;
215 adv7123_in: endpoint {
216 remote-endpoint = <&du_out_rgb>;
217 };
218 };
219 port@1 {
220 reg = <1>;
221 adv7123_out: endpoint {
222 remote-endpoint = <&vga_in>;
223 };
224 };
225 };
226 };
227
228 vga {
229 compatible = "vga-connector";
230
231 port {
232 vga_in: endpoint {
233 remote-endpoint = <&adv7123_out>;
234 };
235 };
236 };
fd25cdd1 237
56548d0c
WT
238 hdmi-in {
239 compatible = "hdmi-connector";
240 type = "a";
241
242 port {
243 hdmi_con_in: endpoint {
244 remote-endpoint = <&adv7612_in>;
245 };
246 };
247 };
248
fd25cdd1
LP
249 hdmi-out {
250 compatible = "hdmi-connector";
251 type = "a";
252
253 port {
56548d0c 254 hdmi_con_out: endpoint {
fd25cdd1
LP
255 remote-endpoint = <&adv7511_out>;
256 };
257 };
258 };
26c00ab4
LP
259
260 x2_clk: x2-clock {
261 compatible = "fixed-clock";
262 #clock-cells = <0>;
263 clock-frequency = <148500000>;
264 };
265
266 x13_clk: x13-clock {
267 compatible = "fixed-clock";
268 #clock-cells = <0>;
269 clock-frequency = <148500000>;
270 };
880cb570 271
b2f15ca6
SH
272 gpioi2c1: i2c-8 {
273 #address-cells = <1>;
274 #size-cells = <0>;
275 compatible = "i2c-gpio";
276 status = "disabled";
e99185b2 277 scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
4e65e1b6
WS
278 sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
279 i2c-gpio,delay-us = <5>;
280 };
281
282 gpioi2c2: i2c-9 {
283 #address-cells = <1>;
284 #size-cells = <0>;
285 compatible = "i2c-gpio";
286 status = "disabled";
287 scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
288 sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
b2f15ca6
SH
289 i2c-gpio,delay-us = <5>;
290 };
291
880cb570
WS
292 /*
293 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
294 * We use the I2C demuxer, so the desired IP core can be selected at runtime
295 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
296 * Note: For testing the I2C slave feature, it is convenient to connect this
297 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
298 * instantiate the slave device at runtime according to the documentation.
299 * You can then communicate with the slave via IIC3.
1e26fcf3
SH
300 *
301 * IIC0/I2C0 does not appear to support fallback to GPIO.
880cb570 302 */
1e26fcf3 303 i2cexio0: i2c-10 {
880cb570
WS
304 compatible = "i2c-demux-pinctrl";
305 i2c-parent = <&iic0>, <&i2c0>;
1e26fcf3 306 i2c-bus-name = "i2c-exio0";
880cb570
WS
307 #address-cells = <1>;
308 #size-cells = <0>;
309 };
b2f15ca6
SH
310
311 /*
312 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
313 * This is similar to the arangement described for i2cexio0 (above)
314 * with a fallback to GPIO also provided.
315 */
316 i2cexio1: i2c-11 {
317 compatible = "i2c-demux-pinctrl";
318 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
319 i2c-bus-name = "i2c-exio1";
320 #address-cells = <1>;
321 #size-cells = <0>;
322 };
4e65e1b6
WS
323
324 /*
325 * IIC2 and I2C2 may be switched using pinmux.
326 * A fallback to GPIO is also provided.
327 */
328 i2chdmi: i2c-12 {
329 compatible = "i2c-demux-pinctrl";
330 i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
331 i2c-bus-name = "i2c-hdmi";
332 #address-cells = <1>;
333 #size-cells = <0>;
334
335 ak4643: codec@12 {
336 compatible = "asahi-kasei,ak4643";
337 #sound-dai-cells = <0>;
338 reg = <0x12>;
339 };
340
341 composite-in@20 {
342 compatible = "adi,adv7180";
343 reg = <0x20>;
344 remote = <&vin1>;
345
346 port {
347 adv7180: endpoint {
348 bus-width = <8>;
349 remote-endpoint = <&vin1ep0>;
350 };
351 };
352 };
353
354 cec_clock: cec-clock {
355 compatible = "fixed-clock";
356 #clock-cells = <0>;
357 clock-frequency = <12000000>;
358 };
359
360 hdmi@39 {
361 compatible = "adi,adv7511w";
362 reg = <0x39>;
363 interrupt-parent = <&gpio1>;
364 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
365 clocks = <&cec_clock>;
366 clock-names = "cec";
367
368 adi,input-depth = <8>;
369 adi,input-colorspace = "rgb";
370 adi,input-clock = "1x";
371 adi,input-style = <1>;
372 adi,input-justification = "evenly";
373
374 ports {
375 #address-cells = <1>;
376 #size-cells = <0>;
377
378 port@0 {
379 reg = <0>;
380 adv7511_in: endpoint {
381 remote-endpoint = <&du_out_lvds0>;
382 };
383 };
384
385 port@1 {
386 reg = <1>;
387 adv7511_out: endpoint {
388 remote-endpoint = <&hdmi_con_out>;
389 };
390 };
391 };
392 };
393
394 hdmi-in@4c {
395 compatible = "adi,adv7612";
396 reg = <0x4c>;
397 interrupt-parent = <&gpio1>;
398 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
399 default-input = <0>;
400
401 ports {
402 #address-cells = <1>;
403 #size-cells = <0>;
404
405 port@0 {
406 reg = <0>;
407 adv7612_in: endpoint {
408 remote-endpoint = <&hdmi_con_in>;
409 };
410 };
411
412 port@2 {
413 reg = <2>;
414 adv7612_out: endpoint {
415 remote-endpoint = <&vin0ep2>;
416 };
417 };
418 };
419 };
420 };
3edd18ff
LP
421};
422
423&du {
424 pinctrl-0 = <&du_pins>;
425 pinctrl-names = "default";
426 status = "okay";
427
5802c420
GU
428 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
429 <&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
26c00ab4
LP
430 <&x13_clk>, <&x2_clk>;
431 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
432 "dclkin.0", "dclkin.1";
433
3edd18ff
LP
434 ports {
435 port@0 {
436 endpoint {
437 remote-endpoint = <&adv7123_in>;
438 };
439 };
fd25cdd1
LP
440 port@1 {
441 endpoint {
442 remote-endpoint = <&adv7511_in>;
443 };
444 };
3edd18ff
LP
445 port@2 {
446 lvds_connector: endpoint {
447 };
448 };
449 };
39fa511b
LP
450};
451
62e43056
LP
452&extal_clk {
453 clock-frequency = <20000000>;
454};
455
39fa511b 456&pfc {
1781460c
GU
457 pinctrl-0 = <&scif_clk_pins>;
458 pinctrl-names = "default";
459
3024f507 460 du_pins: du {
2ffc224f
SH
461 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
462 function = "du";
3024f507
LP
463 };
464
ca348298 465 scif0_pins: scif0 {
2ffc224f
SH
466 groups = "scif0_data";
467 function = "scif0";
39fa511b
LP
468 };
469
1781460c 470 scif_clk_pins: scif_clk {
2ffc224f
SH
471 groups = "scif_clk";
472 function = "scif_clk";
1781460c
GU
473 };
474
da4ea951 475 ether_pins: ether {
2ffc224f
SH
476 groups = "eth_link", "eth_mdio", "eth_rmii";
477 function = "eth";
da4ea951
SS
478 };
479
480 phy1_pins: phy1 {
2ffc224f
SH
481 groups = "intc_irq0";
482 function = "intc";
da4ea951
SS
483 };
484
ca348298 485 scifa1_pins: scifa1 {
2ffc224f
SH
486 groups = "scifa1_data";
487 function = "scifa1";
39fa511b
LP
488 };
489
c6119944 490 sdhi0_pins: sd0 {
2ffc224f
SH
491 groups = "sdhi0_data4", "sdhi0_ctrl";
492 function = "sdhi0";
1ca79699
WS
493 power-source = <3300>;
494 };
495
496 sdhi0_pins_uhs: sd0_uhs {
497 groups = "sdhi0_data4", "sdhi0_ctrl";
498 function = "sdhi0";
499 power-source = <1800>;
c6119944
KM
500 };
501
502 sdhi2_pins: sd2 {
2ffc224f
SH
503 groups = "sdhi2_data4", "sdhi2_ctrl";
504 function = "sdhi2";
1ca79699
WS
505 power-source = <3300>;
506 };
507
508 sdhi2_pins_uhs: sd2_uhs {
509 groups = "sdhi2_data4", "sdhi2_ctrl";
510 function = "sdhi2";
511 power-source = <1800>;
c6119944
KM
512 };
513
39fa511b 514 mmc1_pins: mmc1 {
2ffc224f
SH
515 groups = "mmc1_data8", "mmc1_ctrl";
516 function = "mmc1";
39fa511b 517 };
9fe7c4f8 518
85c5e4c4 519 qspi_pins: qspi {
2ffc224f
SH
520 groups = "qspi_ctrl", "qspi_data4";
521 function = "qspi";
9fe7c4f8 522 };
b0403b91 523
85c5e4c4 524 msiof1_pins: msiof1 {
2ffc224f 525 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
b0403b91 526 "msiof1_tx";
2ffc224f 527 function = "msiof1";
b0403b91 528 };
05f72e03 529
880cb570 530 i2c0_pins: i2c0 {
2ffc224f
SH
531 groups = "i2c0";
532 function = "i2c0";
880cb570
WS
533 };
534
535118ca 535 iic0_pins: iic0 {
2ffc224f
SH
536 groups = "iic0";
537 function = "iic0";
535118ca
WS
538 };
539
b2f15ca6
SH
540 i2c1_pins: i2c1 {
541 groups = "i2c1";
542 function = "i2c1";
543 };
544
cb9a2b12 545 iic1_pins: iic1 {
2ffc224f
SH
546 groups = "iic1";
547 function = "iic1";
d90bf60c
SH
548 };
549
4e65e1b6
WS
550 i2c2_pins: i2c2 {
551 groups = "i2c2";
552 function = "i2c2";
553 };
554
cb9a2b12 555 iic2_pins: iic2 {
2ffc224f
SH
556 groups = "iic2";
557 function = "iic2";
d90bf60c
SH
558 };
559
5179ffd0 560 iic3_pins: iic3 {
2ffc224f
SH
561 groups = "iic3";
562 function = "iic3";
05f72e03 563 };
d8584660 564
e03074a7 565 hsusb_pins: hsusb {
2ffc224f
SH
566 groups = "usb0_ovc_vbus";
567 function = "usb0";
e03074a7
YS
568 };
569
d8584660 570 usb0_pins: usb0 {
2ffc224f
SH
571 groups = "usb0";
572 function = "usb0";
d8584660
BD
573 };
574
575 usb1_pins: usb1 {
2ffc224f
SH
576 groups = "usb1";
577 function = "usb1";
d8584660
BD
578 };
579
580 usb2_pins: usb2 {
2ffc224f
SH
581 groups = "usb2";
582 function = "usb2";
d8584660 583 };
d594c977 584
56548d0c
WT
585 vin0_pins: vin0 {
586 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
587 function = "vin0";
588 };
589
da84fd93 590 vin1_pins: vin1 {
2ffc224f
SH
591 groups = "vin1_data8", "vin1_clk";
592 function = "vin1";
d594c977 593 };
8ea7a44a
KM
594
595 sound_pins: sound {
2ffc224f
SH
596 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
597 function = "ssi";
8ea7a44a
KM
598 };
599
600 sound_clk_pins: sound_clk {
2ffc224f
SH
601 groups = "audio_clk_a";
602 function = "audio_clk";
8ea7a44a 603 };
39fa511b
LP
604};
605
da4ea951
SS
606&ether {
607 pinctrl-0 = <&ether_pins &phy1_pins>;
608 pinctrl-names = "default";
609
610 phy-handle = <&phy1>;
611 renesas,ether-link-active-low;
fd7a8cbf 612 status = "okay";
da4ea951
SS
613
614 phy1: ethernet-phy@1 {
615 reg = <1>;
616 interrupt-parent = <&irqc0>;
617 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 618 micrel,led-mode = <1>;
da4ea951
SS
619 };
620};
621
247fd5ec 622&cmt0 {
fd7a8cbf 623 status = "okay";
247fd5ec
LP
624};
625
39fa511b
LP
626&mmcif1 {
627 pinctrl-0 = <&mmc1_pins>;
628 pinctrl-names = "default";
629
630 vmmc-supply = <&fixedregulator3v3>;
631 bus-width = <8>;
632 non-removable;
633 status = "okay";
3cc828fd 634};
c6181b9f
VB
635
636&sata1 {
637 status = "okay";
638};
9fe7c4f8 639
fad6d45c 640&qspi {
9fe7c4f8
GU
641 pinctrl-0 = <&qspi_pins>;
642 pinctrl-names = "default";
643
644 status = "okay";
645
646 flash: flash@0 {
755185b2 647 compatible = "spansion,s25fl512s", "jedec,spi-nor";
9fe7c4f8
GU
648 reg = <0>;
649 spi-max-frequency = <30000000>;
9909d2cb
GU
650 spi-tx-bus-width = <4>;
651 spi-rx-bus-width = <4>;
cbf41168
HN
652 spi-cpha;
653 spi-cpol;
9fe7c4f8
GU
654 m25p,fast-read;
655
f58bac70 656 partitions {
b88ddbdd 657 compatible = "fixed-partitions";
f58bac70
GU
658 #address-cells = <1>;
659 #size-cells = <1>;
660
661 partition@0 {
662 label = "loader";
663 reg = <0x00000000 0x00040000>;
664 read-only;
665 };
666 partition@40000 {
667 label = "user";
668 reg = <0x00040000 0x00400000>;
669 read-only;
670 };
671 partition@440000 {
672 label = "flash";
673 reg = <0x00440000 0x03bc0000>;
674 };
9fe7c4f8
GU
675 };
676 };
677};
c6119944 678
430d7bad
UH
679&scif0 {
680 pinctrl-0 = <&scif0_pins>;
4e9c4877
LP
681 pinctrl-names = "default";
682
683 status = "okay";
684};
685
7c055894
WS
686&scifa1 {
687 pinctrl-0 = <&scifa1_pins>;
4e9c4877
LP
688 pinctrl-names = "default";
689
690 status = "okay";
691};
692
1781460c
GU
693&scif_clk {
694 clock-frequency = <14745600>;
1781460c
GU
695};
696
b0403b91
GU
697&msiof1 {
698 pinctrl-0 = <&msiof1_pins>;
699 pinctrl-names = "default";
700
701 status = "okay";
702
703 pmic: pmic@0 {
704 compatible = "renesas,r2a11302ft";
705 reg = <0>;
706 spi-max-frequency = <6000000>;
707 spi-cpol;
708 spi-cpha;
709 };
b0403b91
GU
710};
711
c6119944
KM
712&sdhi0 {
713 pinctrl-0 = <&sdhi0_pins>;
1ca79699
WS
714 pinctrl-1 = <&sdhi0_pins_uhs>;
715 pinctrl-names = "default", "state_uhs";
c6119944
KM
716
717 vmmc-supply = <&vcc_sdhi0>;
718 vqmmc-supply = <&vccq_sdhi0>;
719 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
1ca79699 720 sd-uhs-sdr50;
dcc2fe78 721 sd-uhs-sdr104;
c6119944
KM
722 status = "okay";
723};
724
725&sdhi2 {
726 pinctrl-0 = <&sdhi2_pins>;
1ca79699
WS
727 pinctrl-1 = <&sdhi2_pins_uhs>;
728 pinctrl-names = "default", "state_uhs";
c6119944
KM
729
730 vmmc-supply = <&vcc_sdhi2>;
731 vqmmc-supply = <&vccq_sdhi2>;
732 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
1ca79699 733 sd-uhs-sdr50;
c6119944
KM
734 status = "okay";
735};
05f72e03 736
b989e138
BC
737&cpu0 {
738 cpu0-supply = <&vdd_dvfs>;
739};
e489c2a9 740
880cb570
WS
741&i2c0 {
742 pinctrl-0 = <&i2c0_pins>;
1e26fcf3 743 pinctrl-names = "i2c-exio0";
880cb570
WS
744};
745
cb9a2b12 746&iic0 {
535118ca 747 pinctrl-0 = <&iic0_pins>;
1e26fcf3 748 pinctrl-names = "i2c-exio0";
e489c2a9
BD
749};
750
b2f15ca6
SH
751&i2c1 {
752 pinctrl-0 = <&i2c1_pins>;
753 pinctrl-names = "i2c-exio1";
754};
755
cb9a2b12 756&iic1 {
cb9a2b12 757 pinctrl-0 = <&iic1_pins>;
b2f15ca6 758 pinctrl-names = "i2c-exio1";
e489c2a9
BD
759};
760
4e65e1b6
WS
761&i2c2 {
762 pinctrl-0 = <&i2c2_pins>;
763 pinctrl-names = "i2c-hdmi";
d594c977 764
177d8bea 765 clock-frequency = <100000>;
4e65e1b6 766};
177d8bea 767
4e65e1b6
WS
768&iic2 {
769 pinctrl-0 = <&iic2_pins>;
770 pinctrl-names = "i2c-hdmi";
56548d0c 771
4e65e1b6 772 clock-frequency = <100000>;
e489c2a9
BD
773};
774
5179ffd0 775&iic3 {
aca4ec44 776 pinctrl-names = "default";
5179ffd0 777 pinctrl-0 = <&iic3_pins>;
aca4ec44
SH
778 status = "okay";
779
46dd8a80
GU
780 pmic@58 {
781 compatible = "dlg,da9063";
782 reg = <0x58>;
783 interrupt-parent = <&irqc0>;
784 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
785 interrupt-controller;
786
787 rtc {
788 compatible = "dlg,da9063-rtc";
789 };
790
791 wdt {
792 compatible = "dlg,da9063-watchdog";
793 };
794 };
795
aca4ec44 796 vdd_dvfs: regulator@68 {
bd597f47 797 compatible = "dlg,da9210";
aca4ec44 798 reg = <0x68>;
ceb77479
GU
799 interrupt-parent = <&irqc0>;
800 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
aca4ec44
SH
801
802 regulator-min-microvolt = <1000000>;
803 regulator-max-microvolt = <1000000>;
804 regulator-boot-on;
805 regulator-always-on;
806 };
e489c2a9 807};
d8584660
BD
808
809&pci0 {
810 status = "okay";
811 pinctrl-0 = <&usb0_pins>;
812 pinctrl-names = "default";
813};
814
815&pci1 {
816 status = "okay";
817 pinctrl-0 = <&usb1_pins>;
818 pinctrl-names = "default";
819};
820
37f7c1b0
YS
821&xhci {
822 status = "okay";
823 pinctrl-0 = <&usb2_pins>;
824 pinctrl-names = "default";
825};
826
d8584660
BD
827&pci2 {
828 status = "okay";
829 pinctrl-0 = <&usb2_pins>;
830 pinctrl-names = "default";
831};
d594c977 832
e03074a7
YS
833&hsusb {
834 status = "okay";
835 pinctrl-0 = <&hsusb_pins>;
836 pinctrl-names = "default";
837 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
838};
839
6742cafb
SS
840&usbphy {
841 status = "okay";
842};
843
56548d0c
WT
844/* HDMI video input */
845&vin0 {
846 pinctrl-0 = <&vin0_pins>;
847 pinctrl-names = "default";
848
849 status = "okay";
850
851 port {
852 vin0ep2: endpoint {
853 remote-endpoint = <&adv7612_out>;
854 bus-width = <24>;
855 hsync-active = <0>;
856 vsync-active = <0>;
857 pclk-sample = <1>;
858 data-active = <1>;
859 };
860 };
861};
862
d594c977
BD
863/* composite video input */
864&vin1 {
865 pinctrl-0 = <&vin1_pins>;
866 pinctrl-names = "default";
867
fd7a8cbf 868 status = "okay";
d594c977
BD
869
870 port {
871 #address-cells = <1>;
872 #size-cells = <0>;
873
874 vin1ep0: endpoint {
875 remote-endpoint = <&adv7180>;
876 bus-width = <8>;
877 };
878 };
879};
8ea7a44a
KM
880
881&rcar_sound {
882 pinctrl-0 = <&sound_pins &sound_clk_pins>;
883 pinctrl-names = "default";
884
ad63241c 885 /* Single DAI */
8ea7a44a
KM
886 #sound-dai-cells = <0>;
887
888 status = "okay";
889
890 rcar_sound,dai {
891 dai0 {
e110c541
KM
892 playback = <&ssi0 &src2 &dvc0>;
893 capture = <&ssi1 &src3 &dvc1>;
8ea7a44a
KM
894 };
895 };
896};
897
8ea7a44a 898&ssi1 {
8ea7a44a
KM
899 shared-pin;
900};