ARM: dts: lager: rename and reindex i2cexio
[linux-2.6-block.git] / arch / arm / boot / dts / r8a7790-lager.dts
CommitLineData
3cc828fd
MD
1/*
2 * Device Tree Source for the Lager board
3 *
da4ea951
SS
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
880cb570 6 * Copyright (C) 2015-2016 Renesas Electronics Corporation
3cc828fd
MD
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
8ea7a44a
KM
13/*
14 * SSI-AK4643
15 *
16 * SW1: 1: AK4643
17 * 2: CN22
18 * 3: ADV7511
19 *
20 * This command is required when Playback/Capture
21 *
22 * amixer set "LINEOUT Mixer DACL" on
e110c541
KM
23 * amixer set "DVC Out" 100%
24 * amixer set "DVC In" 100%
25 *
26 * You can use Mute
27 *
28 * amixer set "DVC Out Mute" on
29 * amixer set "DVC In Mute" on
bd2e4a62
KM
30 *
31 * You can use Volume Ramp
32 *
33 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
34 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
35 * amixer set "DVC Out Ramp" on
36 * aplay xxx.wav &
37 * amixer set "DVC Out" 80% // Volume Down
38 * amixer set "DVC Out" 100% // Volume Up
8ea7a44a
KM
39 */
40
3cc828fd 41/dts-v1/;
31c46cbf 42#include "r8a7790.dtsi"
39fa511b 43#include <dt-bindings/gpio/gpio.h>
f7dcd382 44#include <dt-bindings/input/input.h>
3cc828fd
MD
45
46/ {
47 model = "Lager";
48 compatible = "renesas,lager", "renesas,r8a7790";
49
4e9c4877 50 aliases {
430d7bad 51 serial0 = &scif0;
78c11ec2 52 serial1 = &scifa1;
1e26fcf3 53 i2c10 = &i2cexio0;
4e9c4877
LP
54 };
55
3cc828fd 56 chosen {
569dd56c 57 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
57d19f81 58 stdout-path = "serial0:115200n8";
3cc828fd
MD
59 };
60
61 memory@40000000 {
62 device_type = "memory";
7b16c61a 63 reg = <0 0x40000000 0 0x40000000>;
3cc828fd
MD
64 };
65
126f998e 66 memory@140000000 {
62bc32a2 67 device_type = "memory";
7b16c61a 68 reg = <1 0x40000000 0 0xc0000000>;
62bc32a2
MD
69 };
70
3cc828fd
MD
71 lbsc {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 };
39fa511b 75
54caf681 76 keyboard {
f7dcd382
MD
77 compatible = "gpio-keys";
78
affe802c 79 one {
f7dcd382
MD
80 linux,code = <KEY_1>;
81 label = "SW2-1";
0cc16889 82 wakeup-source;
f7dcd382
MD
83 debounce-interval = <20>;
84 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
85 };
affe802c 86 two {
f7dcd382
MD
87 linux,code = <KEY_2>;
88 label = "SW2-2";
0cc16889 89 wakeup-source;
f7dcd382
MD
90 debounce-interval = <20>;
91 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
92 };
affe802c 93 three {
f7dcd382
MD
94 linux,code = <KEY_3>;
95 label = "SW2-3";
0cc16889 96 wakeup-source;
f7dcd382
MD
97 debounce-interval = <20>;
98 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
99 };
affe802c 100 four {
f7dcd382
MD
101 linux,code = <KEY_4>;
102 label = "SW2-4";
0cc16889 103 wakeup-source;
f7dcd382
MD
104 debounce-interval = <20>;
105 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
106 };
107 };
108
39fa511b
LP
109 leds {
110 compatible = "gpio-leds";
111 led6 {
112 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
113 };
114 led7 {
115 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
116 };
117 led8 {
118 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
119 };
120 };
121
affe802c 122 fixedregulator3v3: regulator-3v3 {
39fa511b
LP
123 compatible = "regulator-fixed";
124 regulator-name = "fixed-3.3V";
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 regulator-boot-on;
128 regulator-always-on;
129 };
c6119944 130
affe802c 131 vcc_sdhi0: regulator-vcc-sdhi0 {
c6119944
KM
132 compatible = "regulator-fixed";
133
134 regulator-name = "SDHI0 Vcc";
135 regulator-min-microvolt = <3300000>;
136 regulator-max-microvolt = <3300000>;
137
138 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
139 enable-active-high;
140 };
141
affe802c 142 vccq_sdhi0: regulator-vccq-sdhi0 {
c6119944
KM
143 compatible = "regulator-gpio";
144
145 regulator-name = "SDHI0 VccQ";
146 regulator-min-microvolt = <1800000>;
147 regulator-max-microvolt = <3300000>;
148
149 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
150 gpios-states = <1>;
151 states = <3300000 1
152 1800000 0>;
153 };
154
affe802c 155 vcc_sdhi2: regulator-vcc-sdhi2 {
c6119944
KM
156 compatible = "regulator-fixed";
157
158 regulator-name = "SDHI2 Vcc";
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
161
162 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
163 enable-active-high;
164 };
165
affe802c 166 vccq_sdhi2: regulator-vccq-sdhi2 {
c6119944
KM
167 compatible = "regulator-gpio";
168
169 regulator-name = "SDHI2 VccQ";
170 regulator-min-microvolt = <1800000>;
171 regulator-max-microvolt = <3300000>;
172
173 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
174 gpios-states = <1>;
175 states = <3300000 1
176 1800000 0>;
177 };
3edd18ff 178
a5bad2c7 179 audio_clock: audio_clock {
6bc651af
KM
180 compatible = "fixed-clock";
181 #clock-cells = <0>;
182 clock-frequency = <11289600>;
6bc651af
KM
183 };
184
30be0ba5 185 rsnd_ak4643: sound {
8ea7a44a
KM
186 compatible = "simple-audio-card";
187
188 simple-audio-card,format = "left_j";
189 simple-audio-card,bitclock-master = <&sndcodec>;
190 simple-audio-card,frame-master = <&sndcodec>;
191
192 sndcpu: simple-audio-card,cpu {
193 sound-dai = <&rcar_sound>;
194 };
195
196 sndcodec: simple-audio-card,codec {
197 sound-dai = <&ak4643>;
6bc651af 198 clocks = <&audio_clock>;
8ea7a44a
KM
199 };
200 };
201
3edd18ff
LP
202 vga-encoder {
203 compatible = "adi,adv7123";
204
205 ports {
206 #address-cells = <1>;
207 #size-cells = <0>;
208
209 port@0 {
210 reg = <0>;
211 adv7123_in: endpoint {
212 remote-endpoint = <&du_out_rgb>;
213 };
214 };
215 port@1 {
216 reg = <1>;
217 adv7123_out: endpoint {
218 remote-endpoint = <&vga_in>;
219 };
220 };
221 };
222 };
223
224 vga {
225 compatible = "vga-connector";
226
227 port {
228 vga_in: endpoint {
229 remote-endpoint = <&adv7123_out>;
230 };
231 };
232 };
fd25cdd1 233
56548d0c
WT
234 hdmi-in {
235 compatible = "hdmi-connector";
236 type = "a";
237
238 port {
239 hdmi_con_in: endpoint {
240 remote-endpoint = <&adv7612_in>;
241 };
242 };
243 };
244
fd25cdd1
LP
245 hdmi-out {
246 compatible = "hdmi-connector";
247 type = "a";
248
249 port {
56548d0c 250 hdmi_con_out: endpoint {
fd25cdd1
LP
251 remote-endpoint = <&adv7511_out>;
252 };
253 };
254 };
26c00ab4
LP
255
256 x2_clk: x2-clock {
257 compatible = "fixed-clock";
258 #clock-cells = <0>;
259 clock-frequency = <148500000>;
260 };
261
262 x13_clk: x13-clock {
263 compatible = "fixed-clock";
264 #clock-cells = <0>;
265 clock-frequency = <148500000>;
266 };
880cb570
WS
267
268 /*
269 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
270 * We use the I2C demuxer, so the desired IP core can be selected at runtime
271 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
272 * Note: For testing the I2C slave feature, it is convenient to connect this
273 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
274 * instantiate the slave device at runtime according to the documentation.
275 * You can then communicate with the slave via IIC3.
1e26fcf3
SH
276 *
277 * IIC0/I2C0 does not appear to support fallback to GPIO.
880cb570 278 */
1e26fcf3 279 i2cexio0: i2c-10 {
880cb570
WS
280 compatible = "i2c-demux-pinctrl";
281 i2c-parent = <&iic0>, <&i2c0>;
1e26fcf3 282 i2c-bus-name = "i2c-exio0";
880cb570
WS
283 #address-cells = <1>;
284 #size-cells = <0>;
285 };
3edd18ff
LP
286};
287
288&du {
289 pinctrl-0 = <&du_pins>;
290 pinctrl-names = "default";
291 status = "okay";
292
26c00ab4
LP
293 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
294 <&mstp7_clks R8A7790_CLK_DU1>,
295 <&mstp7_clks R8A7790_CLK_DU2>,
296 <&mstp7_clks R8A7790_CLK_LVDS0>,
297 <&mstp7_clks R8A7790_CLK_LVDS1>,
298 <&x13_clk>, <&x2_clk>;
299 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
300 "dclkin.0", "dclkin.1";
301
3edd18ff
LP
302 ports {
303 port@0 {
304 endpoint {
305 remote-endpoint = <&adv7123_in>;
306 };
307 };
fd25cdd1
LP
308 port@1 {
309 endpoint {
310 remote-endpoint = <&adv7511_in>;
311 };
312 };
3edd18ff
LP
313 port@2 {
314 lvds_connector: endpoint {
315 };
316 };
317 };
39fa511b
LP
318};
319
62e43056
LP
320&extal_clk {
321 clock-frequency = <20000000>;
322};
323
39fa511b 324&pfc {
1781460c
GU
325 pinctrl-0 = <&scif_clk_pins>;
326 pinctrl-names = "default";
327
3024f507 328 du_pins: du {
2ffc224f
SH
329 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
330 function = "du";
3024f507
LP
331 };
332
ca348298 333 scif0_pins: scif0 {
2ffc224f
SH
334 groups = "scif0_data";
335 function = "scif0";
39fa511b
LP
336 };
337
1781460c 338 scif_clk_pins: scif_clk {
2ffc224f
SH
339 groups = "scif_clk";
340 function = "scif_clk";
1781460c
GU
341 };
342
da4ea951 343 ether_pins: ether {
2ffc224f
SH
344 groups = "eth_link", "eth_mdio", "eth_rmii";
345 function = "eth";
da4ea951
SS
346 };
347
348 phy1_pins: phy1 {
2ffc224f
SH
349 groups = "intc_irq0";
350 function = "intc";
da4ea951
SS
351 };
352
ca348298 353 scifa1_pins: scifa1 {
2ffc224f
SH
354 groups = "scifa1_data";
355 function = "scifa1";
39fa511b
LP
356 };
357
c6119944 358 sdhi0_pins: sd0 {
2ffc224f
SH
359 groups = "sdhi0_data4", "sdhi0_ctrl";
360 function = "sdhi0";
1ca79699
WS
361 power-source = <3300>;
362 };
363
364 sdhi0_pins_uhs: sd0_uhs {
365 groups = "sdhi0_data4", "sdhi0_ctrl";
366 function = "sdhi0";
367 power-source = <1800>;
c6119944
KM
368 };
369
370 sdhi2_pins: sd2 {
2ffc224f
SH
371 groups = "sdhi2_data4", "sdhi2_ctrl";
372 function = "sdhi2";
1ca79699
WS
373 power-source = <3300>;
374 };
375
376 sdhi2_pins_uhs: sd2_uhs {
377 groups = "sdhi2_data4", "sdhi2_ctrl";
378 function = "sdhi2";
379 power-source = <1800>;
c6119944
KM
380 };
381
39fa511b 382 mmc1_pins: mmc1 {
2ffc224f
SH
383 groups = "mmc1_data8", "mmc1_ctrl";
384 function = "mmc1";
39fa511b 385 };
9fe7c4f8 386
85c5e4c4 387 qspi_pins: qspi {
2ffc224f
SH
388 groups = "qspi_ctrl", "qspi_data4";
389 function = "qspi";
9fe7c4f8 390 };
b0403b91 391
85c5e4c4 392 msiof1_pins: msiof1 {
2ffc224f 393 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
b0403b91 394 "msiof1_tx";
2ffc224f 395 function = "msiof1";
b0403b91 396 };
05f72e03 397
880cb570 398 i2c0_pins: i2c0 {
2ffc224f
SH
399 groups = "i2c0";
400 function = "i2c0";
880cb570
WS
401 };
402
535118ca 403 iic0_pins: iic0 {
2ffc224f
SH
404 groups = "iic0";
405 function = "iic0";
535118ca
WS
406 };
407
cb9a2b12 408 iic1_pins: iic1 {
2ffc224f
SH
409 groups = "iic1";
410 function = "iic1";
d90bf60c
SH
411 };
412
cb9a2b12 413 iic2_pins: iic2 {
2ffc224f
SH
414 groups = "iic2";
415 function = "iic2";
d90bf60c
SH
416 };
417
5179ffd0 418 iic3_pins: iic3 {
2ffc224f
SH
419 groups = "iic3";
420 function = "iic3";
05f72e03 421 };
d8584660 422
e03074a7 423 hsusb_pins: hsusb {
2ffc224f
SH
424 groups = "usb0_ovc_vbus";
425 function = "usb0";
e03074a7
YS
426 };
427
d8584660 428 usb0_pins: usb0 {
2ffc224f
SH
429 groups = "usb0";
430 function = "usb0";
d8584660
BD
431 };
432
433 usb1_pins: usb1 {
2ffc224f
SH
434 groups = "usb1";
435 function = "usb1";
d8584660
BD
436 };
437
438 usb2_pins: usb2 {
2ffc224f
SH
439 groups = "usb2";
440 function = "usb2";
d8584660 441 };
d594c977 442
56548d0c
WT
443 vin0_pins: vin0 {
444 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
445 function = "vin0";
446 };
447
da84fd93 448 vin1_pins: vin1 {
2ffc224f
SH
449 groups = "vin1_data8", "vin1_clk";
450 function = "vin1";
d594c977 451 };
8ea7a44a
KM
452
453 sound_pins: sound {
2ffc224f
SH
454 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
455 function = "ssi";
8ea7a44a
KM
456 };
457
458 sound_clk_pins: sound_clk {
2ffc224f
SH
459 groups = "audio_clk_a";
460 function = "audio_clk";
8ea7a44a 461 };
39fa511b
LP
462};
463
da4ea951
SS
464&ether {
465 pinctrl-0 = <&ether_pins &phy1_pins>;
466 pinctrl-names = "default";
467
468 phy-handle = <&phy1>;
469 renesas,ether-link-active-low;
fd7a8cbf 470 status = "okay";
da4ea951
SS
471
472 phy1: ethernet-phy@1 {
473 reg = <1>;
474 interrupt-parent = <&irqc0>;
475 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 476 micrel,led-mode = <1>;
da4ea951
SS
477 };
478};
479
247fd5ec 480&cmt0 {
fd7a8cbf 481 status = "okay";
247fd5ec
LP
482};
483
39fa511b
LP
484&mmcif1 {
485 pinctrl-0 = <&mmc1_pins>;
486 pinctrl-names = "default";
487
488 vmmc-supply = <&fixedregulator3v3>;
489 bus-width = <8>;
490 non-removable;
491 status = "okay";
3cc828fd 492};
c6181b9f
VB
493
494&sata1 {
495 status = "okay";
496};
9fe7c4f8 497
fad6d45c 498&qspi {
9fe7c4f8
GU
499 pinctrl-0 = <&qspi_pins>;
500 pinctrl-names = "default";
501
502 status = "okay";
503
504 flash: flash@0 {
755185b2 505 compatible = "spansion,s25fl512s", "jedec,spi-nor";
9fe7c4f8
GU
506 reg = <0>;
507 spi-max-frequency = <30000000>;
9909d2cb
GU
508 spi-tx-bus-width = <4>;
509 spi-rx-bus-width = <4>;
cbf41168
HN
510 spi-cpha;
511 spi-cpol;
9fe7c4f8
GU
512 m25p,fast-read;
513
f58bac70 514 partitions {
b88ddbdd 515 compatible = "fixed-partitions";
f58bac70
GU
516 #address-cells = <1>;
517 #size-cells = <1>;
518
519 partition@0 {
520 label = "loader";
521 reg = <0x00000000 0x00040000>;
522 read-only;
523 };
524 partition@40000 {
525 label = "user";
526 reg = <0x00040000 0x00400000>;
527 read-only;
528 };
529 partition@440000 {
530 label = "flash";
531 reg = <0x00440000 0x03bc0000>;
532 };
9fe7c4f8
GU
533 };
534 };
535};
c6119944 536
430d7bad
UH
537&scif0 {
538 pinctrl-0 = <&scif0_pins>;
4e9c4877
LP
539 pinctrl-names = "default";
540
541 status = "okay";
542};
543
7c055894
WS
544&scifa1 {
545 pinctrl-0 = <&scifa1_pins>;
4e9c4877
LP
546 pinctrl-names = "default";
547
548 status = "okay";
549};
550
1781460c
GU
551&scif_clk {
552 clock-frequency = <14745600>;
553 status = "okay";
554};
555
b0403b91
GU
556&msiof1 {
557 pinctrl-0 = <&msiof1_pins>;
558 pinctrl-names = "default";
559
560 status = "okay";
561
562 pmic: pmic@0 {
563 compatible = "renesas,r2a11302ft";
564 reg = <0>;
565 spi-max-frequency = <6000000>;
566 spi-cpol;
567 spi-cpha;
568 };
b0403b91
GU
569};
570
c6119944
KM
571&sdhi0 {
572 pinctrl-0 = <&sdhi0_pins>;
1ca79699
WS
573 pinctrl-1 = <&sdhi0_pins_uhs>;
574 pinctrl-names = "default", "state_uhs";
c6119944
KM
575
576 vmmc-supply = <&vcc_sdhi0>;
577 vqmmc-supply = <&vccq_sdhi0>;
578 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
1ca79699 579 sd-uhs-sdr50;
c6119944
KM
580 status = "okay";
581};
582
583&sdhi2 {
584 pinctrl-0 = <&sdhi2_pins>;
1ca79699
WS
585 pinctrl-1 = <&sdhi2_pins_uhs>;
586 pinctrl-names = "default", "state_uhs";
c6119944
KM
587
588 vmmc-supply = <&vcc_sdhi2>;
589 vqmmc-supply = <&vccq_sdhi2>;
590 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
1ca79699 591 sd-uhs-sdr50;
c6119944
KM
592 status = "okay";
593};
05f72e03 594
b989e138
BC
595&cpu0 {
596 cpu0-supply = <&vdd_dvfs>;
597};
e489c2a9 598
880cb570
WS
599&i2c0 {
600 pinctrl-0 = <&i2c0_pins>;
1e26fcf3 601 pinctrl-names = "i2c-exio0";
880cb570
WS
602};
603
cb9a2b12 604&iic0 {
535118ca 605 pinctrl-0 = <&iic0_pins>;
1e26fcf3 606 pinctrl-names = "i2c-exio0";
e489c2a9
BD
607};
608
cb9a2b12 609&iic1 {
fd7a8cbf 610 status = "okay";
cb9a2b12 611 pinctrl-0 = <&iic1_pins>;
e1a2c4eb 612 pinctrl-names = "default";
e489c2a9
BD
613};
614
cb9a2b12 615&iic2 {
fd7a8cbf 616 status = "okay";
cb9a2b12 617 pinctrl-0 = <&iic2_pins>;
e1a2c4eb 618 pinctrl-names = "default";
d594c977 619
177d8bea
KM
620 clock-frequency = <100000>;
621
d22b1687 622 ak4643: codec@12 {
8ea7a44a
KM
623 compatible = "asahi-kasei,ak4643";
624 #sound-dai-cells = <0>;
625 reg = <0x12>;
626 };
627
d594c977
BD
628 composite-in@20 {
629 compatible = "adi,adv7180";
630 reg = <0x20>;
631 remote = <&vin1>;
632
633 port {
634 adv7180: endpoint {
635 bus-width = <8>;
636 remote-endpoint = <&vin1ep0>;
637 };
638 };
639 };
fd25cdd1
LP
640
641 hdmi@39 {
642 compatible = "adi,adv7511w";
643 reg = <0x39>;
644 interrupt-parent = <&gpio1>;
850346ec 645 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
fd25cdd1
LP
646
647 adi,input-depth = <8>;
648 adi,input-colorspace = "rgb";
649 adi,input-clock = "1x";
650 adi,input-style = <1>;
651 adi,input-justification = "evenly";
652
653 ports {
654 #address-cells = <1>;
655 #size-cells = <0>;
656
657 port@0 {
658 reg = <0>;
659 adv7511_in: endpoint {
660 remote-endpoint = <&du_out_lvds0>;
661 };
662 };
663
664 port@1 {
665 reg = <1>;
666 adv7511_out: endpoint {
56548d0c
WT
667 remote-endpoint = <&hdmi_con_out>;
668 };
669 };
670 };
671 };
672
673 hdmi-in@4c {
674 compatible = "adi,adv7612";
675 reg = <0x4c>;
676 interrupt-parent = <&gpio1>;
677 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
678 default-input = <0>;
679
680 ports {
681 #address-cells = <1>;
682 #size-cells = <0>;
683
684 port@0 {
685 reg = <0>;
686 adv7612_in: endpoint {
687 remote-endpoint = <&hdmi_con_in>;
688 };
689 };
690
691 port@2 {
692 reg = <2>;
693 adv7612_out: endpoint {
694 remote-endpoint = <&vin0ep2>;
fd25cdd1
LP
695 };
696 };
697 };
698 };
e489c2a9
BD
699};
700
5179ffd0 701&iic3 {
aca4ec44 702 pinctrl-names = "default";
5179ffd0 703 pinctrl-0 = <&iic3_pins>;
aca4ec44
SH
704 status = "okay";
705
46dd8a80
GU
706 pmic@58 {
707 compatible = "dlg,da9063";
708 reg = <0x58>;
709 interrupt-parent = <&irqc0>;
710 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
711 interrupt-controller;
712
713 rtc {
714 compatible = "dlg,da9063-rtc";
715 };
716
717 wdt {
718 compatible = "dlg,da9063-watchdog";
719 };
720 };
721
aca4ec44 722 vdd_dvfs: regulator@68 {
bd597f47 723 compatible = "dlg,da9210";
aca4ec44 724 reg = <0x68>;
ceb77479
GU
725 interrupt-parent = <&irqc0>;
726 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
aca4ec44
SH
727
728 regulator-min-microvolt = <1000000>;
729 regulator-max-microvolt = <1000000>;
730 regulator-boot-on;
731 regulator-always-on;
732 };
e489c2a9 733};
d8584660
BD
734
735&pci0 {
736 status = "okay";
737 pinctrl-0 = <&usb0_pins>;
738 pinctrl-names = "default";
739};
740
741&pci1 {
742 status = "okay";
743 pinctrl-0 = <&usb1_pins>;
744 pinctrl-names = "default";
745};
746
37f7c1b0
YS
747&xhci {
748 status = "okay";
749 pinctrl-0 = <&usb2_pins>;
750 pinctrl-names = "default";
751};
752
d8584660
BD
753&pci2 {
754 status = "okay";
755 pinctrl-0 = <&usb2_pins>;
756 pinctrl-names = "default";
757};
d594c977 758
e03074a7
YS
759&hsusb {
760 status = "okay";
761 pinctrl-0 = <&hsusb_pins>;
762 pinctrl-names = "default";
763 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
764};
765
6742cafb
SS
766&usbphy {
767 status = "okay";
768};
769
56548d0c
WT
770/* HDMI video input */
771&vin0 {
772 pinctrl-0 = <&vin0_pins>;
773 pinctrl-names = "default";
774
775 status = "okay";
776
777 port {
778 vin0ep2: endpoint {
779 remote-endpoint = <&adv7612_out>;
780 bus-width = <24>;
781 hsync-active = <0>;
782 vsync-active = <0>;
783 pclk-sample = <1>;
784 data-active = <1>;
785 };
786 };
787};
788
d594c977
BD
789/* composite video input */
790&vin1 {
791 pinctrl-0 = <&vin1_pins>;
792 pinctrl-names = "default";
793
fd7a8cbf 794 status = "okay";
d594c977
BD
795
796 port {
797 #address-cells = <1>;
798 #size-cells = <0>;
799
800 vin1ep0: endpoint {
801 remote-endpoint = <&adv7180>;
802 bus-width = <8>;
803 };
804 };
805};
8ea7a44a
KM
806
807&rcar_sound {
808 pinctrl-0 = <&sound_pins &sound_clk_pins>;
809 pinctrl-names = "default";
810
ad63241c 811 /* Single DAI */
8ea7a44a
KM
812 #sound-dai-cells = <0>;
813
814 status = "okay";
815
816 rcar_sound,dai {
817 dai0 {
e110c541
KM
818 playback = <&ssi0 &src2 &dvc0>;
819 capture = <&ssi1 &src3 &dvc1>;
8ea7a44a
KM
820 };
821 };
822};
823
8ea7a44a 824&ssi1 {
8ea7a44a
KM
825 shared-pin;
826};