ARM: dts: sun5i: Add backlight GPIO for reference design tablet
[linux-2.6-block.git] / arch / arm / boot / dts / r8a7790-lager.dts
CommitLineData
cdbfaf64 1// SPDX-License-Identifier: GPL-2.0
3cc828fd
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2/*
3 * Device Tree Source for the Lager board
4 *
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5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded, Inc.
880cb570 7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
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8 */
9
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10/*
11 * SSI-AK4643
12 *
13 * SW1: 1: AK4643
14 * 2: CN22
15 * 3: ADV7511
16 *
17 * This command is required when Playback/Capture
18 *
19 * amixer set "LINEOUT Mixer DACL" on
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20 * amixer set "DVC Out" 100%
21 * amixer set "DVC In" 100%
22 *
23 * You can use Mute
24 *
25 * amixer set "DVC Out Mute" on
26 * amixer set "DVC In Mute" on
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27 *
28 * You can use Volume Ramp
29 *
30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
32 * amixer set "DVC Out Ramp" on
33 * aplay xxx.wav &
34 * amixer set "DVC Out" 80% // Volume Down
35 * amixer set "DVC Out" 100% // Volume Up
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KM
36 */
37
3cc828fd 38/dts-v1/;
31c46cbf 39#include "r8a7790.dtsi"
39fa511b 40#include <dt-bindings/gpio/gpio.h>
f7dcd382 41#include <dt-bindings/input/input.h>
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42
43/ {
44 model = "Lager";
45 compatible = "renesas,lager", "renesas,r8a7790";
46
4e9c4877 47 aliases {
430d7bad 48 serial0 = &scif0;
78c11ec2 49 serial1 = &scifa1;
b2f15ca6 50 i2c8 = &gpioi2c1;
4e65e1b6 51 i2c9 = &gpioi2c2;
1e26fcf3 52 i2c10 = &i2cexio0;
b2f15ca6 53 i2c11 = &i2cexio1;
4e65e1b6 54 i2c12 = &i2chdmi;
e6081b21 55 i2c13 = &i2cpwr;
4e9c4877
LP
56 };
57
3cc828fd 58 chosen {
569dd56c 59 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
57d19f81 60 stdout-path = "serial0:115200n8";
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MD
61 };
62
63 memory@40000000 {
64 device_type = "memory";
7b16c61a 65 reg = <0 0x40000000 0 0x40000000>;
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66 };
67
126f998e 68 memory@140000000 {
62bc32a2 69 device_type = "memory";
7b16c61a 70 reg = <1 0x40000000 0 0xc0000000>;
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MD
71 };
72
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MD
73 lbsc {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 };
39fa511b 77
54caf681 78 keyboard {
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79 compatible = "gpio-keys";
80
affe802c 81 one {
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82 linux,code = <KEY_1>;
83 label = "SW2-1";
0cc16889 84 wakeup-source;
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MD
85 debounce-interval = <20>;
86 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
87 };
affe802c 88 two {
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MD
89 linux,code = <KEY_2>;
90 label = "SW2-2";
0cc16889 91 wakeup-source;
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MD
92 debounce-interval = <20>;
93 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
94 };
affe802c 95 three {
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MD
96 linux,code = <KEY_3>;
97 label = "SW2-3";
0cc16889 98 wakeup-source;
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99 debounce-interval = <20>;
100 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
101 };
affe802c 102 four {
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103 linux,code = <KEY_4>;
104 label = "SW2-4";
0cc16889 105 wakeup-source;
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MD
106 debounce-interval = <20>;
107 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
108 };
109 };
110
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111 leds {
112 compatible = "gpio-leds";
113 led6 {
114 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
115 };
116 led7 {
117 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
118 };
119 led8 {
120 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
121 };
122 };
123
affe802c 124 fixedregulator3v3: regulator-3v3 {
39fa511b
LP
125 compatible = "regulator-fixed";
126 regulator-name = "fixed-3.3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-boot-on;
130 regulator-always-on;
131 };
c6119944 132
affe802c 133 vcc_sdhi0: regulator-vcc-sdhi0 {
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134 compatible = "regulator-fixed";
135
136 regulator-name = "SDHI0 Vcc";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
139
140 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
141 enable-active-high;
142 };
143
affe802c 144 vccq_sdhi0: regulator-vccq-sdhi0 {
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145 compatible = "regulator-gpio";
146
147 regulator-name = "SDHI0 VccQ";
148 regulator-min-microvolt = <1800000>;
149 regulator-max-microvolt = <3300000>;
150
151 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
152 gpios-states = <1>;
153 states = <3300000 1
154 1800000 0>;
155 };
156
affe802c 157 vcc_sdhi2: regulator-vcc-sdhi2 {
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158 compatible = "regulator-fixed";
159
160 regulator-name = "SDHI2 Vcc";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163
164 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
165 enable-active-high;
166 };
167
affe802c 168 vccq_sdhi2: regulator-vccq-sdhi2 {
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169 compatible = "regulator-gpio";
170
171 regulator-name = "SDHI2 VccQ";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <3300000>;
174
175 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
176 gpios-states = <1>;
177 states = <3300000 1
178 1800000 0>;
179 };
3edd18ff 180
a5bad2c7 181 audio_clock: audio_clock {
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182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <11289600>;
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185 };
186
30be0ba5 187 rsnd_ak4643: sound {
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188 compatible = "simple-audio-card";
189
190 simple-audio-card,format = "left_j";
191 simple-audio-card,bitclock-master = <&sndcodec>;
192 simple-audio-card,frame-master = <&sndcodec>;
193
194 sndcpu: simple-audio-card,cpu {
195 sound-dai = <&rcar_sound>;
196 };
197
198 sndcodec: simple-audio-card,codec {
199 sound-dai = <&ak4643>;
6bc651af 200 clocks = <&audio_clock>;
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201 };
202 };
203
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204 vga-encoder {
205 compatible = "adi,adv7123";
206
207 ports {
208 #address-cells = <1>;
209 #size-cells = <0>;
210
211 port@0 {
212 reg = <0>;
213 adv7123_in: endpoint {
214 remote-endpoint = <&du_out_rgb>;
215 };
216 };
217 port@1 {
218 reg = <1>;
219 adv7123_out: endpoint {
220 remote-endpoint = <&vga_in>;
221 };
222 };
223 };
224 };
225
226 vga {
227 compatible = "vga-connector";
228
229 port {
230 vga_in: endpoint {
231 remote-endpoint = <&adv7123_out>;
232 };
233 };
234 };
fd25cdd1 235
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236 hdmi-in {
237 compatible = "hdmi-connector";
238 type = "a";
239
240 port {
241 hdmi_con_in: endpoint {
242 remote-endpoint = <&adv7612_in>;
243 };
244 };
245 };
246
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247 cec_clock: cec-clock {
248 compatible = "fixed-clock";
249 #clock-cells = <0>;
250 clock-frequency = <12000000>;
251 };
252
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253 hdmi-out {
254 compatible = "hdmi-connector";
255 type = "a";
256
257 port {
56548d0c 258 hdmi_con_out: endpoint {
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259 remote-endpoint = <&adv7511_out>;
260 };
261 };
262 };
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263
264 x2_clk: x2-clock {
265 compatible = "fixed-clock";
266 #clock-cells = <0>;
267 clock-frequency = <148500000>;
268 };
269
270 x13_clk: x13-clock {
271 compatible = "fixed-clock";
272 #clock-cells = <0>;
273 clock-frequency = <148500000>;
274 };
880cb570 275
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276 gpioi2c1: i2c-8 {
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "i2c-gpio";
280 status = "disabled";
e99185b2 281 scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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282 sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
283 i2c-gpio,delay-us = <5>;
284 };
285
286 gpioi2c2: i2c-9 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "i2c-gpio";
290 status = "disabled";
291 scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
292 sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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293 i2c-gpio,delay-us = <5>;
294 };
295
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296 /*
297 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
298 * We use the I2C demuxer, so the desired IP core can be selected at runtime
299 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
300 * Note: For testing the I2C slave feature, it is convenient to connect this
301 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
302 * instantiate the slave device at runtime according to the documentation.
303 * You can then communicate with the slave via IIC3.
1e26fcf3
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304 *
305 * IIC0/I2C0 does not appear to support fallback to GPIO.
880cb570 306 */
1e26fcf3 307 i2cexio0: i2c-10 {
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308 compatible = "i2c-demux-pinctrl";
309 i2c-parent = <&iic0>, <&i2c0>;
1e26fcf3 310 i2c-bus-name = "i2c-exio0";
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311 #address-cells = <1>;
312 #size-cells = <0>;
313 };
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314
315 /*
316 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
317 * This is similar to the arangement described for i2cexio0 (above)
318 * with a fallback to GPIO also provided.
319 */
320 i2cexio1: i2c-11 {
321 compatible = "i2c-demux-pinctrl";
322 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
323 i2c-bus-name = "i2c-exio1";
324 #address-cells = <1>;
325 #size-cells = <0>;
326 };
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WS
327
328 /*
329 * IIC2 and I2C2 may be switched using pinmux.
330 * A fallback to GPIO is also provided.
331 */
332 i2chdmi: i2c-12 {
333 compatible = "i2c-demux-pinctrl";
334 i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
335 i2c-bus-name = "i2c-hdmi";
336 #address-cells = <1>;
337 #size-cells = <0>;
338
339 ak4643: codec@12 {
340 compatible = "asahi-kasei,ak4643";
341 #sound-dai-cells = <0>;
342 reg = <0x12>;
343 };
344
345 composite-in@20 {
346 compatible = "adi,adv7180";
347 reg = <0x20>;
348 remote = <&vin1>;
349
350 port {
351 adv7180: endpoint {
352 bus-width = <8>;
353 remote-endpoint = <&vin1ep0>;
354 };
355 };
356 };
357
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WS
358 hdmi@39 {
359 compatible = "adi,adv7511w";
360 reg = <0x39>;
361 interrupt-parent = <&gpio1>;
362 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
363 clocks = <&cec_clock>;
364 clock-names = "cec";
365
366 adi,input-depth = <8>;
367 adi,input-colorspace = "rgb";
368 adi,input-clock = "1x";
369 adi,input-style = <1>;
370 adi,input-justification = "evenly";
371
372 ports {
373 #address-cells = <1>;
374 #size-cells = <0>;
375
376 port@0 {
377 reg = <0>;
378 adv7511_in: endpoint {
15a1ff30 379 remote-endpoint = <&lvds0_out>;
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WS
380 };
381 };
382
383 port@1 {
384 reg = <1>;
385 adv7511_out: endpoint {
386 remote-endpoint = <&hdmi_con_out>;
387 };
388 };
389 };
390 };
391
392 hdmi-in@4c {
393 compatible = "adi,adv7612";
394 reg = <0x4c>;
395 interrupt-parent = <&gpio1>;
396 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
397 default-input = <0>;
398
399 ports {
400 #address-cells = <1>;
401 #size-cells = <0>;
402
403 port@0 {
404 reg = <0>;
405 adv7612_in: endpoint {
406 remote-endpoint = <&hdmi_con_in>;
407 };
408 };
409
410 port@2 {
411 reg = <2>;
412 adv7612_out: endpoint {
413 remote-endpoint = <&vin0ep2>;
414 };
415 };
416 };
417 };
418 };
e6081b21
WS
419
420 /*
421 * IIC3 and I2C3 may be switched using pinmux.
422 * IIC3/I2C3 does not appear to support fallback to GPIO.
423 */
424 i2cpwr: i2c-13 {
425 compatible = "i2c-demux-pinctrl";
426 i2c-parent = <&iic3>, <&i2c3>;
427 i2c-bus-name = "i2c-pwr";
428 #address-cells = <1>;
429 #size-cells = <0>;
430
431 pmic@58 {
432 compatible = "dlg,da9063";
433 reg = <0x58>;
434 interrupt-parent = <&irqc0>;
435 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
436 interrupt-controller;
437
438 rtc {
439 compatible = "dlg,da9063-rtc";
440 };
441
442 wdt {
443 compatible = "dlg,da9063-watchdog";
444 };
445 };
446
447 vdd_dvfs: regulator@68 {
448 compatible = "dlg,da9210";
449 reg = <0x68>;
450 interrupt-parent = <&irqc0>;
451 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
452
453 regulator-min-microvolt = <1000000>;
454 regulator-max-microvolt = <1000000>;
455 regulator-boot-on;
456 regulator-always-on;
457 };
458 };
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LP
459};
460
461&du {
462 pinctrl-0 = <&du_pins>;
463 pinctrl-names = "default";
464 status = "okay";
465
5802c420 466 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
26c00ab4 467 <&x13_clk>, <&x2_clk>;
15a1ff30 468 clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
26c00ab4 469
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LP
470 ports {
471 port@0 {
472 endpoint {
473 remote-endpoint = <&adv7123_in>;
474 };
475 };
15a1ff30
LP
476 };
477};
478
479&lvds0 {
480 status = "okay";
481
482 ports {
fd25cdd1
LP
483 port@1 {
484 endpoint {
485 remote-endpoint = <&adv7511_in>;
486 };
487 };
15a1ff30
LP
488 };
489};
490
491&lvds1 {
15a1ff30
LP
492 ports {
493 port@1 {
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LP
494 lvds_connector: endpoint {
495 };
496 };
497 };
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LP
498};
499
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LP
500&extal_clk {
501 clock-frequency = <20000000>;
502};
503
39fa511b 504&pfc {
1781460c
GU
505 pinctrl-0 = <&scif_clk_pins>;
506 pinctrl-names = "default";
507
3024f507 508 du_pins: du {
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SH
509 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
510 function = "du";
3024f507
LP
511 };
512
ca348298 513 scif0_pins: scif0 {
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SH
514 groups = "scif0_data";
515 function = "scif0";
39fa511b
LP
516 };
517
1781460c 518 scif_clk_pins: scif_clk {
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SH
519 groups = "scif_clk";
520 function = "scif_clk";
1781460c
GU
521 };
522
da4ea951 523 ether_pins: ether {
2ffc224f
SH
524 groups = "eth_link", "eth_mdio", "eth_rmii";
525 function = "eth";
da4ea951
SS
526 };
527
528 phy1_pins: phy1 {
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SH
529 groups = "intc_irq0";
530 function = "intc";
da4ea951
SS
531 };
532
ca348298 533 scifa1_pins: scifa1 {
2ffc224f
SH
534 groups = "scifa1_data";
535 function = "scifa1";
39fa511b
LP
536 };
537
c6119944 538 sdhi0_pins: sd0 {
2ffc224f
SH
539 groups = "sdhi0_data4", "sdhi0_ctrl";
540 function = "sdhi0";
1ca79699
WS
541 power-source = <3300>;
542 };
543
544 sdhi0_pins_uhs: sd0_uhs {
545 groups = "sdhi0_data4", "sdhi0_ctrl";
546 function = "sdhi0";
547 power-source = <1800>;
c6119944
KM
548 };
549
550 sdhi2_pins: sd2 {
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SH
551 groups = "sdhi2_data4", "sdhi2_ctrl";
552 function = "sdhi2";
1ca79699
WS
553 power-source = <3300>;
554 };
555
556 sdhi2_pins_uhs: sd2_uhs {
557 groups = "sdhi2_data4", "sdhi2_ctrl";
558 function = "sdhi2";
559 power-source = <1800>;
c6119944
KM
560 };
561
39fa511b 562 mmc1_pins: mmc1 {
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SH
563 groups = "mmc1_data8", "mmc1_ctrl";
564 function = "mmc1";
39fa511b 565 };
9fe7c4f8 566
85c5e4c4 567 qspi_pins: qspi {
2ffc224f
SH
568 groups = "qspi_ctrl", "qspi_data4";
569 function = "qspi";
9fe7c4f8 570 };
b0403b91 571
85c5e4c4 572 msiof1_pins: msiof1 {
2ffc224f 573 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
b0403b91 574 "msiof1_tx";
2ffc224f 575 function = "msiof1";
b0403b91 576 };
05f72e03 577
880cb570 578 i2c0_pins: i2c0 {
2ffc224f
SH
579 groups = "i2c0";
580 function = "i2c0";
880cb570
WS
581 };
582
535118ca 583 iic0_pins: iic0 {
2ffc224f
SH
584 groups = "iic0";
585 function = "iic0";
535118ca
WS
586 };
587
b2f15ca6
SH
588 i2c1_pins: i2c1 {
589 groups = "i2c1";
590 function = "i2c1";
591 };
592
cb9a2b12 593 iic1_pins: iic1 {
2ffc224f
SH
594 groups = "iic1";
595 function = "iic1";
d90bf60c
SH
596 };
597
4e65e1b6
WS
598 i2c2_pins: i2c2 {
599 groups = "i2c2";
600 function = "i2c2";
601 };
602
cb9a2b12 603 iic2_pins: iic2 {
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SH
604 groups = "iic2";
605 function = "iic2";
d90bf60c
SH
606 };
607
e6081b21
WS
608 i2c3_pins: i2c3 {
609 groups = "i2c3";
610 function = "i2c3";
611 };
612
5179ffd0 613 iic3_pins: iic3 {
2ffc224f
SH
614 groups = "iic3";
615 function = "iic3";
05f72e03 616 };
d8584660 617
e03074a7 618 hsusb_pins: hsusb {
2ffc224f
SH
619 groups = "usb0_ovc_vbus";
620 function = "usb0";
e03074a7
YS
621 };
622
d8584660 623 usb0_pins: usb0 {
2ffc224f
SH
624 groups = "usb0";
625 function = "usb0";
d8584660
BD
626 };
627
628 usb1_pins: usb1 {
2ffc224f
SH
629 groups = "usb1";
630 function = "usb1";
d8584660
BD
631 };
632
633 usb2_pins: usb2 {
2ffc224f
SH
634 groups = "usb2";
635 function = "usb2";
d8584660 636 };
d594c977 637
56548d0c
WT
638 vin0_pins: vin0 {
639 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
640 function = "vin0";
641 };
642
da84fd93 643 vin1_pins: vin1 {
2ffc224f
SH
644 groups = "vin1_data8", "vin1_clk";
645 function = "vin1";
d594c977 646 };
8ea7a44a
KM
647
648 sound_pins: sound {
2ffc224f
SH
649 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
650 function = "ssi";
8ea7a44a
KM
651 };
652
653 sound_clk_pins: sound_clk {
2ffc224f
SH
654 groups = "audio_clk_a";
655 function = "audio_clk";
8ea7a44a 656 };
39fa511b
LP
657};
658
da4ea951
SS
659&ether {
660 pinctrl-0 = <&ether_pins &phy1_pins>;
661 pinctrl-names = "default";
662
663 phy-handle = <&phy1>;
664 renesas,ether-link-active-low;
fd7a8cbf 665 status = "okay";
da4ea951
SS
666
667 phy1: ethernet-phy@1 {
668 reg = <1>;
669 interrupt-parent = <&irqc0>;
670 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 671 micrel,led-mode = <1>;
da4ea951
SS
672 };
673};
674
247fd5ec 675&cmt0 {
fd7a8cbf 676 status = "okay";
247fd5ec
LP
677};
678
39fa511b
LP
679&mmcif1 {
680 pinctrl-0 = <&mmc1_pins>;
681 pinctrl-names = "default";
682
683 vmmc-supply = <&fixedregulator3v3>;
684 bus-width = <8>;
685 non-removable;
686 status = "okay";
3cc828fd 687};
c6181b9f
VB
688
689&sata1 {
690 status = "okay";
691};
9fe7c4f8 692
fad6d45c 693&qspi {
9fe7c4f8
GU
694 pinctrl-0 = <&qspi_pins>;
695 pinctrl-names = "default";
696
697 status = "okay";
698
699 flash: flash@0 {
755185b2 700 compatible = "spansion,s25fl512s", "jedec,spi-nor";
9fe7c4f8
GU
701 reg = <0>;
702 spi-max-frequency = <30000000>;
9909d2cb
GU
703 spi-tx-bus-width = <4>;
704 spi-rx-bus-width = <4>;
cbf41168
HN
705 spi-cpha;
706 spi-cpol;
9fe7c4f8
GU
707 m25p,fast-read;
708
f58bac70 709 partitions {
b88ddbdd 710 compatible = "fixed-partitions";
f58bac70
GU
711 #address-cells = <1>;
712 #size-cells = <1>;
713
714 partition@0 {
715 label = "loader";
716 reg = <0x00000000 0x00040000>;
717 read-only;
718 };
719 partition@40000 {
720 label = "user";
721 reg = <0x00040000 0x00400000>;
722 read-only;
723 };
724 partition@440000 {
725 label = "flash";
726 reg = <0x00440000 0x03bc0000>;
727 };
9fe7c4f8
GU
728 };
729 };
730};
c6119944 731
430d7bad
UH
732&scif0 {
733 pinctrl-0 = <&scif0_pins>;
4e9c4877
LP
734 pinctrl-names = "default";
735
736 status = "okay";
737};
738
7c055894
WS
739&scifa1 {
740 pinctrl-0 = <&scifa1_pins>;
4e9c4877
LP
741 pinctrl-names = "default";
742
743 status = "okay";
744};
745
1781460c
GU
746&scif_clk {
747 clock-frequency = <14745600>;
1781460c
GU
748};
749
b0403b91
GU
750&msiof1 {
751 pinctrl-0 = <&msiof1_pins>;
752 pinctrl-names = "default";
753
754 status = "okay";
755
756 pmic: pmic@0 {
757 compatible = "renesas,r2a11302ft";
758 reg = <0>;
759 spi-max-frequency = <6000000>;
760 spi-cpol;
761 spi-cpha;
762 };
b0403b91
GU
763};
764
c6119944
KM
765&sdhi0 {
766 pinctrl-0 = <&sdhi0_pins>;
1ca79699
WS
767 pinctrl-1 = <&sdhi0_pins_uhs>;
768 pinctrl-names = "default", "state_uhs";
c6119944
KM
769
770 vmmc-supply = <&vcc_sdhi0>;
771 vqmmc-supply = <&vccq_sdhi0>;
772 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
1ca79699 773 sd-uhs-sdr50;
dcc2fe78 774 sd-uhs-sdr104;
c6119944
KM
775 status = "okay";
776};
777
778&sdhi2 {
779 pinctrl-0 = <&sdhi2_pins>;
1ca79699
WS
780 pinctrl-1 = <&sdhi2_pins_uhs>;
781 pinctrl-names = "default", "state_uhs";
c6119944
KM
782
783 vmmc-supply = <&vcc_sdhi2>;
784 vqmmc-supply = <&vccq_sdhi2>;
785 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
1ca79699 786 sd-uhs-sdr50;
c6119944
KM
787 status = "okay";
788};
05f72e03 789
b989e138
BC
790&cpu0 {
791 cpu0-supply = <&vdd_dvfs>;
792};
e489c2a9 793
880cb570
WS
794&i2c0 {
795 pinctrl-0 = <&i2c0_pins>;
1e26fcf3 796 pinctrl-names = "i2c-exio0";
880cb570
WS
797};
798
cb9a2b12 799&iic0 {
535118ca 800 pinctrl-0 = <&iic0_pins>;
1e26fcf3 801 pinctrl-names = "i2c-exio0";
e489c2a9
BD
802};
803
b2f15ca6
SH
804&i2c1 {
805 pinctrl-0 = <&i2c1_pins>;
806 pinctrl-names = "i2c-exio1";
807};
808
cb9a2b12 809&iic1 {
cb9a2b12 810 pinctrl-0 = <&iic1_pins>;
b2f15ca6 811 pinctrl-names = "i2c-exio1";
e489c2a9
BD
812};
813
4e65e1b6
WS
814&i2c2 {
815 pinctrl-0 = <&i2c2_pins>;
816 pinctrl-names = "i2c-hdmi";
d594c977 817
177d8bea 818 clock-frequency = <100000>;
4e65e1b6 819};
177d8bea 820
4e65e1b6
WS
821&iic2 {
822 pinctrl-0 = <&iic2_pins>;
823 pinctrl-names = "i2c-hdmi";
56548d0c 824
4e65e1b6 825 clock-frequency = <100000>;
e489c2a9
BD
826};
827
e6081b21
WS
828&i2c3 {
829 pinctrl-0 = <&i2c3_pins>;
830 pinctrl-names = "i2c-pwr";
831};
aca4ec44 832
e6081b21
WS
833&iic3 {
834 pinctrl-0 = <&iic3_pins>;
835 pinctrl-names = "i2c-pwr";
e489c2a9 836};
d8584660
BD
837
838&pci0 {
839 status = "okay";
840 pinctrl-0 = <&usb0_pins>;
841 pinctrl-names = "default";
842};
843
844&pci1 {
845 status = "okay";
846 pinctrl-0 = <&usb1_pins>;
847 pinctrl-names = "default";
848};
849
37f7c1b0
YS
850&xhci {
851 status = "okay";
852 pinctrl-0 = <&usb2_pins>;
853 pinctrl-names = "default";
854};
855
d8584660
BD
856&pci2 {
857 status = "okay";
858 pinctrl-0 = <&usb2_pins>;
859 pinctrl-names = "default";
860};
d594c977 861
e03074a7
YS
862&hsusb {
863 status = "okay";
864 pinctrl-0 = <&hsusb_pins>;
865 pinctrl-names = "default";
866 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
867};
868
6742cafb
SS
869&usbphy {
870 status = "okay";
871};
872
56548d0c
WT
873/* HDMI video input */
874&vin0 {
875 pinctrl-0 = <&vin0_pins>;
876 pinctrl-names = "default";
877
878 status = "okay";
879
880 port {
881 vin0ep2: endpoint {
882 remote-endpoint = <&adv7612_out>;
883 bus-width = <24>;
884 hsync-active = <0>;
885 vsync-active = <0>;
886 pclk-sample = <1>;
887 data-active = <1>;
888 };
889 };
890};
891
d594c977
BD
892/* composite video input */
893&vin1 {
894 pinctrl-0 = <&vin1_pins>;
895 pinctrl-names = "default";
896
fd7a8cbf 897 status = "okay";
d594c977
BD
898
899 port {
d594c977
BD
900 vin1ep0: endpoint {
901 remote-endpoint = <&adv7180>;
902 bus-width = <8>;
903 };
904 };
905};
8ea7a44a
KM
906
907&rcar_sound {
908 pinctrl-0 = <&sound_pins &sound_clk_pins>;
909 pinctrl-names = "default";
910
ad63241c 911 /* Single DAI */
8ea7a44a
KM
912 #sound-dai-cells = <0>;
913
914 status = "okay";
915
916 rcar_sound,dai {
917 dai0 {
e110c541
KM
918 playback = <&ssi0 &src2 &dvc0>;
919 capture = <&ssi1 &src3 &dvc1>;
8ea7a44a
KM
920 };
921 };
922};
923
53e480fc
GU
924&rwdt {
925 timeout-sec = <60>;
926 status = "okay";
927};
928
8ea7a44a 929&ssi1 {
8ea7a44a
KM
930 shared-pin;
931};