projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 3c248aef BD |
1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* | |
| 3 | * Device Tree Source for the iWave RZ/G1N Qseven SOM | |
| 4 | * | |
| 5 | * Copyright (C) 2018 Renesas Electronics Corp. | |
| 6 | */ | |
| 7 | ||
| 8 | #include "r8a7744.dtsi" | |
| 9 | #include <dt-bindings/gpio/gpio.h> | |
| 10 | ||
| 11 | / { | |
| 12 | compatible = "iwave,g20m", "renesas,r8a7744"; | |
| 13 | ||
| 14 | memory@40000000 { | |
| 15 | device_type = "memory"; | |
| 16 | reg = <0 0x40000000 0 0x40000000>; | |
| 17 | }; | |
| 18 | ||
| 19 | reg_3p3v: 3p3v { | |
| 20 | compatible = "regulator-fixed"; | |
| 21 | regulator-name = "3P3V"; | |
| 22 | regulator-min-microvolt = <3300000>; | |
| 23 | regulator-max-microvolt = <3300000>; | |
| 24 | regulator-always-on; | |
| 25 | regulator-boot-on; | |
| 26 | }; | |
| 27 | }; | |
| 28 | ||
| 29 | &extal_clk { | |
| 30 | clock-frequency = <20000000>; | |
| 31 | }; | |
| 266d863e BD |
32 | |
| 33 | &pfc { | |
| 34 | mmcif0_pins: mmc { | |
| 35 | groups = "mmc_data8_b", "mmc_ctrl"; | |
| 36 | function = "mmc"; | |
| 37 | }; | |
| f9a3d5f2 | 38 | |
| e259e047 BD |
39 | qspi_pins: qspi { |
| 40 | groups = "qspi_ctrl", "qspi_data2"; | |
| 41 | function = "qspi"; | |
| 42 | }; | |
| 43 | ||
| f9a3d5f2 BD |
44 | sdhi0_pins: sd0 { |
| 45 | groups = "sdhi0_data4", "sdhi0_ctrl"; | |
| 46 | function = "sdhi0"; | |
| 47 | power-source = <3300>; | |
| 48 | }; | |
| 266d863e BD |
49 | }; |
| 50 | ||
| 51 | &mmcif0 { | |
| 52 | pinctrl-0 = <&mmcif0_pins>; | |
| 53 | pinctrl-names = "default"; | |
| 54 | ||
| 55 | vmmc-supply = <®_3p3v>; | |
| 56 | bus-width = <8>; | |
| 57 | non-removable; | |
| 58 | status = "okay"; | |
| 59 | }; | |
| f9a3d5f2 | 60 | |
| e259e047 BD |
61 | &qspi { |
| 62 | pinctrl-0 = <&qspi_pins>; | |
| 63 | pinctrl-names = "default"; | |
| 64 | ||
| 65 | status = "okay"; | |
| 66 | ||
| 67 | /* WARNING - This device contains the bootloader. Handle with care. */ | |
| 68 | flash: flash@0 { | |
| 69 | #address-cells = <1>; | |
| 70 | #size-cells = <1>; | |
| 71 | compatible = "jedec,spi-nor"; | |
| 72 | reg = <0>; | |
| 73 | spi-max-frequency = <50000000>; | |
| 74 | spi-tx-bus-width = <2>; | |
| 75 | spi-rx-bus-width = <2>; | |
| 76 | m25p,fast-read; | |
| 77 | spi-cpol; | |
| 78 | spi-cpha; | |
| 79 | }; | |
| 80 | }; | |
| 81 | ||
| f9a3d5f2 BD |
82 | &sdhi0 { |
| 83 | pinctrl-0 = <&sdhi0_pins>; | |
| 84 | pinctrl-names = "default"; | |
| 85 | ||
| 86 | vmmc-supply = <®_3p3v>; | |
| 87 | vqmmc-supply = <®_3p3v>; | |
| 88 | cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; | |
| 89 | status = "okay"; | |
| 90 | }; |