[linux-2.6-block.git] / arch / arm / boot / dts / r8a73a4.dtsi

/*
 * Device Tree Source for the r8a73a4 SoC
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Copyright (C) 2013 Magnus Damm
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,r8a73a4";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;
			clock-frequency = <1500000000>;
		};
	};

	gic: interrupt-controller@f1001000 {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0 0xf1001000 0 0x1000>,
			<0 0xf1002000 0 0x1000>,
			<0 0xf1004000 0 0x2000>,
			<0 0xf1006000 0 0x2000>;
		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	irqc0: interrupt-controller@e61c0000 {
		compatible = "renesas,irqc";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0 0xe61c0000 0 0x200>;
		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
			     <0 1 IRQ_TYPE_LEVEL_HIGH>,
			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
			     <0 3 IRQ_TYPE_LEVEL_HIGH>,
			     <0 4 IRQ_TYPE_LEVEL_HIGH>,
			     <0 5 IRQ_TYPE_LEVEL_HIGH>,
			     <0 6 IRQ_TYPE_LEVEL_HIGH>,
			     <0 7 IRQ_TYPE_LEVEL_HIGH>,
			     <0 8 IRQ_TYPE_LEVEL_HIGH>,
			     <0 9 IRQ_TYPE_LEVEL_HIGH>,
			     <0 10 IRQ_TYPE_LEVEL_HIGH>,
			     <0 11 IRQ_TYPE_LEVEL_HIGH>,
			     <0 12 IRQ_TYPE_LEVEL_HIGH>,
			     <0 13 IRQ_TYPE_LEVEL_HIGH>,
			     <0 14 IRQ_TYPE_LEVEL_HIGH>,
			     <0 15 IRQ_TYPE_LEVEL_HIGH>,
			     <0 16 IRQ_TYPE_LEVEL_HIGH>,
			     <0 17 IRQ_TYPE_LEVEL_HIGH>,
			     <0 18 IRQ_TYPE_LEVEL_HIGH>,
			     <0 19 IRQ_TYPE_LEVEL_HIGH>,
			     <0 20 IRQ_TYPE_LEVEL_HIGH>,
			     <0 21 IRQ_TYPE_LEVEL_HIGH>,
			     <0 22 IRQ_TYPE_LEVEL_HIGH>,
			     <0 23 IRQ_TYPE_LEVEL_HIGH>,
			     <0 24 IRQ_TYPE_LEVEL_HIGH>,
			     <0 25 IRQ_TYPE_LEVEL_HIGH>,
			     <0 26 IRQ_TYPE_LEVEL_HIGH>,
			     <0 27 IRQ_TYPE_LEVEL_HIGH>,
			     <0 28 IRQ_TYPE_LEVEL_HIGH>,
			     <0 29 IRQ_TYPE_LEVEL_HIGH>,
			     <0 30 IRQ_TYPE_LEVEL_HIGH>,
			     <0 31 IRQ_TYPE_LEVEL_HIGH>;
	};

	irqc1: interrupt-controller@e61c0200 {
		compatible = "renesas,irqc";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0 0xe61c0200 0 0x200>;
		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
			     <0 33 IRQ_TYPE_LEVEL_HIGH>,
			     <0 34 IRQ_TYPE_LEVEL_HIGH>,
			     <0 35 IRQ_TYPE_LEVEL_HIGH>,
			     <0 36 IRQ_TYPE_LEVEL_HIGH>,
			     <0 37 IRQ_TYPE_LEVEL_HIGH>,
			     <0 38 IRQ_TYPE_LEVEL_HIGH>,
			     <0 39 IRQ_TYPE_LEVEL_HIGH>,
			     <0 40 IRQ_TYPE_LEVEL_HIGH>,
			     <0 41 IRQ_TYPE_LEVEL_HIGH>,
			     <0 42 IRQ_TYPE_LEVEL_HIGH>,
			     <0 43 IRQ_TYPE_LEVEL_HIGH>,
			     <0 44 IRQ_TYPE_LEVEL_HIGH>,
			     <0 45 IRQ_TYPE_LEVEL_HIGH>,
			     <0 46 IRQ_TYPE_LEVEL_HIGH>,
			     <0 47 IRQ_TYPE_LEVEL_HIGH>,
			     <0 48 IRQ_TYPE_LEVEL_HIGH>,
			     <0 49 IRQ_TYPE_LEVEL_HIGH>,
			     <0 50 IRQ_TYPE_LEVEL_HIGH>,
			     <0 51 IRQ_TYPE_LEVEL_HIGH>,
			     <0 52 IRQ_TYPE_LEVEL_HIGH>,
			     <0 53 IRQ_TYPE_LEVEL_HIGH>,
			     <0 54 IRQ_TYPE_LEVEL_HIGH>,
			     <0 55 IRQ_TYPE_LEVEL_HIGH>,
			     <0 56 IRQ_TYPE_LEVEL_HIGH>,
			     <0 57 IRQ_TYPE_LEVEL_HIGH>;
	};

	dmac: dma-multiplexer@0 {
		compatible = "renesas,shdma-mux";
		#dma-cells = <1>;
		dma-channels = <20>;
		dma-requests = <256>;
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		dma0: dma-controller@e6700020 {
			compatible = "renesas,shdma-r8a73a4";
			reg = <0 0xe6700020 0 0x89e0>;
			interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
					0 200 IRQ_TYPE_LEVEL_HIGH
					0 201 IRQ_TYPE_LEVEL_HIGH
					0 202 IRQ_TYPE_LEVEL_HIGH
					0 203 IRQ_TYPE_LEVEL_HIGH
					0 204 IRQ_TYPE_LEVEL_HIGH
					0 205 IRQ_TYPE_LEVEL_HIGH
					0 206 IRQ_TYPE_LEVEL_HIGH
					0 207 IRQ_TYPE_LEVEL_HIGH
					0 208 IRQ_TYPE_LEVEL_HIGH
					0 209 IRQ_TYPE_LEVEL_HIGH
					0 210 IRQ_TYPE_LEVEL_HIGH
					0 211 IRQ_TYPE_LEVEL_HIGH
					0 212 IRQ_TYPE_LEVEL_HIGH
					0 213 IRQ_TYPE_LEVEL_HIGH
					0 214 IRQ_TYPE_LEVEL_HIGH
					0 215 IRQ_TYPE_LEVEL_HIGH
					0 216 IRQ_TYPE_LEVEL_HIGH
					0 217 IRQ_TYPE_LEVEL_HIGH
					0 218 IRQ_TYPE_LEVEL_HIGH
					0 219 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15",
					"ch16", "ch17", "ch18", "ch19";
		};
	};

	thermal@e61f0000 {
		compatible = "renesas,rcar-thermal";
		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
			 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c0: i2c@e6500000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6500000 0 0x428>;
		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c1: i2c@e6510000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6510000 0 0x428>;
		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c2: i2c@e6520000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6520000 0 0x428>;
		interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c3: i2c@e6530000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6530000 0 0x428>;
		interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c4: i2c@e6540000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6540000 0 0x428>;
		interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c5: i2c@e60b0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe60b0000 0 0x428>;
		interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c6: i2c@e6550000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6550000 0 0x428>;
		interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c7: i2c@e6560000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6560000 0 0x428>;
		interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c8: i2c@e6570000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0 0xe6570000 0 0x428>;
		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	mmcif0: mmc@ee200000 {
		compatible = "renesas,sh-mmcif";
		reg = <0 0xee200000 0 0x80>;
		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
		reg-io-width = <4>;
		status = "disabled";
	};

	mmcif1: mmc@ee220000 {
		compatible = "renesas,sh-mmcif";
		reg = <0 0xee220000 0 0x80>;
		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
		reg-io-width = <4>;
		status = "disabled";
	};

	pfc: pfc@e6050000 {
		compatible = "renesas,pfc-r8a73a4";
		reg = <0 0xe6050000 0 0x9000>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupts-extended =
			<&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
			<&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
			<&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
			<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
			<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
			<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
			<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
			<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
			<&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
			<&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
			<&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
			<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
			<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
			<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
			<&irqc1 24 0>, <&irqc1 25 0>;
	};

	sdhi0: sd@ee100000 {
		compatible = "renesas,sdhi-r8a73a4";
		reg = <0 0xee100000 0 0x100>;
		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		status = "disabled";
	};

	sdhi1: sd@ee120000 {
		compatible = "renesas,sdhi-r8a73a4";
		reg = <0 0xee120000 0 0x100>;
		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		status = "disabled";
	};

	sdhi2: sd@ee140000 {
		compatible = "renesas,sdhi-r8a73a4";
		reg = <0 0xee140000 0 0x100>;
		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		status = "disabled";
	};
};
Commit	Line	Data
eccf0607 MD	1	/*
	2	* Device Tree Source for the r8a73a4 SoC
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	* Copyright (C) 2013 Magnus Damm
	6	*
	7	* This file is licensed under the terms of the GNU General Public License
	8	* version 2. This program is licensed "as is" without any warranty of any
	9	* kind, whether express or implied.
	10	*/
	11
5f75e73c LP	12	#include <dt-bindings/interrupt-controller/arm-gic.h>
	13	#include <dt-bindings/interrupt-controller/irq.h>
	14
eccf0607 MD	15	/ {
	16	compatible = "renesas,r8a73a4";
	17	interrupt-parent = <&gic>;
26a0d2d4 TY	18	#address-cells = <2>;
26a0d2d4 TY	19	#size-cells = <2>;
eccf0607 MD	20
	21	cpus {
	22	#address-cells = <1>;
	23	#size-cells = <0>;
	24
	25	cpu0: cpu@0 {
	26	device_type = "cpu";
	27	compatible = "arm,cortex-a15";
	28	reg = <0>;
	29	clock-frequency = <1500000000>;
	30	};
	31	};
	32
	33	gic: interrupt-controller@f1001000 {
	34	compatible = "arm,cortex-a15-gic";
	35	#interrupt-cells = <3>;
	36	#address-cells = <0>;
	37	interrupt-controller;
26a0d2d4 TY	38	reg = <0 0xf1001000 0 0x1000>,
	39	<0 0xf1002000 0 0x1000>,
	40	<0 0xf1004000 0 0x2000>,
	41	<0 0xf1006000 0 0x2000>;
5f75e73c	42	interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
eccf0607 MD	43	};
	44
	45	timer {
	46	compatible = "arm,armv7-timer";
5f75e73c LP	47	interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	48	<1 14 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	49	<1 11 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	50	<1 10 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
eccf0607	51	};
984ca295 MD	52
	53	irqc0: interrupt-controller@e61c0000 {
	54	compatible = "renesas,irqc";
	55	#interrupt-cells = <2>;
	56	interrupt-controller;
26a0d2d4	57	reg = <0 0xe61c0000 0 0x200>;
5f75e73c LP	58	interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
	59	<0 1 IRQ_TYPE_LEVEL_HIGH>,
	60	<0 2 IRQ_TYPE_LEVEL_HIGH>,
	61	<0 3 IRQ_TYPE_LEVEL_HIGH>,
	62	<0 4 IRQ_TYPE_LEVEL_HIGH>,
	63	<0 5 IRQ_TYPE_LEVEL_HIGH>,
	64	<0 6 IRQ_TYPE_LEVEL_HIGH>,
	65	<0 7 IRQ_TYPE_LEVEL_HIGH>,
	66	<0 8 IRQ_TYPE_LEVEL_HIGH>,
	67	<0 9 IRQ_TYPE_LEVEL_HIGH>,
	68	<0 10 IRQ_TYPE_LEVEL_HIGH>,
	69	<0 11 IRQ_TYPE_LEVEL_HIGH>,
	70	<0 12 IRQ_TYPE_LEVEL_HIGH>,
	71	<0 13 IRQ_TYPE_LEVEL_HIGH>,
	72	<0 14 IRQ_TYPE_LEVEL_HIGH>,
	73	<0 15 IRQ_TYPE_LEVEL_HIGH>,
	74	<0 16 IRQ_TYPE_LEVEL_HIGH>,
	75	<0 17 IRQ_TYPE_LEVEL_HIGH>,
	76	<0 18 IRQ_TYPE_LEVEL_HIGH>,
	77	<0 19 IRQ_TYPE_LEVEL_HIGH>,
	78	<0 20 IRQ_TYPE_LEVEL_HIGH>,
	79	<0 21 IRQ_TYPE_LEVEL_HIGH>,
	80	<0 22 IRQ_TYPE_LEVEL_HIGH>,
	81	<0 23 IRQ_TYPE_LEVEL_HIGH>,
	82	<0 24 IRQ_TYPE_LEVEL_HIGH>,
	83	<0 25 IRQ_TYPE_LEVEL_HIGH>,
	84	<0 26 IRQ_TYPE_LEVEL_HIGH>,
	85	<0 27 IRQ_TYPE_LEVEL_HIGH>,
	86	<0 28 IRQ_TYPE_LEVEL_HIGH>,
	87	<0 29 IRQ_TYPE_LEVEL_HIGH>,
	88	<0 30 IRQ_TYPE_LEVEL_HIGH>,
	89	<0 31 IRQ_TYPE_LEVEL_HIGH>;
984ca295 MD	90	};
	91
	92	irqc1: interrupt-controller@e61c0200 {
	93	compatible = "renesas,irqc";
	94	#interrupt-cells = <2>;
	95	interrupt-controller;
26a0d2d4	96	reg = <0 0xe61c0200 0 0x200>;
5f75e73c LP	97	interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
	98	<0 33 IRQ_TYPE_LEVEL_HIGH>,
	99	<0 34 IRQ_TYPE_LEVEL_HIGH>,
	100	<0 35 IRQ_TYPE_LEVEL_HIGH>,
	101	<0 36 IRQ_TYPE_LEVEL_HIGH>,
	102	<0 37 IRQ_TYPE_LEVEL_HIGH>,
	103	<0 38 IRQ_TYPE_LEVEL_HIGH>,
	104	<0 39 IRQ_TYPE_LEVEL_HIGH>,
	105	<0 40 IRQ_TYPE_LEVEL_HIGH>,
	106	<0 41 IRQ_TYPE_LEVEL_HIGH>,
	107	<0 42 IRQ_TYPE_LEVEL_HIGH>,
	108	<0 43 IRQ_TYPE_LEVEL_HIGH>,
	109	<0 44 IRQ_TYPE_LEVEL_HIGH>,
	110	<0 45 IRQ_TYPE_LEVEL_HIGH>,
	111	<0 46 IRQ_TYPE_LEVEL_HIGH>,
	112	<0 47 IRQ_TYPE_LEVEL_HIGH>,
	113	<0 48 IRQ_TYPE_LEVEL_HIGH>,
	114	<0 49 IRQ_TYPE_LEVEL_HIGH>,
	115	<0 50 IRQ_TYPE_LEVEL_HIGH>,
	116	<0 51 IRQ_TYPE_LEVEL_HIGH>,
	117	<0 52 IRQ_TYPE_LEVEL_HIGH>,
	118	<0 53 IRQ_TYPE_LEVEL_HIGH>,
	119	<0 54 IRQ_TYPE_LEVEL_HIGH>,
	120	<0 55 IRQ_TYPE_LEVEL_HIGH>,
	121	<0 56 IRQ_TYPE_LEVEL_HIGH>,
	122	<0 57 IRQ_TYPE_LEVEL_HIGH>;
984ca295 MD	123	};
984ca295 MD	124
734e2ce3 GL	125	dmac: dma-multiplexer@0 {
	126	compatible = "renesas,shdma-mux";
	127	#dma-cells = <1>;
	128	dma-channels = <20>;
	129	dma-requests = <256>;
	130	#address-cells = <2>;
	131	#size-cells = <2>;
	132	ranges;
	133
	134	dma0: dma-controller@e6700020 {
	135	compatible = "renesas,shdma-r8a73a4";
	136	reg = <0 0xe6700020 0 0x89e0>;
d6dd1313 LP	137	interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
	138	0 200 IRQ_TYPE_LEVEL_HIGH
	139	0 201 IRQ_TYPE_LEVEL_HIGH
	140	0 202 IRQ_TYPE_LEVEL_HIGH
	141	0 203 IRQ_TYPE_LEVEL_HIGH
	142	0 204 IRQ_TYPE_LEVEL_HIGH
	143	0 205 IRQ_TYPE_LEVEL_HIGH
	144	0 206 IRQ_TYPE_LEVEL_HIGH
	145	0 207 IRQ_TYPE_LEVEL_HIGH
	146	0 208 IRQ_TYPE_LEVEL_HIGH
	147	0 209 IRQ_TYPE_LEVEL_HIGH
	148	0 210 IRQ_TYPE_LEVEL_HIGH
	149	0 211 IRQ_TYPE_LEVEL_HIGH
	150	0 212 IRQ_TYPE_LEVEL_HIGH
	151	0 213 IRQ_TYPE_LEVEL_HIGH
	152	0 214 IRQ_TYPE_LEVEL_HIGH
	153	0 215 IRQ_TYPE_LEVEL_HIGH
	154	0 216 IRQ_TYPE_LEVEL_HIGH
	155	0 217 IRQ_TYPE_LEVEL_HIGH
	156	0 218 IRQ_TYPE_LEVEL_HIGH
	157	0 219 IRQ_TYPE_LEVEL_HIGH>;
734e2ce3 GL	158	interrupt-names = "error",
	159	"ch0", "ch1", "ch2", "ch3",
	160	"ch4", "ch5", "ch6", "ch7",
	161	"ch8", "ch9", "ch10", "ch11",
	162	"ch12", "ch13", "ch14", "ch15",
	163	"ch16", "ch17", "ch18", "ch19";
	164	};
	165	};
	166
c91cf2fa KM	167	thermal@e61f0000 {
c91cf2fa KM	168	compatible = "renesas,rcar-thermal";
26a0d2d4 TY	169	reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
26a0d2d4 TY	170	<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
5f75e73c	171	interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
c91cf2fa	172	};
f98c1069 GL	173
	174	i2c0: i2c@e6500000 {
	175	#address-cells = <1>;
	176	#size-cells = <0>;
	177	compatible = "renesas,rmobile-iic";
	178	reg = <0 0xe6500000 0 0x428>;
d6dd1313	179	interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	180	status = "disabled";
f98c1069 GL	181	};
	182
	183	i2c1: i2c@e6510000 {
	184	#address-cells = <1>;
	185	#size-cells = <0>;
	186	compatible = "renesas,rmobile-iic";
	187	reg = <0 0xe6510000 0 0x428>;
d6dd1313	188	interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	189	status = "disabled";
f98c1069 GL	190	};
	191
	192	i2c2: i2c@e6520000 {
	193	#address-cells = <1>;
	194	#size-cells = <0>;
	195	compatible = "renesas,rmobile-iic";
	196	reg = <0 0xe6520000 0 0x428>;
d6dd1313	197	interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	198	status = "disabled";
f98c1069 GL	199	};
	200
	201	i2c3: i2c@e6530000 {
	202	#address-cells = <1>;
	203	#size-cells = <0>;
	204	compatible = "renesas,rmobile-iic";
	205	reg = <0 0xe6530000 0 0x428>;
d6dd1313	206	interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	207	status = "disabled";
f98c1069 GL	208	};
	209
	210	i2c4: i2c@e6540000 {
	211	#address-cells = <1>;
	212	#size-cells = <0>;
	213	compatible = "renesas,rmobile-iic";
	214	reg = <0 0xe6540000 0 0x428>;
5f75e73c	215	interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	216	status = "disabled";
f98c1069 GL	217	};
	218
	219	i2c5: i2c@e60b0000 {
	220	#address-cells = <1>;
	221	#size-cells = <0>;
	222	compatible = "renesas,rmobile-iic";
	223	reg = <0 0xe60b0000 0 0x428>;
5f75e73c	224	interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	225	status = "disabled";
f98c1069 GL	226	};
	227
	228	i2c6: i2c@e6550000 {
	229	#address-cells = <1>;
	230	#size-cells = <0>;
	231	compatible = "renesas,rmobile-iic";
	232	reg = <0 0xe6550000 0 0x428>;
5f75e73c	233	interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	234	status = "disabled";
f98c1069 GL	235	};
	236
	237	i2c7: i2c@e6560000 {
	238	#address-cells = <1>;
	239	#size-cells = <0>;
	240	compatible = "renesas,rmobile-iic";
	241	reg = <0 0xe6560000 0 0x428>;
5f75e73c	242	interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	243	status = "disabled";
f98c1069 GL	244	};
	245
	246	i2c8: i2c@e6570000 {
	247	#address-cells = <1>;
	248	#size-cells = <0>;
	249	compatible = "renesas,rmobile-iic";
	250	reg = <0 0xe6570000 0 0x428>;
5f75e73c	251	interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	252	status = "disabled";
f98c1069	253	};
369ee2db	254
43304a5f	255	mmcif0: mmc@ee200000 {
369ee2db GL	256	compatible = "renesas,sh-mmcif";
369ee2db GL	257	reg = <0 0xee200000 0 0x80>;
5f75e73c	258	interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
369ee2db GL	259	reg-io-width = <4>;
	260	status = "disabled";
	261	};
	262
43304a5f	263	mmcif1: mmc@ee220000 {
369ee2db GL	264	compatible = "renesas,sh-mmcif";
369ee2db GL	265	reg = <0 0xee220000 0 0x80>;
5f75e73c	266	interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
369ee2db GL	267	reg-io-width = <4>;
	268	status = "disabled";
	269	};
	270
803d319c LP	271	pfc: pfc@e6050000 {
	272	compatible = "renesas,pfc-r8a73a4";
	273	reg = <0 0xe6050000 0 0x9000>;
	274	gpio-controller;
	275	#gpio-cells = <2>;
defc82ea LP	276	interrupts-extended =
	277	<&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
	278	<&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
	279	<&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
	280	<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
	281	<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
	282	<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
	283	<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
	284	<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
	285	<&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
	286	<&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
	287	<&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
	288	<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
	289	<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
	290	<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
	291	<&irqc1 24 0>, <&irqc1 25 0>;
803d319c	292	};
55689bfa	293
43304a5f	294	sdhi0: sd@ee100000 {
df1d0584	295	compatible = "renesas,sdhi-r8a73a4";
369ee2db	296	reg = <0 0xee100000 0 0x100>;
5f75e73c	297	interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
369ee2db GL	298	cap-sd-highspeed;
	299	status = "disabled";
	300	};
	301
43304a5f	302	sdhi1: sd@ee120000 {
df1d0584	303	compatible = "renesas,sdhi-r8a73a4";
369ee2db	304	reg = <0 0xee120000 0 0x100>;
5f75e73c	305	interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
369ee2db GL	306	cap-sd-highspeed;
	307	status = "disabled";
	308	};
	309
43304a5f	310	sdhi2: sd@ee140000 {
df1d0584	311	compatible = "renesas,sdhi-r8a73a4";
369ee2db	312	reg = <0 0xee140000 0 0x100>;
5f75e73c	313	interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
369ee2db GL	314	cap-sd-highspeed;
	315	status = "disabled";
	316	};
eccf0607	317	};