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aff18a67 DM |
1 | /* The pxa3xx skeleton simply augments the 2xx version */ |
2 | /include/ "pxa2xx.dtsi" | |
3 | ||
4 | / { | |
5 | model = "Marvell PXA3xx familiy SoC"; | |
6 | compatible = "marvell,pxa3xx"; | |
7 | ||
8 | pxabus { | |
9 | pwri2c: i2c@40f500c0 { | |
10 | compatible = "mrvl,pwri2c"; | |
11 | reg = <0x40f500c0 0x30>; | |
12 | interrupts = <6>; | |
13 | #address-cells = <0x1>; | |
14 | #size-cells = <0>; | |
15 | status = "disabled"; | |
16 | }; | |
17 | ||
18 | nand0: nand@43100000 { | |
19 | compatible = "marvell,pxa3xx-nand"; | |
20 | reg = <0x43100000 90>; | |
21 | interrupts = <45>; | |
22 | #address-cells = <1>; | |
23 | #size-cells = <1>; | |
24 | status = "disabled"; | |
25 | }; | |
26 | ||
27 | pxairq: interrupt-controller@40d00000 { | |
28 | marvell,intc-priority; | |
29 | marvell,intc-nr-irqs = <56>; | |
30 | }; | |
93c5a5b1 DM |
31 | |
32 | gpio: gpio@40e00000 { | |
33 | compatible = "intel,pxa3xx-gpio"; | |
34 | reg = <0x40e00000 0x10000>; | |
35 | interrupt-names = "gpio0", "gpio1", "gpio_mux"; | |
36 | interrupts = <8 9 10>; | |
37 | gpio-controller; | |
38 | #gpio-cells = <0x2>; | |
39 | interrupt-controller; | |
40 | #interrupt-cells = <0x2>; | |
41 | }; | |
aff18a67 DM |
42 | }; |
43 | }; |