[linux-2.6-block.git] / arch / arm / boot / dts / omap3-igep0020.dts

/*
 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include "omap3-igep.dtsi"
#include "omap-gpmc-smsc9221.dtsi"

/ {
	model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
	compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins>;
		compatible = "gpio-leds";

		boot {
			 label = "omap3:green:boot";
			 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
			 default-state = "on";
		};

		user0 {
			 label = "omap3:red:user0";
			 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
			 default-state = "off";
		};

		user1 {
			 label = "omap3:red:user1";
			 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
			 default-state = "off";
		};

		user2 {
			label = "omap3:green:user1";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
		};
	};

       /* HS USB Port 1 Power */
       hsusb1_power: hsusb1_power_reg {
               compatible = "regulator-fixed";
               regulator-name = "hsusb1_vbus";
               regulator-min-microvolt = <3300000>;
               regulator-max-microvolt = <3300000>;
               gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>;	/* GPIO LEDA */
               startup-delay-us = <70000>;
       };

	/* HS USB Host PHY on PORT 1 */
	hsusb1_phy: hsusb1_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
		vcc-supply = <&hsusb1_power>;
	};

	tfp410: encoder@0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint@0 {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint@0 {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector@0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
		&tfp410_pins
		&dss_dpi_pins
	>;

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			0x196 (PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
		&hsusbb1_pins
	>;

	hsusbb1_pins: pinmux_hsusbb1_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3)		/* etk_ctl.hsusb1_clk */
			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)		/* etk_clk.hsusb1_stp */
			OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d8.hsusb1_dir */
			OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d9.hsusb1_nxt */
			OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d0.hsusb1_data0 */
			OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d1.hsusb1_data1 */
			OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d2.hsusb1_data2 */
			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d3.hsusb1_data7 */
			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d4.hsusb1_data4 */
			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d5.hsusb1_data5 */
			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d6.hsusb1_data6 */
			OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d7.hsusb1_data3 */
		>;
	};

	leds_pins: pinmux_leds_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
		>;
	};
};

&i2c3 {
	clock-frequency = <100000>;

	/*
	 * Display monitor features are burnt in the EEPROM
	 * as EDID data.
	 */
	eeprom@50 {
		compatible = "ti,eeprom";
		reg = <0x50>;
	};
};

&gpmc {
	ranges = <0 0 0x00000000 0x1000000>,	/* CS0: 16MB for NAND */
		 <5 0 0x2c000000 0x01000000>;

	ethernet@gpmc {
		pinctrl-names = "default";
		pinctrl-0 = <&smsc9221_pins>;
		reg = <5 0 0xff>;
		interrupt-parent = <&gpio6>;
		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&usbhshost {
	port1-mode = "ehci-phy";
};

&usbhsehci {
	phys = <&hsusb1_phy>;
};

&vpll2 {
        /* Needed for DSS */
        regulator-name = "vdds_dsi";
};

&dss {
	status = "ok";

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};
Commit	Line	Data
cb5e191e	1	/*
9927064e	2	* Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
cb5e191e JMC	3	*
	4	* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
	5	* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
98ef7957	12	#include "omap3-igep.dtsi"
ef139e13	13	#include "omap-gpmc-smsc9221.dtsi"
cb5e191e JMC	14
cb5e191e JMC	15	/ {
9927064e	16	model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
fb0cfecf	17	compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
cb5e191e JMC	18
cb5e191e JMC	19	leds {
bd52e2d2 JMC	20	pinctrl-names = "default";
bd52e2d2 JMC	21	pinctrl-0 = <&leds_pins>;
cb5e191e	22	compatible = "gpio-leds";
bd52e2d2	23
cb5e191e JMC	24	boot {
cb5e191e JMC	25	label = "omap3:green:boot";
6d624eab	26	gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
cb5e191e JMC	27	default-state = "on";
	28	};
	29
	30	user0 {
	31	label = "omap3:red:user0";
6d624eab	32	gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
cb5e191e JMC	33	default-state = "off";
	34	};
	35
	36	user1 {
	37	label = "omap3:red:user1";
6d624eab	38	gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
cb5e191e JMC	39	default-state = "off";
	40	};
	41
	42	user2 {
	43	label = "omap3:green:user1";
6d624eab	44	gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
cb5e191e JMC	45	};
cb5e191e JMC	46	};
d72b4415	47
339e834f JMC	48	/* HS USB Port 1 Power */
	49	hsusb1_power: hsusb1_power_reg {
	50	compatible = "regulator-fixed";
	51	regulator-name = "hsusb1_vbus";
	52	regulator-min-microvolt = <3300000>;
	53	regulator-max-microvolt = <3300000>;
	54	gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
	55	startup-delay-us = <70000>;
	56	};
	57
	58	/* HS USB Host PHY on PORT 1 */
	59	hsusb1_phy: hsusb1_phy {
	60	compatible = "usb-nop-xceiv";
	61	reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
	62	vcc-supply = <&hsusb1_power>;
	63	};
dd186aa5 JMC	64
	65	tfp410: encoder@0 {
	66	compatible = "ti,tfp410";
	67	powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
	68
	69	ports {
	70	#address-cells = <1>;
	71	#size-cells = <0>;
	72
	73	port@0 {
	74	reg = <0>;
	75
	76	tfp410_in: endpoint@0 {
	77	remote-endpoint = <&dpi_out>;
	78	};
	79	};
	80
	81	port@1 {
	82	reg = <1>;
	83
	84	tfp410_out: endpoint@0 {
	85	remote-endpoint = <&dvi_connector_in>;
	86	};
	87	};
	88	};
	89	};
	90
	91	dvi0: connector@0 {
	92	compatible = "dvi-connector";
	93	label = "dvi";
	94
	95	digital;
	96
	97	ddc-i2c-bus = <&i2c3>;
	98
	99	port {
	100	dvi_connector_in: endpoint {
	101	remote-endpoint = <&tfp410_out>;
	102	};
	103	};
	104	};
339e834f JMC	105	};
	106
	107	&omap3_pmx_core {
	108	pinctrl-names = "default";
	109	pinctrl-0 = <
50592dc3	110	&tfp410_pins
dd186aa5	111	&dss_dpi_pins
339e834f JMC	112	>;
339e834f JMC	113
dd186aa5	114	tfp410_pins: pinmux_tfp410_pins {
50592dc3 JMC	115	pinctrl-single,pins = <
	116	0x196 (PIN_OUTPUT \| MUX_MODE4) /* hdq_sio.gpio_170 */
	117	>;
	118	};
	119
dd186aa5	120	dss_dpi_pins: pinmux_dss_dpi_pins {
50592dc3 JMC	121	pinctrl-single,pins = <
	122	0x0a4 (PIN_OUTPUT \| MUX_MODE0) /* dss_pclk.dss_pclk */
	123	0x0a6 (PIN_OUTPUT \| MUX_MODE0) /* dss_hsync.dss_hsync */
	124	0x0a8 (PIN_OUTPUT \| MUX_MODE0) /* dss_vsync.dss_vsync */
	125	0x0aa (PIN_OUTPUT \| MUX_MODE0) /* dss_acbias.dss_acbias */
	126	0x0ac (PIN_OUTPUT \| MUX_MODE0) /* dss_data0.dss_data0 */
	127	0x0ae (PIN_OUTPUT \| MUX_MODE0) /* dss_data1.dss_data1 */
	128	0x0b0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data2.dss_data2 */
	129	0x0b2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data3.dss_data3 */
	130	0x0b4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data4.dss_data4 */
	131	0x0b6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data5.dss_data5 */
	132	0x0b8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data6.dss_data6 */
	133	0x0ba (PIN_OUTPUT \| MUX_MODE0) /* dss_data7.dss_data7 */
	134	0x0bc (PIN_OUTPUT \| MUX_MODE0) /* dss_data8.dss_data8 */
	135	0x0be (PIN_OUTPUT \| MUX_MODE0) /* dss_data9.dss_data9 */
	136	0x0c0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data10.dss_data10 */
	137	0x0c2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data11.dss_data11 */
	138	0x0c4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data12.dss_data12 */
	139	0x0c6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data13.dss_data13 */
	140	0x0c8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data14.dss_data14 */
	141	0x0ca (PIN_OUTPUT \| MUX_MODE0) /* dss_data15.dss_data15 */
	142	0x0cc (PIN_OUTPUT \| MUX_MODE0) /* dss_data16.dss_data16 */
	143	0x0ce (PIN_OUTPUT \| MUX_MODE0) /* dss_data17.dss_data17 */
	144	0x0d0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data18.dss_data18 */
	145	0x0d2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data19.dss_data19 */
	146	0x0d4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data20.dss_data20 */
	147	0x0d6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data21.dss_data21 */
	148	0x0d8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data22.dss_data22 */
	149	0x0da (PIN_OUTPUT \| MUX_MODE0) /* dss_data23.dss_data23 */
	150	>;
	151	};
86f9abb6 EBS	152
	153	uart2_pins: pinmux_uart2_pins {
	154	pinctrl-single,pins = <
	155	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT \| MUX_MODE0) /* uart2_cts.uart2_cts */
	156	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts .uart2_rts*/
	157	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
	158	OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
	159	>;
	160	};
cb5e191e JMC	161	};
cb5e191e JMC	162
3d495383 LP	163	&omap3_pmx_core2 {
	164	pinctrl-names = "default";
	165	pinctrl-0 = <
	166	&hsusbb1_pins
bd52e2d2	167	>;
3d495383 LP	168
	169	hsusbb1_pins: pinmux_hsusbb1_pins {
	170	pinctrl-single,pins = <
	171	OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT \| MUX_MODE3) /* etk_ctl.hsusb1_clk */
	172	OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT \| MUX_MODE3) /* etk_clk.hsusb1_stp */
	173	OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d8.hsusb1_dir */
	174	OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d9.hsusb1_nxt */
	175	OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d0.hsusb1_data0 */
	176	OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d1.hsusb1_data1 */
	177	OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d2.hsusb1_data2 */
	178	OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d3.hsusb1_data7 */
	179	OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d4.hsusb1_data4 */
	180	OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d5.hsusb1_data5 */
	181	OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d6.hsusb1_data6 */
	182	OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d7.hsusb1_data3 */
	183	>;
	184	};
	185
	186	leds_pins: pinmux_leds_pins {
	187	pinctrl-single,pins = <
	188	OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT \| MUX_MODE4) /* etk_d12.gpio_26 */
	189	OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT \| MUX_MODE4) /* etk_d13.gpio_27 */
	190	OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT \| MUX_MODE4) /* etk_d14.gpio_28 */
	191	>;
	192	};
bd52e2d2 JMC	193	};
bd52e2d2 JMC	194
cb5e191e JMC	195	&i2c3 {
	196	clock-frequency = <100000>;
	197
	198	/*
	199	* Display monitor features are burnt in the EEPROM
	200	* as EDID data.
	201	*/
	202	eeprom@50 {
	203	compatible = "ti,eeprom";
	204	reg = <0x50>;
	205	};
	206	};
d72b4415 JMC	207
d72b4415 JMC	208	&gpmc {
e2c5eb78	209	ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
7f674b3f JMC	210	<5 0 0x2c000000 0x01000000>;
7f674b3f JMC	211
6b2978ac	212	ethernet@gpmc {
d72b4415	213	pinctrl-names = "default";
ef139e13	214	pinctrl-0 = <&smsc9221_pins>;
d72b4415	215	reg = <5 0 0xff>;
d72b4415	216	interrupt-parent = <&gpio6>;
2892aef2	217	interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
d72b4415 JMC	218	};
d72b4415 JMC	219	};
339e834f	220
86f9abb6 EBS	221	&uart2 {
	222	pinctrl-names = "default";
	223	pinctrl-0 = <&uart2_pins>;
	224	};
	225
339e834f JMC	226	&usbhshost {
	227	port1-mode = "ehci-phy";
	228	};
	229
	230	&usbhsehci {
	231	phys = <&hsusb1_phy>;
	232	};
2f2befd8 JMC	233
	234	&vpll2 {
	235	/* Needed for DSS */
	236	regulator-name = "vdds_dsi";
	237	};
dd186aa5 JMC	238
	239	&dss {
	240	status = "ok";
	241
	242	port {
	243	dpi_out: endpoint {
	244	remote-endpoint = <&tfp410_in>;
	245	data-lines = <24>;
	246	};
	247	};
	248	};