Commit | Line | Data |
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3f187f82 PU |
1 | /* |
2 | * Device Tree Source for OMAP243x SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
98ef7957 | 11 | #include "omap2.dtsi" |
3f187f82 PU |
12 | |
13 | / { | |
14 | compatible = "ti,omap2430", "ti,omap2"; | |
15 | ||
16 | ocp { | |
72b10ac0 TK |
17 | l4_wkup: l4_wkup@49000000 { |
18 | compatible = "ti,omap2-l4-wkup", "simple-bus"; | |
19 | #address-cells = <1>; | |
20 | #size-cells = <1>; | |
21 | ranges = <0 0x49000000 0x31000>; | |
bc797691 | 22 | |
72b10ac0 TK |
23 | prcm: prcm@6000 { |
24 | compatible = "ti,omap2-prcm"; | |
25 | reg = <0x6000 0x1000>; | |
bc797691 | 26 | |
72b10ac0 TK |
27 | prcm_clocks: clocks { |
28 | #address-cells = <1>; | |
29 | #size-cells = <0>; | |
30 | }; | |
bc797691 | 31 | |
72b10ac0 TK |
32 | prcm_clockdomains: clockdomains { |
33 | }; | |
34 | }; | |
bc797691 | 35 | |
72b10ac0 TK |
36 | scm: scm@2000 { |
37 | compatible = "ti,omap2-scm", "simple-bus"; | |
38 | reg = <0x2000 0x1000>; | |
bc797691 | 39 | #address-cells = <1>; |
72b10ac0 | 40 | #size-cells = <1>; |
be76fd31 | 41 | #pinctrl-cells = <1>; |
72b10ac0 | 42 | ranges = <0 0x2000 0x1000>; |
bc797691 | 43 | |
72b10ac0 TK |
44 | omap2430_pmx: pinmux@30 { |
45 | compatible = "ti,omap2430-padconf", | |
46 | "pinctrl-single"; | |
47 | reg = <0x30 0x0154>; | |
48 | #address-cells = <1>; | |
49 | #size-cells = <0>; | |
be76fd31 | 50 | #pinctrl-cells = <1>; |
72b10ac0 TK |
51 | pinctrl-single,register-width = <8>; |
52 | pinctrl-single,function-mask = <0x3f>; | |
53 | }; | |
bc797691 | 54 | |
72b10ac0 | 55 | scm_conf: scm_conf@270 { |
4317c8c9 KVA |
56 | compatible = "syscon", |
57 | "simple-bus"; | |
72b10ac0 TK |
58 | reg = <0x270 0x240>; |
59 | #address-cells = <1>; | |
60 | #size-cells = <1>; | |
9a5e3f27 | 61 | ranges = <0 0x270 0x240>; |
510c0ffd | 62 | |
72b10ac0 TK |
63 | scm_clocks: clocks { |
64 | #address-cells = <1>; | |
65 | #size-cells = <0>; | |
66 | }; | |
679e3310 | 67 | |
308cfdaf | 68 | pbias_regulator: pbias_regulator@230 { |
737f146f | 69 | compatible = "ti,pbias-omap2", "ti,pbias-omap"; |
72b10ac0 TK |
70 | reg = <0x230 0x4>; |
71 | syscon = <&scm_conf>; | |
72 | pbias_mmc_reg: pbias_mmc_omap2430 { | |
73 | regulator-name = "pbias_mmc_omap2430"; | |
74 | regulator-min-microvolt = <1800000>; | |
75 | regulator-max-microvolt = <3000000>; | |
76 | }; | |
77 | }; | |
78 | }; | |
79 | ||
80 | scm_clockdomains: clockdomains { | |
81 | }; | |
82 | }; | |
cd042fe5 | 83 | |
72b10ac0 TK |
84 | counter32k: counter@20000 { |
85 | compatible = "ti,omap-counter32k"; | |
86 | reg = <0x20000 0x20>; | |
87 | ti,hwmods = "counter_32k"; | |
cd042fe5 B |
88 | }; |
89 | }; | |
90 | ||
423182e3 JH |
91 | gpio1: gpio@4900c000 { |
92 | compatible = "ti,omap2-gpio"; | |
93 | reg = <0x4900c000 0x200>; | |
94 | interrupts = <29>; | |
95 | ti,hwmods = "gpio1"; | |
e4b9b9f3 | 96 | ti,gpio-always-on; |
423182e3 JH |
97 | #gpio-cells = <2>; |
98 | gpio-controller; | |
99 | #interrupt-cells = <2>; | |
100 | interrupt-controller; | |
101 | }; | |
102 | ||
103 | gpio2: gpio@4900e000 { | |
104 | compatible = "ti,omap2-gpio"; | |
105 | reg = <0x4900e000 0x200>; | |
106 | interrupts = <30>; | |
107 | ti,hwmods = "gpio2"; | |
e4b9b9f3 | 108 | ti,gpio-always-on; |
423182e3 JH |
109 | #gpio-cells = <2>; |
110 | gpio-controller; | |
111 | #interrupt-cells = <2>; | |
112 | interrupt-controller; | |
113 | }; | |
114 | ||
115 | gpio3: gpio@49010000 { | |
116 | compatible = "ti,omap2-gpio"; | |
117 | reg = <0x49010000 0x200>; | |
118 | interrupts = <31>; | |
119 | ti,hwmods = "gpio3"; | |
e4b9b9f3 | 120 | ti,gpio-always-on; |
423182e3 JH |
121 | #gpio-cells = <2>; |
122 | gpio-controller; | |
123 | #interrupt-cells = <2>; | |
124 | interrupt-controller; | |
125 | }; | |
126 | ||
127 | gpio4: gpio@49012000 { | |
128 | compatible = "ti,omap2-gpio"; | |
129 | reg = <0x49012000 0x200>; | |
130 | interrupts = <32>; | |
131 | ti,hwmods = "gpio4"; | |
e4b9b9f3 | 132 | ti,gpio-always-on; |
423182e3 JH |
133 | #gpio-cells = <2>; |
134 | gpio-controller; | |
135 | #interrupt-cells = <2>; | |
136 | interrupt-controller; | |
137 | }; | |
138 | ||
139 | gpio5: gpio@480b6000 { | |
140 | compatible = "ti,omap2-gpio"; | |
141 | reg = <0x480b6000 0x200>; | |
142 | interrupts = <33>; | |
143 | ti,hwmods = "gpio5"; | |
144 | #gpio-cells = <2>; | |
145 | gpio-controller; | |
146 | #interrupt-cells = <2>; | |
147 | interrupt-controller; | |
148 | }; | |
149 | ||
1c7dbb55 JH |
150 | gpmc: gpmc@6e000000 { |
151 | compatible = "ti,omap2430-gpmc"; | |
152 | reg = <0x6e000000 0x1000>; | |
153 | #address-cells = <2>; | |
154 | #size-cells = <1>; | |
155 | interrupts = <20>; | |
156 | gpmc,num-cs = <8>; | |
157 | gpmc,num-waitpins = <4>; | |
158 | ti,hwmods = "gpmc"; | |
ffee5bf3 RQ |
159 | interrupt-controller; |
160 | #interrupt-cells = <2>; | |
161 | gpio-controller; | |
162 | #gpio-cells = <2>; | |
1c7dbb55 JH |
163 | }; |
164 | ||
3f187f82 PU |
165 | mcbsp1: mcbsp@48074000 { |
166 | compatible = "ti,omap2430-mcbsp"; | |
167 | reg = <0x48074000 0xff>; | |
168 | reg-names = "mpu"; | |
169 | interrupts = <64>, /* OCP compliant interrupt */ | |
170 | <59>, /* TX interrupt */ | |
171 | <60>, /* RX interrupt */ | |
172 | <61>; /* RX overflow interrupt */ | |
173 | interrupt-names = "common", "tx", "rx", "rx_overflow"; | |
3f187f82 PU |
174 | ti,buffer-size = <128>; |
175 | ti,hwmods = "mcbsp1"; | |
4e4ead73 SG |
176 | dmas = <&sdma 31>, |
177 | <&sdma 32>; | |
178 | dma-names = "tx", "rx"; | |
faa00deb | 179 | status = "disabled"; |
3f187f82 PU |
180 | }; |
181 | ||
182 | mcbsp2: mcbsp@48076000 { | |
183 | compatible = "ti,omap2430-mcbsp"; | |
184 | reg = <0x48076000 0xff>; | |
185 | reg-names = "mpu"; | |
186 | interrupts = <16>, /* OCP compliant interrupt */ | |
187 | <62>, /* TX interrupt */ | |
188 | <63>; /* RX interrupt */ | |
189 | interrupt-names = "common", "tx", "rx"; | |
3f187f82 PU |
190 | ti,buffer-size = <128>; |
191 | ti,hwmods = "mcbsp2"; | |
4e4ead73 SG |
192 | dmas = <&sdma 33>, |
193 | <&sdma 34>; | |
194 | dma-names = "tx", "rx"; | |
faa00deb | 195 | status = "disabled"; |
3f187f82 PU |
196 | }; |
197 | ||
198 | mcbsp3: mcbsp@4808c000 { | |
199 | compatible = "ti,omap2430-mcbsp"; | |
200 | reg = <0x4808c000 0xff>; | |
201 | reg-names = "mpu"; | |
202 | interrupts = <17>, /* OCP compliant interrupt */ | |
203 | <89>, /* TX interrupt */ | |
204 | <90>; /* RX interrupt */ | |
205 | interrupt-names = "common", "tx", "rx"; | |
3f187f82 PU |
206 | ti,buffer-size = <128>; |
207 | ti,hwmods = "mcbsp3"; | |
4e4ead73 SG |
208 | dmas = <&sdma 17>, |
209 | <&sdma 18>; | |
210 | dma-names = "tx", "rx"; | |
faa00deb | 211 | status = "disabled"; |
3f187f82 PU |
212 | }; |
213 | ||
214 | mcbsp4: mcbsp@4808e000 { | |
215 | compatible = "ti,omap2430-mcbsp"; | |
216 | reg = <0x4808e000 0xff>; | |
217 | reg-names = "mpu"; | |
218 | interrupts = <18>, /* OCP compliant interrupt */ | |
219 | <54>, /* TX interrupt */ | |
220 | <55>; /* RX interrupt */ | |
221 | interrupt-names = "common", "tx", "rx"; | |
3f187f82 PU |
222 | ti,buffer-size = <128>; |
223 | ti,hwmods = "mcbsp4"; | |
4e4ead73 SG |
224 | dmas = <&sdma 19>, |
225 | <&sdma 20>; | |
226 | dma-names = "tx", "rx"; | |
faa00deb | 227 | status = "disabled"; |
3f187f82 PU |
228 | }; |
229 | ||
230 | mcbsp5: mcbsp@48096000 { | |
231 | compatible = "ti,omap2430-mcbsp"; | |
232 | reg = <0x48096000 0xff>; | |
233 | reg-names = "mpu"; | |
234 | interrupts = <19>, /* OCP compliant interrupt */ | |
235 | <81>, /* TX interrupt */ | |
236 | <82>; /* RX interrupt */ | |
237 | interrupt-names = "common", "tx", "rx"; | |
3f187f82 PU |
238 | ti,buffer-size = <128>; |
239 | ti,hwmods = "mcbsp5"; | |
4e4ead73 SG |
240 | dmas = <&sdma 21>, |
241 | <&sdma 22>; | |
242 | dma-names = "tx", "rx"; | |
faa00deb | 243 | status = "disabled"; |
3f187f82 | 244 | }; |
fab8ad0b | 245 | |
467f4bd2 TL |
246 | mmc1: mmc@4809c000 { |
247 | compatible = "ti,omap2-hsmmc"; | |
248 | reg = <0x4809c000 0x200>; | |
249 | interrupts = <83>; | |
250 | ti,hwmods = "mmc1"; | |
251 | ti,dual-volt; | |
252 | dmas = <&sdma 61>, <&sdma 62>; | |
253 | dma-names = "tx", "rx"; | |
cd042fe5 | 254 | pbias-supply = <&pbias_mmc_reg>; |
467f4bd2 TL |
255 | }; |
256 | ||
257 | mmc2: mmc@480b4000 { | |
258 | compatible = "ti,omap2-hsmmc"; | |
259 | reg = <0x480b4000 0x200>; | |
260 | interrupts = <86>; | |
261 | ti,hwmods = "mmc2"; | |
262 | dmas = <&sdma 47>, <&sdma 48>; | |
263 | dma-names = "tx", "rx"; | |
264 | }; | |
265 | ||
4fe5bd5d SA |
266 | mailbox: mailbox@48094000 { |
267 | compatible = "ti,omap2-mailbox"; | |
268 | reg = <0x48094000 0x200>; | |
269 | interrupts = <26>; | |
270 | ti,hwmods = "mailbox"; | |
24df0453 | 271 | #mbox-cells = <1>; |
41ffada1 SA |
272 | ti,mbox-num-users = <4>; |
273 | ti,mbox-num-fifos = <6>; | |
d27704d1 SA |
274 | mbox_dsp: dsp { |
275 | ti,mbox-tx = <0 0 0>; | |
276 | ti,mbox-rx = <1 0 0>; | |
277 | }; | |
4fe5bd5d SA |
278 | }; |
279 | ||
fab8ad0b | 280 | timer1: timer@49018000 { |
002e1ec5 | 281 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
282 | reg = <0x49018000 0x400>; |
283 | interrupts = <37>; | |
284 | ti,hwmods = "timer1"; | |
285 | ti,timer-alwon; | |
286 | }; | |
467f4bd2 | 287 | |
cc893871 | 288 | mcspi3: spi@480b8000 { |
467f4bd2 TL |
289 | compatible = "ti,omap2-mcspi"; |
290 | ti,hwmods = "mcspi3"; | |
291 | reg = <0x480b8000 0x100>; | |
292 | interrupts = <91>; | |
293 | dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; | |
294 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
295 | }; | |
296 | ||
297 | usb_otg_hs: usb_otg_hs@480ac000 { | |
298 | compatible = "ti,omap2-musb"; | |
299 | ti,hwmods = "usb_otg_hs"; | |
300 | reg = <0x480ac000 0x1000>; | |
301 | interrupts = <93>; | |
302 | }; | |
303 | ||
304 | wd_timer2: wdt@49016000 { | |
305 | compatible = "ti,omap2-wdt"; | |
306 | ti,hwmods = "wd_timer2"; | |
307 | reg = <0x49016000 0x80>; | |
308 | }; | |
3f187f82 PU |
309 | }; |
310 | }; | |
467f4bd2 TL |
311 | |
312 | &i2c1 { | |
313 | compatible = "ti,omap2430-i2c"; | |
314 | }; | |
315 | ||
316 | &i2c2 { | |
317 | compatible = "ti,omap2430-i2c"; | |
318 | }; | |
69a1e7a1 TK |
319 | |
320 | /include/ "omap24xx-clocks.dtsi" | |
321 | /include/ "omap2430-clocks.dtsi" |