[linux-block.git] / arch / arm / boot / dts / nxp / imx / imx6q-bx50v3.dtsi

/*
 * Copyright 2015 Timesys Corporation.
 * Copyright 2015 General Electric Company
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "imx6q-ba16.dtsi"

/ {
	mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <22000000>;
	};

	gpio-poweroff {
		compatible = "gpio-poweroff";
		gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
		status = "okay";
	};

	reg_wl18xx_vmmc: regulator-wl18xx {
		compatible = "regulator-fixed";
		regulator-name = "vwl1807";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};

	reg_wlan: regulator-wlan {
		compatible = "regulator-fixed";
		regulator-name = "3P3V_wlan";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
	};

	sound {
		compatible = "fsl,imx6q-ba16-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6q-ba16-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};

	aliases {
		mdio-gpio0 = &mdio0;
	};

	mdio0: mdio-gpio {
		compatible = "virtual,mdio-gpio";
		gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
			<&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */

		#address-cells = <1>;
		#size-cells = <0>;

		switch: switch@0 {
			compatible = "marvell,mv88e6085"; /* 88e6240*/
			reg = <0>;

			interrupt-parent = <&gpio2>;
			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
			interrupt-controller;
			#interrupt-cells = <2>;

			switch_ports: ports {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			mdio {
				#address-cells = <1>;
				#size-cells = <0>;

				switchphy0: switchphy@0 {
					reg = <0>;
					interrupt-parent = <&switch>;
					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
				};

				switchphy1: switchphy@1 {
					reg = <1>;
					interrupt-parent = <&switch>;
					interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
				};

				switchphy2: switchphy@2 {
					reg = <2>;
					interrupt-parent = <&switch>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
				};

				switchphy3: switchphy@3 {
					reg = <3>;
					interrupt-parent = <&switch>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
				};

				switchphy4: switchphy@4 {
					reg = <4>;
					interrupt-parent = <&switch>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
				};
			};
		};
	};
};

&ecspi5 {
	cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi5>;
	status = "okay";

	m25_eeprom: flash@0 {
		compatible = "atmel,at25";
		spi-max-frequency = <10000000>;
		size = <0x8000>;
		pagesize = <64>;
		reg = <0>;
		address-width = <16>;
	};
};

&i2c1 {
	pinctrl-names = "default", "gpio";
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	pca9547: mux@70 {
		compatible = "nxp,pca9547";
		reg = <0x70>;
		#address-cells = <1>;
		#size-cells = <0>;

		mux1_i2c1: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0>;

			ads7830: ads7830@48 {
				compatible = "ti,ads7830";
				reg = <0x48>;
			};

			mma8453: mma8453@1c {
				compatible = "fsl,mma8453";
				reg = <0x1c>;
			};
		};

		mux1_i2c2: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;

			eeprom: eeprom@50 {
				compatible = "atmel,24c08";
				reg = <0x50>;
			};

			mpl3115: mpl3115@60 {
				compatible = "fsl,mpl3115";
				reg = <0x60>;
			};
		};

		mux1_i2c3: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x2>;
		};

		mux1_i2c4: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;

			sgtl5000: codec@a {
				compatible = "fsl,sgtl5000";
				reg = <0x0a>;
				#sound-dai-cells = <0>;
				clocks = <&mclk>;
				VDDA-supply = <&reg_1p8v>;
				VDDIO-supply = <&reg_3p3v>;
			};
		};

		mux1_i2c5: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;

			pca9539: pca9539@74 {
				compatible = "nxp,pca9539";
				reg = <0x74>;
				gpio-controller;
				#gpio-cells = <2>;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupt-parent = <&gpio2>;
				interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

				P12-hog {
					gpio-hog;
					gpios = <10 0>;
					output-low;
					line-name = "PCA9539-P12";
				};

				P13-hog {
					gpio-hog;
					gpios = <11 0>;
					output-low;
					line-name = "PCA9539-P13";
				};

				P14-hog {
					gpio-hog;
					gpios = <12 0>;
					output-low;
					line-name = "PCA9539-P14";
				};

				P15-hog {
					gpio-hog;
					gpios = <13 0>;
					output-low;
					line-name = "PCA9539-P15";
				};

				P16-hog {
					gpio-hog;
					gpios = <14 0>;
					output-low;
					line-name = "PCA9539-P16";
				};

				P17-hog {
					gpio-hog;
					gpios = <15 0>;
					output-low;
					line-name = "PCA9539-P17";
				};
			};
		};

		mux1_i2c6: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x5>;
		};

		mux1_i2c7: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x6>;
		};

		mux1_i2c8: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x7>;
		};
	};
};

&i2c2 {
	pinctrl-names = "default", "gpio";
	pinctrl-1 = <&pinctrl_i2c2_gpio>;
	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};

&i2c3 {
	pinctrl-names = "default", "gpio";
	pinctrl-1 = <&pinctrl_i2c3_gpio>;
	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};

&iomuxc {
	pinctrl_i2c1_gpio: i2c1gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x1b0b0
			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x1b0b0
		>;
	};

	pinctrl_i2c2_gpio: i2c2gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x1b0b0
			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13	0x1b0b0
		>;
	};

	pinctrl_i2c3_gpio: i2c3gpiogrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__GPIO1_IO03	0x1b0b0
			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x1b0b0
		>;
	};
};

&pmu {
	secure-reg-access;
};

&usdhc2 {
	status = "disabled";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <4>;
	vmmc-supply = <&reg_wl18xx_vmmc>;
	no-1-8-v;
	non-removable;
	wakeup-source;
	keep-power-in-suspend;
	cap-power-off-card;
	max-frequency = <25000000>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	wlcore: wlcore@2 {
		compatible = "ti,wl1837";
		reg = <2>;
		interrupt-parent = <&gpio2>;
		interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
		tcxo-clock-frequency = <26000000>;
	};
};

&pcie {
	/* Synopsys, Inc. Device */
	pci_root: root@0,0 {
		compatible = "pci16c3,abcd";
		reg = <0x00000000 0 0 0 0>;

		#address-cells = <3>;
		#size-cells = <2>;
	};
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
			  <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
			  <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
			  <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
			  <&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
				 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
				 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
				 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
				 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
};
Commit	Line	Data
226d16c8 JW	1	/*
	2	* Copyright 2015 Timesys Corporation.
	3	* Copyright 2015 General Electric Company
	4	*
	5	* This file is dual-licensed: you can use it either under the terms
	6	* of the GPL or the X11 license, at your option. Note that this dual
	7	* licensing only applies to this file, and not this project as a
	8	* whole.
	9	*
	10	* a) This file is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
13283626	14	* This file is distributed in the hope that it will be useful,
226d16c8 JW	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
13283626	19	* Or, alternatively,
226d16c8 JW	20	*
	21	* b) Permission is hereby granted, free of charge, to any person
	22	* obtaining a copy of this software and associated documentation
	23	* files (the "Software"), to deal in the Software without
13283626	24	* restriction, including without limitation the rights to use,
226d16c8 JW	25	* copy, modify, merge, publish, distribute, sublicense, and/or
	26	* sell copies of the Software, and to permit persons to whom the
	27	* Software is furnished to do so, subject to the following
	28	* conditions:
	29	*
	30	* The above copyright notice and this permission notice shall be
	31	* included in all copies or substantial portions of the Software.
	32	*
13283626	33	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
226d16c8 JW	34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
13283626	37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
226d16c8 JW	38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	* OTHER DEALINGS IN THE SOFTWARE.
	41	*/
	42
	43	#include "imx6q-ba16.dtsi"
	44
	45	/ {
8799b5d5 SG	46	mclk: clock-mclk {
	47	compatible = "fixed-clock";
	48	#clock-cells = <0>;
	49	clock-frequency = <22000000>;
226d16c8 JW	50	};
226d16c8 JW	51
fe4b467d KL	52	gpio-poweroff {
	53	compatible = "gpio-poweroff";
	54	gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
	55	status = "okay";
	56	};
	57
226d16c8 JW	58	reg_wl18xx_vmmc: regulator-wl18xx {
	59	compatible = "regulator-fixed";
	60	regulator-name = "vwl1807";
	61	regulator-min-microvolt = <3300000>;
	62	regulator-max-microvolt = <3300000>;
	63	gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
	64	startup-delay-us = <70000>;
	65	enable-active-high;
	66	};
	67
	68	reg_wlan: regulator-wlan {
	69	compatible = "regulator-fixed";
	70	regulator-name = "3P3V_wlan";
	71	regulator-min-microvolt = <3300000>;
	72	regulator-max-microvolt = <3300000>;
	73	regulator-always-on;
	74	regulator-boot-on;
	75	gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
	76	};
	77
	78	sound {
	79	compatible = "fsl,imx6q-ba16-sgtl5000",
	80	"fsl,imx-audio-sgtl5000";
	81	model = "imx6q-ba16-sgtl5000";
	82	ssi-controller = <&ssi1>;
	83	audio-codec = <&sgtl5000>;
	84	audio-routing =
	85	"MIC_IN", "Mic Jack",
	86	"Mic Jack", "Mic Bias",
	87	"LINE_IN", "Line In Jack",
	88	"Headphone Jack", "HP_OUT";
	89	mux-int-port = <1>;
	90	mux-ext-port = <4>;
	91	};
e26dead4 SR	92
	93	aliases {
	94	mdio-gpio0 = &mdio0;
	95	};
	96
	97	mdio0: mdio-gpio {
	98	compatible = "virtual,mdio-gpio";
	99	gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
	100	<&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
	101
	102	#address-cells = <1>;
	103	#size-cells = <0>;
	104
675abeb9	105	switch: switch@0 {
e26dead4	106	compatible = "marvell,mv88e6085"; /* 88e6240*/
e26dead4 SR	107	reg = <0>;
e26dead4 SR	108
675abeb9 SR	109	interrupt-parent = <&gpio2>;
	110	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
	111	interrupt-controller;
	112	#interrupt-cells = <2>;
	113
e26dead4 SR	114	switch_ports: ports {
	115	#address-cells = <1>;
	116	#size-cells = <0>;
	117	};
	118
	119	mdio {
	120	#address-cells = <1>;
	121	#size-cells = <0>;
	122
	123	switchphy0: switchphy@0 {
	124	reg = <0>;
675abeb9 SR	125	interrupt-parent = <&switch>;
675abeb9 SR	126	interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
e26dead4 SR	127	};
	128
	129	switchphy1: switchphy@1 {
	130	reg = <1>;
675abeb9 SR	131	interrupt-parent = <&switch>;
675abeb9 SR	132	interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
e26dead4 SR	133	};
	134
	135	switchphy2: switchphy@2 {
	136	reg = <2>;
675abeb9 SR	137	interrupt-parent = <&switch>;
675abeb9 SR	138	interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
e26dead4 SR	139	};
	140
	141	switchphy3: switchphy@3 {
	142	reg = <3>;
675abeb9 SR	143	interrupt-parent = <&switch>;
675abeb9 SR	144	interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
e26dead4 SR	145	};
	146
	147	switchphy4: switchphy@4 {
	148	reg = <4>;
675abeb9 SR	149	interrupt-parent = <&switch>;
675abeb9 SR	150	interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
e26dead4 SR	151	};
	152	};
	153	};
	154	};
226d16c8 JW	155	};
	156
	157	&ecspi5 {
2bfdd113	158	cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
226d16c8 JW	159	pinctrl-names = "default";
	160	pinctrl-0 = <&pinctrl_ecspi5>;
	161	status = "okay";
	162
ba9fe460	163	m25_eeprom: flash@0 {
226d16c8	164	compatible = "atmel,at25";
3592374d	165	spi-max-frequency = <10000000>;
226d16c8 JW	166	size = <0x8000>;
	167	pagesize = <64>;
	168	reg = <0>;
	169	address-width = <16>;
	170	};
	171	};
	172
	173	&i2c1 {
b3766c51 JA	174	pinctrl-names = "default", "gpio";
b3766c51 JA	175	pinctrl-1 = <&pinctrl_i2c1_gpio>;
4ec79ac7 SR	176	sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
4ec79ac7 SR	177	scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
b3766c51	178
226d16c8 JW	179	pca9547: mux@70 {
	180	compatible = "nxp,pca9547";
	181	reg = <0x70>;
	182	#address-cells = <1>;
	183	#size-cells = <0>;
	184
	185	mux1_i2c1: i2c@0 {
	186	#address-cells = <1>;
	187	#size-cells = <0>;
	188	reg = <0x0>;
	189
	190	ads7830: ads7830@48 {
	191	compatible = "ti,ads7830";
	192	reg = <0x48>;
	193	};
	194
	195	mma8453: mma8453@1c {
	196	compatible = "fsl,mma8453";
	197	reg = <0x1c>;
	198	};
	199	};
	200
	201	mux1_i2c2: i2c@1 {
	202	#address-cells = <1>;
	203	#size-cells = <0>;
	204	reg = <0x1>;
	205
	206	eeprom: eeprom@50 {
	207	compatible = "atmel,24c08";
	208	reg = <0x50>;
	209	};
	210
	211	mpl3115: mpl3115@60 {
	212	compatible = "fsl,mpl3115";
	213	reg = <0x60>;
	214	};
	215	};
	216
	217	mux1_i2c3: i2c@2 {
	218	#address-cells = <1>;
	219	#size-cells = <0>;
	220	reg = <0x2>;
	221	};
	222
	223	mux1_i2c4: i2c@3 {
	224	#address-cells = <1>;
	225	#size-cells = <0>;
	226	reg = <0x3>;
	227
8dccafaa	228	sgtl5000: codec@a {
226d16c8 JW	229	compatible = "fsl,sgtl5000";
226d16c8 JW	230	reg = <0x0a>;
d54bcc3a	231	#sound-dai-cells = <0>;
226d16c8 JW	232	clocks = <&mclk>;
	233	VDDA-supply = <&reg_1p8v>;
	234	VDDIO-supply = <&reg_3p3v>;
	235	};
	236	};
	237
	238	mux1_i2c5: i2c@4 {
	239	#address-cells = <1>;
	240	#size-cells = <0>;
	241	reg = <0x4>;
	242
	243	pca9539: pca9539@74 {
	244	compatible = "nxp,pca9539";
	245	reg = <0x74>;
	246	gpio-controller;
	247	#gpio-cells = <2>;
96fd598e	248	#interrupt-cells = <2>;
226d16c8 JW	249	interrupt-controller;
	250	interrupt-parent = <&gpio2>;
	251	interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
118e81cb	252
dcdd4f2e	253	P12-hog {
118e81cb KL	254	gpio-hog;
	255	gpios = <10 0>;
	256	output-low;
	257	line-name = "PCA9539-P12";
	258	};
	259
dcdd4f2e	260	P13-hog {
118e81cb KL	261	gpio-hog;
	262	gpios = <11 0>;
	263	output-low;
	264	line-name = "PCA9539-P13";
	265	};
	266
dcdd4f2e	267	P14-hog {
118e81cb KL	268	gpio-hog;
	269	gpios = <12 0>;
	270	output-low;
	271	line-name = "PCA9539-P14";
	272	};
	273
dcdd4f2e	274	P15-hog {
118e81cb KL	275	gpio-hog;
	276	gpios = <13 0>;
	277	output-low;
	278	line-name = "PCA9539-P15";
	279	};
	280
dcdd4f2e	281	P16-hog {
118e81cb KL	282	gpio-hog;
	283	gpios = <14 0>;
	284	output-low;
	285	line-name = "PCA9539-P16";
	286	};
	287
dcdd4f2e	288	P17-hog {
118e81cb KL	289	gpio-hog;
	290	gpios = <15 0>;
	291	output-low;
	292	line-name = "PCA9539-P17";
	293	};
226d16c8 JW	294	};
	295	};
	296
	297	mux1_i2c6: i2c@5 {
	298	#address-cells = <1>;
	299	#size-cells = <0>;
	300	reg = <0x5>;
	301	};
	302
	303	mux1_i2c7: i2c@6 {
	304	#address-cells = <1>;
	305	#size-cells = <0>;
	306	reg = <0x6>;
	307	};
	308
	309	mux1_i2c8: i2c@7 {
	310	#address-cells = <1>;
	311	#size-cells = <0>;
	312	reg = <0x7>;
	313	};
	314	};
	315	};
	316
b3766c51 JA	317	&i2c2 {
	318	pinctrl-names = "default", "gpio";
	319	pinctrl-1 = <&pinctrl_i2c2_gpio>;
4ec79ac7 SR	320	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
4ec79ac7 SR	321	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
b3766c51 JA	322	};
	323
	324	&i2c3 {
	325	pinctrl-names = "default", "gpio";
	326	pinctrl-1 = <&pinctrl_i2c3_gpio>;
4ec79ac7 SR	327	sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
4ec79ac7 SR	328	scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
b3766c51 JA	329	};
	330
	331	&iomuxc {
	332	pinctrl_i2c1_gpio: i2c1gpiogrp {
	333	fsl,pins = <
	334	MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
	335	MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
	336	>;
	337	};
	338
	339	pinctrl_i2c2_gpio: i2c2gpiogrp {
	340	fsl,pins = <
	341	MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
	342	MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
	343	>;
	344	};
	345
	346	pinctrl_i2c3_gpio: i2c3gpiogrp {
	347	fsl,pins = <
	348	MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
	349	MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
	350	>;
	351	};
	352	};
	353
10fff259 PST	354	&pmu {
	355	secure-reg-access;
	356	};
	357
9e5b2e9b IR	358	&usdhc2 {
	359	status = "disabled";
	360	};
	361
226d16c8 JW	362	&usdhc4 {
	363	pinctrl-names = "default";
	364	pinctrl-0 = <&pinctrl_usdhc4>;
	365	bus-width = <4>;
	366	vmmc-supply = <&reg_wl18xx_vmmc>;
	367	no-1-8-v;
	368	non-removable;
	369	wakeup-source;
	370	keep-power-in-suspend;
	371	cap-power-off-card;
	372	max-frequency = <25000000>;
	373	#address-cells = <1>;
	374	#size-cells = <0>;
	375	status = "okay";
	376
	377	wlcore: wlcore@2 {
	378	compatible = "ti,wl1837";
	379	reg = <2>;
	380	interrupt-parent = <&gpio2>;
	381	interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
	382	tcxo-clock-frequency = <26000000>;
	383	};
	384	};
e26dead4 SR	385
	386	&pcie {
	387	/* Synopsys, Inc. Device */
	388	pci_root: root@0,0 {
	389	compatible = "pci16c3,abcd";
	390	reg = <0x00000000 0 0 0 0>;
	391
	392	#address-cells = <3>;
	393	#size-cells = <2>;
e26dead4 SR	394	};
e26dead4 SR	395	};
665e7c73 RB	396
	397	&clks {
	398	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
	399	<&clks IMX6QDL_CLK_LDB_DI1_SEL>,
	400	<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
	401	<&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
	402	<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
	403	<&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
	404	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
	405	<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
	406	<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
	407	<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
	408	<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
	409	<&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
	410	};