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1 | /* |
2 | * Copyright 2015 Endless Mobile, Inc. | |
3 | * Author: Carlo Caione <carlo@endlessm.com> | |
4 | * | |
5 | * This file is dual-licensed: you can use it either under the terms | |
6 | * of the GPL or the X11 license, at your option. Note that this dual | |
7 | * licensing only applies to this file, and not this project as a | |
8 | * whole. | |
9 | * | |
10 | * a) This library is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of the | |
13 | * License, or (at your option) any later version. | |
14 | * | |
15 | * This library is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
22 | * | |
23 | * Or, alternatively, | |
24 | * | |
25 | * b) Permission is hereby granted, free of charge, to any person | |
26 | * obtaining a copy of this software and associated documentation | |
27 | * files (the "Software"), to deal in the Software without | |
28 | * restriction, including without limitation the rights to use, | |
29 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
30 | * sell copies of the Software, and to permit persons to whom the | |
31 | * Software is furnished to do so, subject to the following | |
32 | * conditions: | |
33 | * | |
34 | * The above copyright notice and this permission notice shall be | |
35 | * included in all copies or substantial portions of the Software. | |
36 | * | |
37 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
38 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
39 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
40 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
41 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
42 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
43 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
44 | * OTHER DEALINGS IN THE SOFTWARE. | |
45 | */ | |
46 | ||
47 | #include <dt-bindings/clock/meson8b-clkc.h> | |
48 | #include <dt-bindings/gpio/meson8b-gpio.h> | |
cad059c6 | 49 | #include <dt-bindings/reset/amlogic,meson8b-reset.h> |
f44135e1 | 50 | #include "meson.dtsi" |
4a69fcd3 CC |
51 | |
52 | / { | |
4a69fcd3 CC |
53 | cpus { |
54 | #address-cells = <1>; | |
55 | #size-cells = <0>; | |
56 | ||
57 | cpu@200 { | |
58 | device_type = "cpu"; | |
59 | compatible = "arm,cortex-a5"; | |
60 | next-level-cache = <&L2>; | |
61 | reg = <0x200>; | |
62 | }; | |
63 | ||
64 | cpu@201 { | |
65 | device_type = "cpu"; | |
66 | compatible = "arm,cortex-a5"; | |
67 | next-level-cache = <&L2>; | |
68 | reg = <0x201>; | |
69 | }; | |
70 | ||
71 | cpu@202 { | |
72 | device_type = "cpu"; | |
73 | compatible = "arm,cortex-a5"; | |
74 | next-level-cache = <&L2>; | |
75 | reg = <0x202>; | |
76 | }; | |
77 | ||
78 | cpu@203 { | |
79 | device_type = "cpu"; | |
80 | compatible = "arm,cortex-a5"; | |
81 | next-level-cache = <&L2>; | |
82 | reg = <0x203>; | |
83 | }; | |
84 | }; | |
f44135e1 | 85 | }; /* end of / */ |
4a69fcd3 | 86 | |
f44135e1 MB |
87 | &aobus { |
88 | pinctrl_aobus: pinctrl@84 { | |
89 | compatible = "amlogic,meson8b-aobus-pinctrl"; | |
90 | reg = <0x84 0xc>; | |
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91 | #address-cells = <1>; |
92 | #size-cells = <1>; | |
93 | ranges; | |
94 | ||
f44135e1 MB |
95 | gpio_ao: ao-bank@14 { |
96 | reg = <0x14 0x4>, | |
97 | <0x2c 0x4>, | |
98 | <0x24 0x8>; | |
99 | reg-names = "mux", "pull", "gpio"; | |
100 | gpio-controller; | |
101 | #gpio-cells = <2>; | |
102 | gpio-ranges = <&pinctrl_aobus 0 130 16>; | |
4a69fcd3 CC |
103 | }; |
104 | ||
f44135e1 MB |
105 | uart_ao_a_pins: uart_ao_a { |
106 | mux { | |
107 | groups = "uart_tx_ao_a", "uart_rx_ao_a"; | |
108 | function = "uart_ao"; | |
109 | }; | |
e9c478a9 | 110 | }; |
f44135e1 MB |
111 | }; |
112 | }; | |
e9c478a9 | 113 | |
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114 | &cbus { |
115 | clkc: clock-controller@4000 { | |
116 | #clock-cells = <1>; | |
117 | compatible = "amlogic,meson8b-clkc"; | |
118 | reg = <0x8000 0x4>, <0x4000 0x460>; | |
119 | }; | |
4a69fcd3 | 120 | |
f44135e1 MB |
121 | reset: reset-controller@4404 { |
122 | compatible = "amlogic,meson8b-reset"; | |
123 | reg = <0x4404 0x20>; | |
124 | #reset-cells = <1>; | |
125 | }; | |
4a69fcd3 | 126 | |
f44135e1 MB |
127 | pwm_ab: pwm@8550 { |
128 | compatible = "amlogic,meson8b-pwm"; | |
129 | reg = <0x8550 0x10>; | |
130 | #pwm-cells = <3>; | |
131 | status = "disabled"; | |
132 | }; | |
4a69fcd3 | 133 | |
f44135e1 MB |
134 | pwm_cd: pwm@8650 { |
135 | compatible = "amlogic,meson8b-pwm"; | |
136 | reg = <0x8650 0x10>; | |
137 | #pwm-cells = <3>; | |
138 | status = "disabled"; | |
139 | }; | |
4a69fcd3 | 140 | |
f44135e1 MB |
141 | pwm_ef: pwm@86c0 { |
142 | compatible = "amlogic,meson8b-pwm"; | |
143 | reg = <0x86c0 0x10>; | |
144 | #pwm-cells = <3>; | |
145 | status = "disabled"; | |
146 | }; | |
4a69fcd3 | 147 | |
f44135e1 MB |
148 | wdt: watchdog@9900 { |
149 | compatible = "amlogic,meson8b-wdt"; | |
150 | reg = <0x9900 0x8>; | |
151 | interrupts = <0 0 1>; | |
152 | }; | |
4a69fcd3 | 153 | |
f44135e1 MB |
154 | pinctrl_cbus: pinctrl@9880 { |
155 | compatible = "amlogic,meson8b-cbus-pinctrl"; | |
156 | reg = <0x9880 0x10>; | |
157 | #address-cells = <1>; | |
158 | #size-cells = <1>; | |
159 | ranges; | |
a29c830a | 160 | |
f44135e1 MB |
161 | gpio: banks@80b0 { |
162 | reg = <0x80b0 0x28>, | |
163 | <0x80e8 0x18>, | |
164 | <0x8120 0x18>, | |
165 | <0x8030 0x38>; | |
166 | reg-names = "mux", "pull", "pull-enable", "gpio"; | |
167 | gpio-controller; | |
168 | #gpio-cells = <2>; | |
169 | gpio-ranges = <&pinctrl_cbus 0 0 130>; | |
a29c830a | 170 | }; |
f44135e1 MB |
171 | }; |
172 | }; | |
a29c830a | 173 | |
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174 | &hwrng { |
175 | compatible = "amlogic,meson8b-rng", "amlogic,meson-rng"; | |
176 | clocks = <&clkc CLKID_RNG0>; | |
177 | clock-names = "core"; | |
178 | }; | |
179 | ||
bbe5b23d CC |
180 | &L2 { |
181 | arm,data-latency = <3 3 3>; | |
182 | arm,tag-latency = <2 2 2>; | |
183 | arm,filter-ranges = <0x100000 0xc0000000>; | |
184 | }; | |
185 | ||
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186 | &saradc { |
187 | compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; | |
188 | clocks = <&clkc CLKID_XTAL>, | |
189 | <&clkc CLKID_SAR_ADC>, | |
190 | <&clkc CLKID_SANA>; | |
191 | clock-names = "clkin", "core", "sana"; | |
192 | }; | |
193 | ||
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194 | &uart_AO { |
195 | clocks = <&clkc CLKID_CLK81>; | |
196 | }; | |
a29c830a | 197 | |
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198 | &uart_A { |
199 | clocks = <&clkc CLKID_CLK81>; | |
200 | }; | |
b60e1157 | 201 | |
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202 | &uart_B { |
203 | clocks = <&clkc CLKID_CLK81>; | |
204 | }; | |
4a69fcd3 | 205 | |
f44135e1 MB |
206 | &uart_C { |
207 | clocks = <&clkc CLKID_CLK81>; | |
208 | }; | |
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209 | |
210 | &usb0 { | |
211 | compatible = "amlogic,meson8b-usb", "snps,dwc2"; | |
212 | clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; | |
213 | clock-names = "otg"; | |
214 | }; | |
215 | ||
216 | &usb1 { | |
217 | compatible = "amlogic,meson8b-usb", "snps,dwc2"; | |
218 | clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; | |
219 | clock-names = "otg"; | |
220 | }; | |
221 | ||
222 | &usb0_phy { | |
223 | compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; | |
224 | clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; | |
225 | clock-names = "usb_general", "usb"; | |
226 | resets = <&reset RESET_USB_OTG>; | |
227 | }; | |
228 | ||
229 | &usb1_phy { | |
230 | compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; | |
231 | clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; | |
232 | clock-names = "usb_general", "usb"; | |
233 | resets = <&reset RESET_USB_OTG>; | |
234 | }; |