[linux-2.6-block.git] / arch / arm / boot / dts / logicpd-som-lv.dtsi

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/input/input.h>

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0>;
	};

	wl12xx_vmmc: wl12xx_vmmc {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 3 0>;   /* gpio_3 */
		startup-delay-us = <70000>;
		enable-active-high;
		vin-supply = <&vmmc2>;
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
		#phy-cells = <0>;
	};

	/* fixed 26MHz oscillator */
	hfclk_26m: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,mt29f4g16abbda3w";
		nand-bus-width = <16>;
		ti,nand-ecc-opt = "bch8";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,device-width = <2>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
		clocks = <&hfclk_26m>;
		clock-names = "fck";
		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	clock-frequency = <400000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
	clock-frequency = <400000>;

	touchscreen: tsc2004@48 {
		compatible = "ti,tsc2004";
		reg = <0x48>;
		vio-supply = <&vaux1>;
		pinctrl-names = "default";
		pinctrl-0 = <&tsc2004_pins>;
		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */

		touchscreen-fuzz-x = <4>;
		touchscreen-fuzz-y = <7>;
		touchscreen-fuzz-pressure = <2>;
		touchscreen-size-x = <4096>;
		touchscreen-size-y = <4096>;
		touchscreen-max-pressure = <2048>;

		ti,x-plate-ohms = <280>;
		ti,esd-recovery-timeout-ms = <8000>;
	};
};

&mmc3 {
	interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
	pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
	pinctrl-names = "default";
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1273";
		reg = <2>;
		interrupt-parent = <&gpio1>;
		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
		ref-clock-frequency = <26000000>;
	};
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};


&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_pins>;

	mmc3_pins: pinmux_mm3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat4.sdmmc3_dat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat5.sdmmc3_dat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat2 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat3 */
			OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs2.sdmmc_clk */
		>;
	};
	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
		>;
	};
	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* GPIO_162,BT_EN */
		>;
	};
	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
		>;
	};

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	hsusb_otg_pins: pinmux_hsusb_otg_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
		>;
	};

	tsc2004_pins: pinmux_tsc2004_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)	/* mcbsp4_dr.gpio_153 */
		>;
	};
};

&omap3_pmx_wkup {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_reset_pin>;
	hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)	/* sys_boot2.gpio_4 */
		>;
	};
	wl127x_gpio: pinmux_wl127x_gpio_pin {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4)		/* sys_boot0.gpio_2 */
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)	/* sys_boot1.gpio_3 */
		>;
	};
	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)	/* i2c2_scl */
			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)	/* i2c2_sda */
		>;
	};
	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
		>;
	};
};

&uart2 {
	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&twl {
	twl_power: power {
		compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
		ti,use_poweroff;
	};
};

&twl_gpio {
	ti,use-leds;
};
Commit	Line	Data
ab8dd3ae AF	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License version 2 as
	4	* published by the Free Software Foundation.
	5	*/
	6
	7	#include <dt-bindings/input/input.h>
	8
	9	/ {
	10	cpus {
	11	cpu@0 {
	12	cpu0-supply = <&vcc>;
	13	};
	14	};
	15
80513a2b AF	16	memory@80000000 {
	17	device_type = "memory";
	18	reg = <0x80000000 0>;
	19	};
	20
ab8dd3ae AF	21	wl12xx_vmmc: wl12xx_vmmc {
	22	compatible = "regulator-fixed";
	23	regulator-name = "vwl1271";
	24	regulator-min-microvolt = <1800000>;
	25	regulator-max-microvolt = <1800000>;
	26	gpio = <&gpio1 3 0>; /* gpio_3 */
	27	startup-delay-us = <70000>;
	28	enable-active-high;
	29	vin-supply = <&vmmc2>;
	30	};
89077c71 AF	31
	32	/* HS USB Host PHY on PORT 1 */
	33	hsusb2_phy: hsusb2_phy {
	34	compatible = "usb-nop-xceiv";
	35	reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
f568f6f5	36	#phy-cells = <0>;
89077c71	37	};
8eb43b0a AF	38
	39	/* fixed 26MHz oscillator */
	40	hfclk_26m: oscillator {
	41	#clock-cells = <0>;
	42	compatible = "fixed-clock";
	43	clock-frequency = <26000000>;
	44	};
ab8dd3ae AF	45	};
	46
	47	&gpmc {
3c18bbf3	48	ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
ab8dd3ae AF	49
ab8dd3ae AF	50	nand@0,0 {
4875b8fc	51	compatible = "ti,omap2-nand";
ab8dd3ae	52	reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
4875b8fc AF	53	interrupt-parent = <&gpmc>;
	54	interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
	55	<1 IRQ_TYPE_NONE>; /* termcount */
	56	linux,mtd-name = "micron,mt29f4g16abbda3w";
ab8dd3ae AF	57	nand-bus-width = <16>;
ab8dd3ae AF	58	ti,nand-ecc-opt = "bch8";
4875b8fc	59	rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ab8dd3ae AF	60	gpmc,sync-clk-ps = <0>;
	61	gpmc,cs-on-ns = <0>;
	62	gpmc,cs-rd-off-ns = <44>;
	63	gpmc,cs-wr-off-ns = <44>;
	64	gpmc,adv-on-ns = <6>;
	65	gpmc,adv-rd-off-ns = <34>;
	66	gpmc,adv-wr-off-ns = <44>;
	67	gpmc,we-off-ns = <40>;
	68	gpmc,oe-off-ns = <54>;
	69	gpmc,access-ns = <64>;
	70	gpmc,rd-cycle-ns = <82>;
	71	gpmc,wr-cycle-ns = <82>;
	72	gpmc,wr-access-ns = <40>;
	73	gpmc,wr-data-mux-bus-ns = <0>;
	74	gpmc,device-width = <2>;
ab8dd3ae AF	75	#address-cells = <1>;
ab8dd3ae AF	76	#size-cells = <1>;
ab8dd3ae AF	77	};
	78	};
	79
	80	&i2c1 {
84c7efd6 AF	81	pinctrl-names = "default";
84c7efd6 AF	82	pinctrl-0 = <&i2c1_pins>;
ab8dd3ae AF	83	clock-frequency = <2600000>;
	84
	85	twl: twl@48 {
	86	reg = <0x48>;
	87	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	88	interrupt-parent = <&intc>;
8eb43b0a AF	89	clocks = <&hfclk_26m>;
8eb43b0a AF	90	clock-names = "fck";
ab8dd3ae AF	91	twl_audio: audio {
	92	compatible = "ti,twl4030-audio";
	93	codec {
	94	};
	95	};
	96	};
	97	};
	98
	99	&i2c2 {
5fe3c0fa AF	100	pinctrl-names = "default";
5fe3c0fa AF	101	pinctrl-0 = <&i2c2_pins>;
ab8dd3ae	102	clock-frequency = <400000>;
d1f9400c AF	103	};
	104
	105	&i2c3 {
	106	pinctrl-names = "default";
	107	pinctrl-0 = <&i2c3_pins>;
	108	clock-frequency = <400000>;
121685b1 AF	109
	110	touchscreen: tsc2004@48 {
	111	compatible = "ti,tsc2004";
	112	reg = <0x48>;
	113	vio-supply = <&vaux1>;
	114	pinctrl-names = "default";
	115	pinctrl-0 = <&tsc2004_pins>;
	116	interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
	117
	118	touchscreen-fuzz-x = <4>;
	119	touchscreen-fuzz-y = <7>;
	120	touchscreen-fuzz-pressure = <2>;
	121	touchscreen-size-x = <4096>;
	122	touchscreen-size-y = <4096>;
	123	touchscreen-max-pressure = <2048>;
	124
	125	ti,x-plate-ohms = <280>;
	126	ti,esd-recovery-timeout-ms = <8000>;
	127	};
ab8dd3ae AF	128	};
ab8dd3ae AF	129
ab8dd3ae AF	130	&mmc3 {
ab8dd3ae AF	131	interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
cd7594ac	132	pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
ab8dd3ae AF	133	pinctrl-names = "default";
	134	vmmc-supply = <&wl12xx_vmmc>;
	135	non-removable;
	136	bus-width = <4>;
	137	cap-power-off-card;
	138	#address-cells = <1>;
	139	#size-cells = <0>;
	140	wlcore: wlcore@2 {
	141	compatible = "ti,wl1273";
	142	reg = <2>;
cd7594ac AF	143	interrupt-parent = <&gpio1>;
cd7594ac AF	144	interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
ab8dd3ae AF	145	ref-clock-frequency = <26000000>;
	146	};
	147	};
	148
89077c71 AF	149	&usbhshost {
	150	port2-mode = "ehci-phy";
	151	};
	152
	153	&usbhsehci {
	154	phys = <0 &hsusb2_phy>;
	155	};
	156
	157
ab8dd3ae	158	&omap3_pmx_core {
89077c71 AF	159	pinctrl-names = "default";
	160	pinctrl-0 = <&hsusb2_pins>;
	161
ab8dd3ae AF	162	mmc3_pins: pinmux_mm3_pins {
	163	pinctrl-single,pins = <
	164	OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
	165	OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
	166	OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
	167	OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
ab8dd3ae AF	168	OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
	169	OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
	170	>;
	171	};
	172	mcbsp2_pins: pinmux_mcbsp2_pins {
	173	pinctrl-single,pins = <
	174	OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT \| MUX_MODE0) /* mcbsp2_fsx */
	175	OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT \| MUX_MODE0) /* mcbsp2_clkx */
	176	OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT \| MUX_MODE0) /* mcbsp2_dr */
	177	OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT \| MUX_MODE0) /* mcbsp2_dx */
	178	>;
	179	};
	180	uart2_pins: pinmux_uart2_pins {
	181	pinctrl-single,pins = <
	182	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT \| MUX_MODE0) /* uart2_cts.uart2_cts */
	183	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts .uart2_rts*/
	184	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
	185	OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
	186	OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT \| MUX_MODE4) /* GPIO_162,BT_EN */
	187	>;
	188	};
	189	mcspi1_pins: pinmux_mcspi1_pins {
	190	pinctrl-single,pins = <
	191	OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT \| MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
	192	OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
	193	OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP \| MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
	194	OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
	195	>;
	196	};
89077c71 AF	197
	198	hsusb2_pins: pinmux_hsusb2_pins {
	199	pinctrl-single,pins = <
	200	OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
	201	OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
	202	OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
	203	OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
	204	OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
	205	OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
	206	>;
	207	};
	208
ab8dd3ae AF	209	hsusb_otg_pins: pinmux_hsusb_otg_pins {
	210	pinctrl-single,pins = <
	211	OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT \| MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
	212	OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT \| MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
	213	OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT \| MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
	214	OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT \| MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
	215	OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT \| MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
	216	OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT \| MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
	217	OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT \| MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
	218	OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT \| MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
	219	OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT \| MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
	220	OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT \| MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
	221	OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT \| MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
	222	OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT \| MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
	223	>;
	224	};
89077c71	225
84c7efd6 AF	226	i2c1_pins: pinmux_i2c1_pins {
	227	pinctrl-single,pins = <
	228	OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT \| MUX_MODE0) /* i2c1_scl.i2c1_scl */
	229	OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT \| MUX_MODE0) /* i2c1_sda.i2c1_sda */
	230	>;
	231	};
121685b1 AF	232
	233	tsc2004_pins: pinmux_tsc2004_pins {
	234	pinctrl-single,pins = <
	235	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE4) /* mcbsp4_dr.gpio_153 */
	236	>;
	237	};
89077c71 AF	238	};
	239
	240	&omap3_pmx_wkup {
	241	pinctrl-names = "default";
	242	pinctrl-0 = <&hsusb2_reset_pin>;
	243	hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
	244	pinctrl-single,pins = <
	245	OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT \| MUX_MODE4) /* sys_boot2.gpio_4 */
	246	>;
	247	};
cd7594ac AF	248	wl127x_gpio: pinmux_wl127x_gpio_pin {
	249	pinctrl-single,pins = <
	250	OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT \| MUX_MODE4) /* sys_boot0.gpio_2 */
	251	OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT \| MUX_MODE4) /* sys_boot1.gpio_3 */
	252	>;
	253	};
5fe3c0fa AF	254	i2c2_pins: pinmux_i2c2_pins {
	255	pinctrl-single,pins = <
	256	OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT \| MUX_MODE0) /* i2c2_scl */
	257	OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT \| MUX_MODE0) /* i2c2_sda */
	258	>;
	259	};
	260	i2c3_pins: pinmux_i2c3_pins {
	261	pinctrl-single,pins = <
	262	OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT \| MUX_MODE0) /* i2c3_scl */
	263	OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT \| MUX_MODE0) /* i2c3_sda */
	264	>;
	265	};
89077c71 AF	266	};
	267
	268	&omap3_pmx_core2 {
	269	pinctrl-names = "default";
	270	pinctrl-0 = <&hsusb2_2_pins>;
	271	hsusb2_2_pins: pinmux_hsusb2_2_pins {
	272	pinctrl-single,pins = <
	273	OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT \| MUX_MODE3) /* etk_d10.hsusb2_clk */
	274	OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT \| MUX_MODE3) /* etk_d11.hsusb2_stp */
	275	OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d12.hsusb2_dir */
	276	OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d13.hsusb2_nxt */
	277	OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d14.hsusb2_data0 */
	278	OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d15.hsusb2_data1 */
	279	>;
	280	};
ab8dd3ae AF	281	};
	282
	283	&uart2 {
	284	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
	285	pinctrl-names = "default";
	286	pinctrl-0 = <&uart2_pins>;
	287	};
	288
	289	&mcspi1 {
	290	pinctrl-names = "default";
	291	pinctrl-0 = <&mcspi1_pins>;
	292	};
	293
	294	#include "twl4030.dtsi"
	295	#include "twl4030_omap3.dtsi"
	296
	297	&twl {
	298	twl_power: power {
	299	compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
	300	ti,use_poweroff;
	301	};
	302	};
	303
	304	&twl_gpio {
	305	ti,use-leds;
	306	};