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734539ea VA |
1 | /* |
2 | * Device Tree Source for K2G SOC | |
3 | * | |
4 | * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
11 | * kind, whether express or implied; without even the implied warranty | |
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
eb53a15b | 17 | #include <dt-bindings/pinctrl/keystone.h> |
87b7c3ac | 18 | #include <dt-bindings/gpio/gpio.h> |
734539ea VA |
19 | |
20 | / { | |
21 | compatible = "ti,k2g","ti,keystone"; | |
22 | model = "Texas Instruments K2G SoC"; | |
23 | #address-cells = <2>; | |
24 | #size-cells = <2>; | |
25 | interrupt-parent = <&gic>; | |
26 | ||
f402573f FCJ |
27 | chosen { }; |
28 | ||
734539ea VA |
29 | aliases { |
30 | serial0 = &uart0; | |
d0dfe5de VA |
31 | i2c0 = &i2c0; |
32 | i2c1 = &i2c1; | |
33 | i2c2 = &i2c2; | |
a1b7cb92 | 34 | rproc0 = &dsp0; |
734539ea VA |
35 | }; |
36 | ||
37 | cpus { | |
38 | #address-cells = <1>; | |
39 | #size-cells = <0>; | |
40 | ||
41 | cpu@0 { | |
42 | compatible = "arm,cortex-a15"; | |
43 | device_type = "cpu"; | |
44 | reg = <0>; | |
45 | }; | |
46 | }; | |
47 | ||
8dccafaa | 48 | gic: interrupt-controller@2561000 { |
387720c9 | 49 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; |
734539ea VA |
50 | #interrupt-cells = <3>; |
51 | interrupt-controller; | |
52 | reg = <0x0 0x02561000 0x0 0x1000>, | |
53 | <0x0 0x02562000 0x0 0x2000>, | |
387720c9 | 54 | <0x0 0x02564000 0x0 0x2000>, |
734539ea VA |
55 | <0x0 0x02566000 0x0 0x2000>; |
56 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | | |
57 | IRQ_TYPE_LEVEL_HIGH)>; | |
58 | }; | |
59 | ||
60 | timer { | |
61 | compatible = "arm,armv7-timer"; | |
62 | interrupts = | |
63 | <GIC_PPI 13 | |
64 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
65 | <GIC_PPI 14 | |
66 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
67 | <GIC_PPI 11 | |
68 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
69 | <GIC_PPI 10 | |
70 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
71 | }; | |
72 | ||
73 | pmu { | |
74 | compatible = "arm,cortex-a15-pmu"; | |
75 | interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; | |
76 | }; | |
77 | ||
78 | soc { | |
79 | #address-cells = <1>; | |
80 | #size-cells = <1>; | |
be76fd31 | 81 | #pinctrl-cells = <1>; |
734539ea VA |
82 | compatible = "ti,keystone","simple-bus"; |
83 | ranges = <0x0 0x0 0x0 0xc0000000>; | |
84 | dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; | |
85 | ||
8dccafaa | 86 | msm_ram: msmram@c000000 { |
b6f922ab SA |
87 | compatible = "mmio-sram"; |
88 | reg = <0x0c000000 0x100000>; | |
89 | ranges = <0x0 0x0c000000 0x100000>; | |
90 | #address-cells = <1>; | |
91 | #size-cells = <1>; | |
b3511c9e SA |
92 | |
93 | sram-bm@f7000 { | |
94 | reg = <0x000f7000 0x8000>; | |
95 | }; | |
b6f922ab SA |
96 | }; |
97 | ||
8dccafaa | 98 | k2g_pinctrl: pinmux@2621000 { |
fb252259 VA |
99 | compatible = "pinctrl-single"; |
100 | reg = <0x02621000 0x410>; | |
101 | pinctrl-single,register-width = <32>; | |
102 | pinctrl-single,function-mask = <0x001b0007>; | |
103 | }; | |
104 | ||
8dccafaa | 105 | devctrl: device-state-control@2620000 { |
08fa198d AD |
106 | compatible = "ti,keystone-devctrl", "syscon"; |
107 | reg = <0x02620000 0x1000>; | |
108 | }; | |
109 | ||
8dccafaa | 110 | uart0: serial@2530c00 { |
1dd55813 | 111 | compatible = "ti,da830-uart", "ns16550a"; |
734539ea VA |
112 | current-speed = <115200>; |
113 | reg-shift = <2>; | |
114 | reg-io-width = <4>; | |
115 | reg = <0x02530c00 0x100>; | |
116 | interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; | |
117 | clock-frequency = <200000000>; | |
118 | status = "disabled"; | |
119 | }; | |
0884b1b3 | 120 | |
8dccafaa | 121 | dcan0: can@260b200 { |
2ff9612f LV |
122 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
123 | reg = <0x0260B200 0x200>; | |
124 | interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>; | |
125 | status = "disabled"; | |
126 | power-domains = <&k2g_pds 0x0008>; | |
127 | clocks = <&k2g_clks 0x0008 1>; | |
128 | }; | |
129 | ||
8dccafaa | 130 | dcan1: can@260b400 { |
2ff9612f LV |
131 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
132 | reg = <0x0260B400 0x200>; | |
133 | interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; | |
134 | status = "disabled"; | |
135 | power-domains = <&k2g_pds 0x0009>; | |
136 | clocks = <&k2g_clks 0x0009 1>; | |
137 | }; | |
138 | ||
d0dfe5de VA |
139 | i2c0: i2c@2530000 { |
140 | compatible = "ti,keystone-i2c"; | |
141 | reg = <0x02530000 0x400>; | |
142 | clocks = <&k2g_clks 0x003a 0>; | |
143 | power-domains = <&k2g_pds 0x003a>; | |
144 | interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; | |
145 | #address-cells = <1>; | |
146 | #size-cells = <0>; | |
147 | status = "disabled"; | |
148 | }; | |
149 | ||
150 | i2c1: i2c@2530400 { | |
151 | compatible = "ti,keystone-i2c"; | |
152 | reg = <0x02530400 0x400>; | |
153 | clocks = <&k2g_clks 0x003b 0>; | |
154 | power-domains = <&k2g_pds 0x003b>; | |
155 | interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; | |
156 | #address-cells = <1>; | |
157 | #size-cells = <0>; | |
158 | status = "disabled"; | |
159 | }; | |
160 | ||
161 | i2c2: i2c@2530800 { | |
162 | compatible = "ti,keystone-i2c"; | |
163 | reg = <0x02530800 0x400>; | |
164 | clocks = <&k2g_clks 0x003c 0>; | |
165 | power-domains = <&k2g_pds 0x003c>; | |
166 | interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; | |
167 | #address-cells = <1>; | |
168 | #size-cells = <0>; | |
169 | status = "disabled"; | |
170 | }; | |
171 | ||
8dccafaa | 172 | kirq0: keystone_irq@26202a0 { |
0884b1b3 AD |
173 | compatible = "ti,keystone-irq"; |
174 | interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; | |
175 | interrupt-controller; | |
176 | #interrupt-cells = <1>; | |
177 | ti,syscon-dev = <&devctrl 0x2a0>; | |
178 | }; | |
e0f0b54c | 179 | |
8dccafaa | 180 | dspgpio0: keystone_dsp_gpio@2620240 { |
e0f0b54c AD |
181 | compatible = "ti,keystone-dsp-gpio"; |
182 | gpio-controller; | |
183 | #gpio-cells = <2>; | |
184 | gpio,syscon-dev = <&devctrl 0x240>; | |
185 | }; | |
11b897a2 | 186 | |
a1b7cb92 SA |
187 | dsp0: dsp@10800000 { |
188 | compatible = "ti,k2g-dsp"; | |
189 | reg = <0x10800000 0x00100000>, | |
190 | <0x10e00000 0x00008000>, | |
191 | <0x10f00000 0x00008000>; | |
192 | reg-names = "l2sram", "l1pram", "l1dram"; | |
193 | power-domains = <&k2g_pds 0x0046>; | |
194 | ti,syscon-dev = <&devctrl 0x844>; | |
195 | resets = <&k2g_reset 0x0046 0x1>; | |
196 | interrupt-parent = <&kirq0>; | |
197 | interrupts = <0 8>; | |
198 | interrupt-names = "vring", "exception"; | |
199 | kick-gpios = <&dspgpio0 27 0>; | |
200 | status = "disabled"; | |
201 | }; | |
202 | ||
8dccafaa | 203 | msgmgr: msgmgr@2a00000 { |
11b897a2 NM |
204 | compatible = "ti,k2g-message-manager"; |
205 | #mbox-cells = <2>; | |
206 | reg-names = "queue_proxy_region", | |
207 | "queue_state_debug_region"; | |
208 | reg = <0x02a00000 0x400000>, <0x028c3400 0x400>; | |
209 | interrupt-names = "rx_005", | |
210 | "rx_057"; | |
211 | interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, | |
212 | <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>; | |
213 | }; | |
e39aacf6 | 214 | |
8dccafaa | 215 | pmmc: pmmc@2921c00 { |
e39aacf6 NM |
216 | compatible = "ti,k2g-sci"; |
217 | /* | |
218 | * In case of rare platforms that does not use k2g as | |
219 | * system master, use /delete-property/ | |
220 | */ | |
221 | ti,system-reboot-controller; | |
222 | mbox-names = "rx", "tx"; | |
223 | mboxes= <&msgmgr 5 2>, | |
224 | <&msgmgr 0 0>; | |
225 | reg-names = "debug_messages"; | |
226 | reg = <0x02921c00 0x400>; | |
2557a289 DG |
227 | |
228 | k2g_pds: power-controller { | |
229 | compatible = "ti,sci-pm-domain"; | |
230 | #power-domain-cells = <1>; | |
231 | }; | |
a0a220b6 TK |
232 | |
233 | k2g_clks: clocks { | |
234 | compatible = "ti,k2g-sci-clk"; | |
235 | #clock-cells = <2>; | |
236 | }; | |
45b08b03 AD |
237 | |
238 | k2g_reset: reset-controller { | |
239 | compatible = "ti,sci-reset"; | |
240 | #reset-cells = <2>; | |
241 | }; | |
e39aacf6 | 242 | }; |
87b7c3ac K |
243 | |
244 | gpio0: gpio@2603000 { | |
245 | compatible = "ti,k2g-gpio", "ti,keystone-gpio"; | |
246 | reg = <0x02603000 0x100>; | |
247 | gpio-controller; | |
248 | #gpio-cells = <2>; | |
249 | ||
250 | interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, | |
251 | <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, | |
252 | <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>, | |
253 | <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>, | |
254 | <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, | |
255 | <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>, | |
256 | <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>, | |
257 | <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>, | |
258 | <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>; | |
259 | interrupt-controller; | |
260 | #interrupt-cells = <2>; | |
261 | ti,ngpio = <144>; | |
262 | ti,davinci-gpio-unbanked = <0>; | |
263 | clocks = <&k2g_clks 0x001b 0x0>; | |
264 | clock-names = "gpio"; | |
265 | }; | |
266 | ||
267 | gpio1: gpio@260a000 { | |
268 | compatible = "ti,k2g-gpio", "ti,keystone-gpio"; | |
269 | reg = <0x0260a000 0x100>; | |
270 | gpio-controller; | |
271 | #gpio-cells = <2>; | |
272 | interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>, | |
273 | <GIC_SPI 443 IRQ_TYPE_EDGE_RISING>, | |
274 | <GIC_SPI 444 IRQ_TYPE_EDGE_RISING>, | |
275 | <GIC_SPI 445 IRQ_TYPE_EDGE_RISING>, | |
276 | <GIC_SPI 446 IRQ_TYPE_EDGE_RISING>; | |
277 | interrupt-controller; | |
278 | #interrupt-cells = <2>; | |
279 | ti,ngpio = <68>; | |
280 | ti,davinci-gpio-unbanked = <0>; | |
281 | clocks = <&k2g_clks 0x001c 0x0>; | |
282 | clock-names = "gpio"; | |
283 | }; | |
f8d4416b | 284 | |
8dccafaa | 285 | edma0: edma@2700000 { |
f8d4416b PU |
286 | compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; |
287 | reg = <0x02700000 0x8000>; | |
288 | reg-names = "edma3_cc"; | |
289 | interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>, | |
290 | <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>, | |
291 | <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; | |
292 | interrupt-names = "edma3_ccint", "emda3_mperr", | |
293 | "edma3_ccerrint"; | |
294 | dma-requests = <64>; | |
295 | #dma-cells = <2>; | |
296 | ||
297 | ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>; | |
298 | ||
299 | ti,edma-memcpy-channels = <32 33 34 35>; | |
300 | ||
301 | power-domains = <&k2g_pds 0x3f>; | |
302 | }; | |
303 | ||
8dccafaa | 304 | edma0_tptc0: tptc@2760000 { |
f8d4416b PU |
305 | compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; |
306 | reg = <0x02760000 0x400>; | |
307 | power-domains = <&k2g_pds 0x3f>; | |
308 | }; | |
309 | ||
8dccafaa | 310 | edma0_tptc1: tptc@2768000 { |
f8d4416b PU |
311 | compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; |
312 | reg = <0x02768000 0x400>; | |
313 | power-domains = <&k2g_pds 0x3f>; | |
314 | }; | |
315 | ||
8dccafaa | 316 | edma1: edma@2728000 { |
f8d4416b PU |
317 | compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; |
318 | reg = <0x02728000 0x8000>; | |
319 | reg-names = "edma3_cc"; | |
320 | interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, | |
321 | <GIC_SPI 219 IRQ_TYPE_EDGE_RISING>, | |
322 | <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>; | |
323 | interrupt-names = "edma3_ccint", "emda3_mperr", | |
324 | "edma3_ccerrint"; | |
325 | dma-requests = <64>; | |
326 | #dma-cells = <2>; | |
327 | ||
328 | ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>; | |
329 | ||
330 | /* | |
331 | * memcpy is disabled, can be enabled with: | |
332 | * ti,edma-memcpy-channels = <12 13 14 15>; | |
333 | * for example. | |
334 | */ | |
335 | ||
336 | power-domains = <&k2g_pds 0x4f>; | |
337 | }; | |
338 | ||
8dccafaa | 339 | edma1_tptc0: tptc@27b0000 { |
f8d4416b PU |
340 | compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; |
341 | reg = <0x027b0000 0x400>; | |
342 | power-domains = <&k2g_pds 0x4f>; | |
343 | }; | |
344 | ||
8dccafaa | 345 | edma1_tptc1: tptc@27b8000 { |
f8d4416b PU |
346 | compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; |
347 | reg = <0x027b8000 0x400>; | |
348 | power-domains = <&k2g_pds 0x4f>; | |
349 | }; | |
9529de63 LV |
350 | |
351 | mmc0: mmc@23000000 { | |
352 | compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc"; | |
353 | reg = <0x23000000 0x400>; | |
354 | interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; | |
355 | dmas = <&edma1 24 0>, <&edma1 25 0>; | |
356 | dma-names = "tx", "rx"; | |
357 | bus-width = <4>; | |
358 | ti,needs-special-reset; | |
359 | no-1-8-v; | |
360 | max-frequency = <96000000>; | |
361 | power-domains = <&k2g_pds 0xb>; | |
362 | clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>; | |
363 | clock-names = "fck", "mmchsdb_fck"; | |
364 | status = "disabled"; | |
365 | }; | |
366 | ||
367 | mmc1: mmc@23100000 { | |
368 | compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc"; | |
369 | reg = <0x23100000 0x400>; | |
370 | interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; | |
371 | dmas = <&edma1 26 0>, <&edma1 27 0>; | |
372 | dma-names = "tx", "rx"; | |
373 | bus-width = <8>; | |
374 | ti,needs-special-reset; | |
375 | ti,non-removable; | |
376 | max-frequency = <96000000>; | |
377 | power-domains = <&k2g_pds 0xc>; | |
378 | clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>; | |
379 | clock-names = "fck", "mmchsdb_fck"; | |
380 | status = "disabled"; | |
381 | }; | |
55fe38f0 | 382 | |
b51c5cb5 | 383 | mcasp0: mcasp@2340000 { |
55fe38f0 PU |
384 | compatible = "ti,am33xx-mcasp-audio"; |
385 | reg = <0x02340000 0x2000>, | |
386 | <0x21804000 0x1000>; | |
387 | reg-names = "mpu","dat"; | |
388 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, | |
389 | <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; | |
390 | interrupt-names = "tx", "rx"; | |
391 | dmas = <&edma0 24 1>, <&edma0 25 1>; | |
392 | dma-names = "tx", "rx"; | |
393 | power-domains = <&k2g_pds 0x4>; | |
394 | clocks = <&k2g_clks 0x4 0>; | |
395 | clock-names = "fck"; | |
396 | status = "disabled"; | |
397 | }; | |
398 | ||
b51c5cb5 | 399 | mcasp1: mcasp@2342000 { |
55fe38f0 PU |
400 | compatible = "ti,am33xx-mcasp-audio"; |
401 | reg = <0x02342000 0x2000>, | |
402 | <0x21804400 0x1000>; | |
403 | reg-names = "mpu","dat"; | |
404 | interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, | |
405 | <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; | |
406 | interrupt-names = "tx", "rx"; | |
407 | dmas = <&edma1 48 1>, <&edma1 49 1>; | |
408 | dma-names = "tx", "rx"; | |
409 | power-domains = <&k2g_pds 0x5>; | |
410 | clocks = <&k2g_clks 0x5 0>; | |
411 | clock-names = "fck"; | |
412 | status = "disabled"; | |
413 | }; | |
414 | ||
b51c5cb5 | 415 | mcasp2: mcasp@2344000 { |
55fe38f0 PU |
416 | compatible = "ti,am33xx-mcasp-audio"; |
417 | reg = <0x02344000 0x2000>, | |
418 | <0x21804800 0x1000>; | |
419 | reg-names = "mpu","dat"; | |
420 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, | |
421 | <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
422 | interrupt-names = "tx", "rx"; | |
423 | dmas = <&edma1 50 1>, <&edma1 51 1>; | |
424 | dma-names = "tx", "rx"; | |
425 | power-domains = <&k2g_pds 0x6>; | |
426 | clocks = <&k2g_clks 0x6 0>; | |
427 | clock-names = "fck"; | |
428 | status = "disabled"; | |
429 | }; | |
b51c5cb5 | 430 | |
252402aa VA |
431 | usb0_phy: usb-phy@0 { |
432 | compatible = "usb-nop-xceiv"; | |
433 | status = "disabled"; | |
434 | }; | |
435 | ||
436 | keystone_usb0: keystone-dwc3@2680000 { | |
437 | compatible = "ti,keystone-dwc3"; | |
438 | #address-cells = <1>; | |
439 | #size-cells = <1>; | |
440 | reg = <0x2680000 0x10000>; | |
441 | interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; | |
442 | ranges; | |
443 | dma-coherent; | |
444 | dma-ranges; | |
445 | status = "disabled"; | |
446 | power-domains = <&k2g_pds 0x0016>; | |
447 | ||
448 | usb0: usb@2690000 { | |
449 | compatible = "snps,dwc3"; | |
450 | reg = <0x2690000 0x10000>; | |
451 | interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; | |
452 | maximum-speed = "high-speed"; | |
453 | dr_mode = "otg"; | |
454 | usb-phy = <&usb0_phy>; | |
455 | status = "disabled"; | |
456 | }; | |
457 | }; | |
458 | ||
459 | usb1_phy: usb-phy@1 { | |
460 | compatible = "usb-nop-xceiv"; | |
461 | status = "disabled"; | |
462 | }; | |
463 | ||
464 | keystone_usb1: keystone-dwc3@2580000 { | |
465 | compatible = "ti,keystone-dwc3"; | |
466 | #address-cells = <1>; | |
467 | #size-cells = <1>; | |
468 | reg = <0x2580000 0x10000>; | |
469 | interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; | |
470 | ranges; | |
471 | dma-coherent; | |
472 | dma-ranges; | |
473 | status = "disabled"; | |
474 | power-domains = <&k2g_pds 0x0017>; | |
475 | ||
476 | usb1: usb@2590000 { | |
477 | compatible = "snps,dwc3"; | |
478 | reg = <0x2590000 0x10000>; | |
479 | interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; | |
480 | maximum-speed = "high-speed"; | |
481 | dr_mode = "otg"; | |
482 | usb-phy = <&usb1_phy>; | |
483 | status = "disabled"; | |
484 | }; | |
485 | }; | |
a9ccafd0 V |
486 | |
487 | ecap0: pwm@21d1800 { | |
488 | compatible = "ti,k2g-ecap", "ti,am3352-ecap"; | |
489 | #pwm-cells = <3>; | |
490 | reg = <0x021d1800 0x60>; | |
491 | power-domains = <&k2g_pds 0x38>; | |
492 | clocks = <&k2g_clks 0x38 0>; | |
493 | clock-names = "fck"; | |
494 | status = "disabled"; | |
495 | }; | |
496 | ||
497 | ecap1: pwm@21d1c00 { | |
498 | compatible = "ti,k2g-ecap", "ti,am3352-ecap"; | |
499 | #pwm-cells = <3>; | |
500 | reg = <0x021d1c00 0x60>; | |
501 | power-domains = <&k2g_pds 0x39>; | |
502 | clocks = <&k2g_clks 0x39 0x0>; | |
503 | clock-names = "fck"; | |
504 | status = "disabled"; | |
505 | }; | |
729ce969 VA |
506 | |
507 | spi0: spi@21805400 { | |
508 | compatible = "ti,keystone-spi"; | |
509 | reg = <0x21805400 0x200>; | |
510 | num-cs = <4>; | |
511 | ti,davinci-spi-intr-line = <0>; | |
512 | interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; | |
513 | #address-cells = <1>; | |
514 | #size-cells = <0>; | |
515 | power-domains = <&k2g_pds 0x0010>; | |
516 | clocks = <&k2g_clks 0x0010 0>; | |
517 | }; | |
518 | ||
519 | spi1: spi@21805800 { | |
520 | compatible = "ti,keystone-spi"; | |
521 | reg = <0x21805800 0x200>; | |
522 | num-cs = <4>; | |
523 | ti,davinci-spi-intr-line = <0>; | |
524 | interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; | |
525 | #address-cells = <1>; | |
526 | #size-cells = <0>; | |
527 | power-domains = <&k2g_pds 0x0011>; | |
528 | clocks = <&k2g_clks 0x0011 0>; | |
529 | }; | |
530 | ||
531 | spi2: spi@21805c00 { | |
532 | compatible = "ti,keystone-spi"; | |
533 | reg = <0x21805C00 0x200>; | |
534 | num-cs = <4>; | |
535 | ti,davinci-spi-intr-line = <0>; | |
536 | interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; | |
537 | #address-cells = <1>; | |
538 | #size-cells = <0>; | |
539 | power-domains = <&k2g_pds 0x0012>; | |
540 | clocks = <&k2g_clks 0x0012 0>; | |
541 | }; | |
542 | ||
543 | spi3: spi@21806000 { | |
544 | compatible = "ti,keystone-spi"; | |
545 | reg = <0x21806000 0x200>; | |
546 | num-cs = <4>; | |
547 | ti,davinci-spi-intr-line = <0>; | |
548 | interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; | |
549 | #address-cells = <1>; | |
550 | #size-cells = <0>; | |
551 | power-domains = <&k2g_pds 0x0013>; | |
552 | clocks = <&k2g_clks 0x0013 0>; | |
553 | }; | |
734539ea VA |
554 | }; |
555 | }; |