Commit | Line | Data |
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d2daa2f7 SG |
1 | /* |
2 | * Copyright (C) 2014 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /dts-v1/; | |
10 | ||
4014a4f7 AH |
11 | #include <dt-bindings/gpio/gpio.h> |
12 | #include <dt-bindings/input/input.h> | |
d2daa2f7 SG |
13 | #include "imx6sx.dtsi" |
14 | ||
15 | / { | |
16 | model = "Freescale i.MX6 SoloX SDB Board"; | |
17 | compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; | |
18 | ||
19 | chosen { | |
20 | stdout-path = &uart1; | |
21 | }; | |
22 | ||
ad00e080 | 23 | memory@80000000 { |
d2daa2f7 SG |
24 | reg = <0x80000000 0x40000000>; |
25 | }; | |
26 | ||
7caa59e0 | 27 | backlight_display: backlight-display { |
31ffdbc8 FE |
28 | compatible = "pwm-backlight"; |
29 | pwms = <&pwm3 0 5000000>; | |
30 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
31 | default-brightness-level = <6>; | |
32 | }; | |
33 | ||
4014a4f7 AH |
34 | gpio-keys { |
35 | compatible = "gpio-keys"; | |
36 | pinctrl-names = "default"; | |
37 | pinctrl-0 = <&pinctrl_gpio_keys>; | |
38 | ||
39 | volume-up { | |
40 | label = "Volume Up"; | |
41 | gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; | |
42 | linux,code = <KEY_VOLUMEUP>; | |
f5d5d2e6 | 43 | wakeup-source; |
4014a4f7 AH |
44 | }; |
45 | ||
46 | volume-down { | |
47 | label = "Volume Down"; | |
48 | gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; | |
49 | linux,code = <KEY_VOLUMEDOWN>; | |
f5d5d2e6 | 50 | wakeup-source; |
4014a4f7 AH |
51 | }; |
52 | }; | |
53 | ||
f92717f6 FE |
54 | vcc_sd3: regulator-vcc-sd3 { |
55 | compatible = "regulator-fixed"; | |
56 | pinctrl-names = "default"; | |
57 | pinctrl-0 = <&pinctrl_vcc_sd3>; | |
58 | regulator-name = "VCC_SD3"; | |
59 | regulator-min-microvolt = <3000000>; | |
60 | regulator-max-microvolt = <3000000>; | |
61 | gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; | |
62 | enable-active-high; | |
63 | }; | |
960fefff | 64 | |
f92717f6 FE |
65 | reg_usb_otg1_vbus: regulator-usb-otg1-vbus { |
66 | compatible = "regulator-fixed"; | |
67 | pinctrl-names = "default"; | |
68 | pinctrl-0 = <&pinctrl_usb_otg1>; | |
69 | regulator-name = "usb_otg1_vbus"; | |
70 | regulator-min-microvolt = <5000000>; | |
71 | regulator-max-microvolt = <5000000>; | |
72 | gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; | |
73 | enable-active-high; | |
74 | }; | |
960fefff | 75 | |
f92717f6 FE |
76 | reg_usb_otg2_vbus: regulator-usb-otg2-vbus { |
77 | compatible = "regulator-fixed"; | |
78 | pinctrl-names = "default"; | |
79 | pinctrl-0 = <&pinctrl_usb_otg2>; | |
80 | regulator-name = "usb_otg2_vbus"; | |
81 | regulator-min-microvolt = <5000000>; | |
82 | regulator-max-microvolt = <5000000>; | |
83 | gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; | |
84 | enable-active-high; | |
85 | }; | |
9c86ae8c | 86 | |
f92717f6 FE |
87 | reg_psu_5v: regulator-psu-5v { |
88 | compatible = "regulator-fixed"; | |
89 | regulator-name = "PSU-5V0"; | |
90 | regulator-min-microvolt = <5000000>; | |
91 | regulator-max-microvolt = <5000000>; | |
92 | }; | |
31ffdbc8 | 93 | |
f92717f6 FE |
94 | reg_lcd_3v3: regulator-lcd-3v3 { |
95 | compatible = "regulator-fixed"; | |
96 | regulator-name = "lcd-3v3"; | |
97 | gpio = <&gpio3 27 0>; | |
98 | enable-active-high; | |
99 | }; | |
9863aba5 | 100 | |
f92717f6 FE |
101 | reg_peri_3v3: regulator-peri-3v3 { |
102 | compatible = "regulator-fixed"; | |
103 | pinctrl-names = "default"; | |
104 | pinctrl-0 = <&pinctrl_peri_3v3>; | |
105 | regulator-name = "peri_3v3"; | |
106 | regulator-min-microvolt = <3300000>; | |
107 | regulator-max-microvolt = <3300000>; | |
108 | gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>; | |
109 | enable-active-high; | |
110 | regulator-always-on; | |
111 | }; | |
9863aba5 | 112 | |
f92717f6 FE |
113 | reg_enet_3v3: regulator-enet-3v3 { |
114 | compatible = "regulator-fixed"; | |
115 | pinctrl-names = "default"; | |
116 | pinctrl-0 = <&pinctrl_enet_3v3>; | |
117 | regulator-name = "enet_3v3"; | |
118 | regulator-min-microvolt = <3300000>; | |
119 | regulator-max-microvolt = <3300000>; | |
120 | gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; | |
9c86ae8c FE |
121 | }; |
122 | ||
03163470 FE |
123 | reg_pcie_gpio: regulator-pcie-gpio { |
124 | compatible = "regulator-fixed"; | |
125 | pinctrl-names = "default"; | |
126 | pinctrl-0 = <&pinctrl_pcie_reg>; | |
127 | regulator-name = "MPCIE_3V3"; | |
128 | regulator-min-microvolt = <3300000>; | |
129 | regulator-max-microvolt = <3300000>; | |
130 | gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>; | |
131 | enable-active-high; | |
132 | }; | |
133 | ||
7caa59e0 MF |
134 | reg_lcd_5v: regulator-lcd-5v { |
135 | compatible = "regulator-fixed"; | |
136 | regulator-name = "lcd-5v0"; | |
137 | regulator-min-microvolt = <5000000>; | |
138 | regulator-max-microvolt = <5000000>; | |
139 | }; | |
140 | ||
9c86ae8c FE |
141 | sound { |
142 | compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962"; | |
143 | model = "wm8962-audio"; | |
144 | ssi-controller = <&ssi2>; | |
145 | audio-codec = <&codec>; | |
146 | audio-routing = | |
147 | "Headphone Jack", "HPOUTL", | |
148 | "Headphone Jack", "HPOUTR", | |
149 | "Ext Spk", "SPKOUTL", | |
150 | "Ext Spk", "SPKOUTR", | |
151 | "AMIC", "MICBIAS", | |
152 | "IN3R", "AMIC"; | |
153 | mux-int-port = <2>; | |
154 | mux-ext-port = <6>; | |
d2daa2f7 | 155 | }; |
7caa59e0 MF |
156 | |
157 | panel { | |
158 | compatible = "sii,43wvf1g"; | |
159 | backlight = <&backlight_display>; | |
160 | dvdd-supply = <®_lcd_3v3>; | |
161 | avdd-supply = <®_lcd_5v>; | |
162 | ||
163 | port { | |
164 | panel_in: endpoint { | |
165 | remote-endpoint = <&display_out>; | |
166 | }; | |
167 | }; | |
168 | }; | |
d2daa2f7 SG |
169 | }; |
170 | ||
9c86ae8c FE |
171 | &audmux { |
172 | pinctrl-names = "default"; | |
173 | pinctrl-0 = <&pinctrl_audmux>; | |
174 | status = "okay"; | |
175 | }; | |
176 | ||
d2daa2f7 SG |
177 | &fec1 { |
178 | pinctrl-names = "default"; | |
179 | pinctrl-0 = <&pinctrl_enet1>; | |
9863aba5 FD |
180 | phy-supply = <®_enet_3v3>; |
181 | phy-mode = "rgmii"; | |
3d125f9c | 182 | phy-handle = <ðphy1>; |
9863aba5 | 183 | status = "okay"; |
3d125f9c SA |
184 | |
185 | mdio { | |
186 | #address-cells = <1>; | |
187 | #size-cells = <0>; | |
188 | ||
9143e398 NA |
189 | ethphy1: ethernet-phy@1 { |
190 | reg = <1>; | |
3d125f9c SA |
191 | }; |
192 | ||
9143e398 NA |
193 | ethphy2: ethernet-phy@2 { |
194 | reg = <2>; | |
3d125f9c SA |
195 | }; |
196 | }; | |
9863aba5 FD |
197 | }; |
198 | ||
199 | &fec2 { | |
200 | pinctrl-names = "default"; | |
201 | pinctrl-0 = <&pinctrl_enet2>; | |
d2daa2f7 | 202 | phy-mode = "rgmii"; |
3d125f9c | 203 | phy-handle = <ðphy2>; |
d2daa2f7 SG |
204 | status = "okay"; |
205 | }; | |
206 | ||
b0e96f83 CF |
207 | &i2c3 { |
208 | clock-frequency = <100000>; | |
209 | pinctrl-names = "default"; | |
210 | pinctrl-0 = <&pinctrl_i2c3>; | |
211 | status = "okay"; | |
212 | }; | |
213 | ||
9c86ae8c | 214 | &i2c4 { |
46311707 JT |
215 | clock-frequency = <100000>; |
216 | pinctrl-names = "default"; | |
217 | pinctrl-0 = <&pinctrl_i2c4>; | |
218 | status = "okay"; | |
9c86ae8c FE |
219 | |
220 | codec: wm8962@1a { | |
221 | compatible = "wlf,wm8962"; | |
222 | reg = <0x1a>; | |
223 | clocks = <&clks IMX6SX_CLK_AUDIO>; | |
224 | DCVDD-supply = <&vgen4_reg>; | |
225 | DBVDD-supply = <&vgen4_reg>; | |
226 | AVDD-supply = <&vgen4_reg>; | |
227 | CPVDD-supply = <&vgen4_reg>; | |
228 | MICVDD-supply = <&vgen3_reg>; | |
229 | PLLVDD-supply = <&vgen4_reg>; | |
230 | SPKVDD1-supply = <®_psu_5v>; | |
231 | SPKVDD2-supply = <®_psu_5v>; | |
232 | }; | |
233 | }; | |
234 | ||
03163470 FE |
235 | &pcie { |
236 | pinctrl-names = "default"; | |
237 | pinctrl-0 = <&pinctrl_pcie>; | |
238 | reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>; | |
239 | vpcie-supply = <®_pcie_gpio>; | |
240 | status = "okay"; | |
241 | }; | |
242 | ||
31ffdbc8 FE |
243 | &lcdif1 { |
244 | pinctrl-names = "default"; | |
245 | pinctrl-0 = <&pinctrl_lcd>; | |
31ffdbc8 FE |
246 | status = "okay"; |
247 | ||
7caa59e0 MF |
248 | port { |
249 | display_out: endpoint { | |
250 | remote-endpoint = <&panel_in>; | |
31ffdbc8 FE |
251 | }; |
252 | }; | |
253 | }; | |
254 | ||
255 | &pwm3 { | |
256 | pinctrl-names = "default"; | |
257 | pinctrl-0 = <&pinctrl_pwm3>; | |
258 | status = "okay"; | |
259 | }; | |
260 | ||
422b0676 RG |
261 | &snvs_poweroff { |
262 | status = "okay"; | |
263 | }; | |
264 | ||
29e88b6d FE |
265 | &sai1 { |
266 | pinctrl-names = "default"; | |
267 | pinctrl-0 = <&pinctrl_sai1>; | |
268 | status = "disabled"; | |
269 | }; | |
270 | ||
9c86ae8c FE |
271 | &ssi2 { |
272 | status = "okay"; | |
273 | }; | |
274 | ||
d2daa2f7 SG |
275 | &uart1 { |
276 | pinctrl-names = "default"; | |
277 | pinctrl-0 = <&pinctrl_uart1>; | |
278 | status = "okay"; | |
279 | }; | |
280 | ||
281 | &uart5 { /* for bluetooth */ | |
282 | pinctrl-names = "default"; | |
283 | pinctrl-0 = <&pinctrl_uart5>; | |
2e7c416c | 284 | uart-has-rtscts; |
d2daa2f7 SG |
285 | status = "okay"; |
286 | }; | |
287 | ||
960fefff FE |
288 | &usbotg1 { |
289 | vbus-supply = <®_usb_otg1_vbus>; | |
290 | pinctrl-names = "default"; | |
291 | pinctrl-0 = <&pinctrl_usb_otg1_id>; | |
292 | status = "okay"; | |
293 | }; | |
294 | ||
295 | &usbotg2 { | |
296 | vbus-supply = <®_usb_otg2_vbus>; | |
297 | dr_mode = "host"; | |
298 | status = "okay"; | |
299 | }; | |
300 | ||
67cb5d52 PC |
301 | &usbphy1 { |
302 | fsl,tx-d-cal = <106>; | |
303 | }; | |
304 | ||
305 | &usbphy2 { | |
306 | fsl,tx-d-cal = <106>; | |
307 | }; | |
308 | ||
d2daa2f7 SG |
309 | &usdhc2 { |
310 | pinctrl-names = "default"; | |
311 | pinctrl-0 = <&pinctrl_usdhc2>; | |
312 | non-removable; | |
313 | no-1-8-v; | |
314 | keep-power-in-suspend; | |
26cefdd1 | 315 | wakeup-source; |
d2daa2f7 SG |
316 | status = "okay"; |
317 | }; | |
318 | ||
319 | &usdhc3 { | |
320 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
321 | pinctrl-0 = <&pinctrl_usdhc3>; | |
322 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; | |
323 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; | |
324 | bus-width = <8>; | |
89c1a8cf | 325 | cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; |
d2daa2f7 SG |
326 | wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; |
327 | keep-power-in-suspend; | |
26cefdd1 | 328 | wakeup-source; |
d2daa2f7 SG |
329 | vmmc-supply = <&vcc_sd3>; |
330 | status = "okay"; | |
331 | }; | |
332 | ||
333 | &usdhc4 { | |
334 | pinctrl-names = "default"; | |
335 | pinctrl-0 = <&pinctrl_usdhc4>; | |
89c1a8cf | 336 | cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; |
d2daa2f7 SG |
337 | wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; |
338 | status = "okay"; | |
339 | }; | |
340 | ||
8c4a18e2 FE |
341 | &wdog1 { |
342 | pinctrl-names = "default"; | |
343 | pinctrl-0 = <&pinctrl_wdog>; | |
344 | fsl,ext-reset-output; | |
345 | }; | |
346 | ||
d2daa2f7 SG |
347 | &iomuxc { |
348 | imx6x-sdb { | |
9c86ae8c FE |
349 | pinctrl_audmux: audmuxgrp { |
350 | fsl,pins = < | |
351 | MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0 | |
352 | MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0 | |
353 | MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0 | |
354 | MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0 | |
355 | MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0 | |
356 | >; | |
357 | }; | |
358 | ||
d2daa2f7 SG |
359 | pinctrl_enet1: enet1grp { |
360 | fsl,pins = < | |
361 | MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1 | |
362 | MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1 | |
363 | MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1 | |
364 | MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1 | |
365 | MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1 | |
366 | MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1 | |
367 | MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1 | |
368 | MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1 | |
369 | MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081 | |
370 | MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081 | |
371 | MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081 | |
372 | MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081 | |
373 | MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081 | |
374 | MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 | |
9863aba5 FD |
375 | MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91 |
376 | >; | |
377 | }; | |
378 | ||
379 | pinctrl_enet_3v3: enet3v3grp { | |
380 | fsl,pins = < | |
381 | MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000 | |
382 | >; | |
383 | }; | |
384 | ||
385 | pinctrl_enet2: enet2grp { | |
386 | fsl,pins = < | |
387 | MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9 | |
388 | MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1 | |
389 | MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1 | |
390 | MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1 | |
391 | MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1 | |
392 | MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1 | |
393 | MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081 | |
394 | MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081 | |
395 | MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081 | |
396 | MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081 | |
397 | MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081 | |
398 | MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081 | |
d2daa2f7 SG |
399 | >; |
400 | }; | |
401 | ||
4014a4f7 AH |
402 | pinctrl_gpio_keys: gpio_keysgrp { |
403 | fsl,pins = < | |
404 | MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 | |
405 | MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059 | |
406 | >; | |
407 | }; | |
408 | ||
b3d8e11f FE |
409 | pinctrl_i2c1: i2c1grp { |
410 | fsl,pins = < | |
411 | MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1 | |
412 | MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1 | |
413 | >; | |
414 | }; | |
415 | ||
b0e96f83 CF |
416 | pinctrl_i2c3: i2c3grp { |
417 | fsl,pins = < | |
418 | MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 | |
419 | MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1 | |
420 | >; | |
421 | }; | |
422 | ||
9c86ae8c FE |
423 | pinctrl_i2c4: i2c4grp { |
424 | fsl,pins = < | |
425 | MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1 | |
426 | MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 | |
427 | >; | |
428 | }; | |
429 | ||
31ffdbc8 FE |
430 | pinctrl_lcd: lcdgrp { |
431 | fsl,pins = < | |
432 | MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 | |
433 | MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 | |
434 | MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 | |
435 | MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 | |
436 | MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 | |
437 | MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 | |
438 | MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 | |
439 | MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 | |
440 | MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 | |
441 | MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 | |
442 | MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 | |
443 | MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 | |
444 | MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 | |
445 | MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 | |
446 | MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 | |
447 | MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 | |
448 | MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 | |
449 | MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 | |
450 | MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 | |
451 | MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 | |
452 | MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 | |
453 | MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 | |
454 | MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 | |
455 | MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 | |
456 | MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 | |
457 | MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 | |
458 | MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 | |
459 | MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 | |
460 | MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 | |
461 | >; | |
462 | }; | |
463 | ||
03163470 FE |
464 | pinctrl_pcie: pciegrp { |
465 | fsl,pins = < | |
466 | MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0 | |
467 | >; | |
468 | }; | |
469 | ||
470 | pinctrl_pcie_reg: pciereggrp { | |
471 | fsl,pins = < | |
472 | MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0 | |
473 | >; | |
474 | }; | |
475 | ||
9863aba5 FD |
476 | pinctrl_peri_3v3: peri3v3grp { |
477 | fsl,pins = < | |
478 | MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 | |
479 | >; | |
480 | }; | |
481 | ||
31ffdbc8 FE |
482 | pinctrl_pwm3: pwm3grp-1 { |
483 | fsl,pins = < | |
484 | MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0 | |
485 | >; | |
486 | }; | |
487 | ||
c565e146 FE |
488 | pinctrl_qspi2: qspi2grp { |
489 | fsl,pins = < | |
490 | MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1 | |
491 | MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1 | |
492 | MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1 | |
493 | MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1 | |
494 | MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1 | |
495 | MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1 | |
496 | MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1 | |
497 | MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1 | |
498 | MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1 | |
499 | MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1 | |
500 | MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1 | |
501 | MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1 | |
502 | >; | |
503 | }; | |
504 | ||
d2daa2f7 SG |
505 | pinctrl_vcc_sd3: vccsd3grp { |
506 | fsl,pins = < | |
507 | MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 | |
508 | >; | |
509 | }; | |
510 | ||
29e88b6d FE |
511 | pinctrl_sai1: sai1grp { |
512 | fsl,pins = < | |
513 | MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130b0 | |
514 | MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130b0 | |
515 | MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120b0 | |
516 | MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130b0 | |
517 | MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0 | |
518 | >; | |
519 | }; | |
520 | ||
d2daa2f7 SG |
521 | pinctrl_uart1: uart1grp { |
522 | fsl,pins = < | |
523 | MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 | |
524 | MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 | |
525 | >; | |
526 | }; | |
527 | ||
528 | pinctrl_uart5: uart5grp { | |
529 | fsl,pins = < | |
530 | MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1 | |
531 | MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1 | |
532 | MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1 | |
533 | MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1 | |
534 | >; | |
535 | }; | |
536 | ||
960fefff FE |
537 | pinctrl_usb_otg1: usbotg1grp { |
538 | fsl,pins = < | |
539 | MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0 | |
540 | >; | |
541 | }; | |
542 | ||
543 | pinctrl_usb_otg1_id: usbotg1idgrp { | |
544 | fsl,pins = < | |
545 | MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059 | |
546 | >; | |
547 | }; | |
548 | ||
549 | pinctrl_usb_otg2: usbot2ggrp { | |
550 | fsl,pins = < | |
551 | MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0 | |
552 | >; | |
553 | }; | |
554 | ||
d2daa2f7 SG |
555 | pinctrl_usdhc2: usdhc2grp { |
556 | fsl,pins = < | |
557 | MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059 | |
558 | MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059 | |
559 | MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059 | |
560 | MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059 | |
561 | MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059 | |
562 | MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059 | |
563 | >; | |
564 | }; | |
565 | ||
566 | pinctrl_usdhc3: usdhc3grp { | |
567 | fsl,pins = < | |
568 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 | |
569 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 | |
570 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 | |
571 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 | |
572 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 | |
573 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 | |
574 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 | |
575 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 | |
576 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 | |
577 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 | |
578 | MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ | |
579 | MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ | |
580 | >; | |
581 | }; | |
582 | ||
583 | pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { | |
584 | fsl,pins = < | |
585 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9 | |
586 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9 | |
587 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9 | |
588 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9 | |
589 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9 | |
590 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9 | |
591 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9 | |
592 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9 | |
593 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9 | |
594 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9 | |
595 | >; | |
596 | }; | |
597 | ||
598 | pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { | |
599 | fsl,pins = < | |
600 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9 | |
601 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9 | |
602 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9 | |
603 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9 | |
604 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9 | |
605 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9 | |
606 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9 | |
607 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9 | |
608 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9 | |
609 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9 | |
610 | >; | |
611 | }; | |
612 | ||
613 | pinctrl_usdhc4: usdhc4grp { | |
614 | fsl,pins = < | |
615 | MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 | |
616 | MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 | |
617 | MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 | |
618 | MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 | |
619 | MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 | |
620 | MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 | |
621 | MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */ | |
622 | MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */ | |
623 | >; | |
624 | }; | |
8c4a18e2 FE |
625 | |
626 | pinctrl_wdog: wdoggrp { | |
627 | fsl,pins = < | |
628 | MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0 | |
629 | >; | |
630 | }; | |
d2daa2f7 SG |
631 | }; |
632 | }; |