[linux-2.6-block.git] / arch / arm / boot / dts / imx6sx-sdb.dts

/*
 * Copyright (C) 2014 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include "imx6sx.dtsi"

/ {
	model = "Freescale i.MX6 SoloX SDB Board";
	compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";

	chosen {
		stdout-path = &uart1;
	};

	memory {
		reg = <0x80000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vcc_sd3: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_vcc_sd3>;
			regulator-name = "VCC_SD3";
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
			gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rgmii";
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart5 { /* for bluetooth */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	fsl,uart-has-rtscts;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	non-removable;
	no-1-8-v;
	keep-power-in-suspend;
	enable-sdio-wakeup;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	bus-width = <8>;
	cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
	keep-power-in-suspend;
	enable-sdio-wakeup;
	vmmc-supply = <&vcc_sd3>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&iomuxc {
	imx6x-sdb {
		pinctrl_enet1: enet1grp {
			fsl,pins = <
				MX6SX_PAD_ENET1_MDIO__ENET1_MDIO	0xa0b1
				MX6SX_PAD_ENET1_MDC__ENET1_MDC		0xa0b1
				MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC	0xa0b1
				MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0	0xa0b1
				MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1	0xa0b1
				MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2	0xa0b1
				MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3	0xa0b1
				MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN	0xa0b1
				MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK	0x3081
				MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0	0x3081
				MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1	0x3081
				MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2	0x3081
				MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3	0x3081
				MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN	0x3081
			>;
		};

		pinctrl_vcc_sd3: vccsd3grp {
			fsl,pins = <
				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
				MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1
			>;
		};

		pinctrl_uart5: uart5grp {
			fsl,pins = <
				MX6SX_PAD_KEY_ROW3__UART5_RX		0x1b0b1
				MX6SX_PAD_KEY_COL3__UART5_TX		0x1b0b1
				MX6SX_PAD_KEY_ROW2__UART5_CTS_B		0x1b0b1
				MX6SX_PAD_KEY_COL2__UART5_RTS_B		0x1b0b1
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059
				MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059
				MX6SX_PAD_SD2_DATA0__USDHC2_DATA0	0x17059
				MX6SX_PAD_SD2_DATA1__USDHC2_DATA1	0x17059
				MX6SX_PAD_SD2_DATA2__USDHC2_DATA2	0x17059
				MX6SX_PAD_SD2_DATA3__USDHC2_DATA3	0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059
				MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */
				MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
			fsl,pins = <
				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9
				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9
				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9
				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9
				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9
				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9
				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9
				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9
				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9
				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059
				MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059
				MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059
				MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059
				MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059
				MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059
				MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */
				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */
			>;
		};
	};
};
Commit	Line	Data
d2daa2f7 SG	1	/*
	2	* Copyright (C) 2014 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	/dts-v1/;
	10
	11	#include "imx6sx.dtsi"
	12
	13	/ {
	14	model = "Freescale i.MX6 SoloX SDB Board";
	15	compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
	16
	17	chosen {
	18	stdout-path = &uart1;
	19	};
	20
	21	memory {
	22	reg = <0x80000000 0x40000000>;
	23	};
	24
	25	regulators {
	26	compatible = "simple-bus";
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29
	30	vcc_sd3: regulator@0 {
	31	compatible = "regulator-fixed";
	32	reg = <0>;
	33	pinctrl-names = "default";
	34	pinctrl-0 = <&pinctrl_vcc_sd3>;
	35	regulator-name = "VCC_SD3";
	36	regulator-min-microvolt = <3000000>;
	37	regulator-max-microvolt = <3000000>;
	38	gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
	39	enable-active-high;
	40	};
	41	};
	42	};
	43
	44	&fec1 {
	45	pinctrl-names = "default";
	46	pinctrl-0 = <&pinctrl_enet1>;
	47	phy-mode = "rgmii";
	48	status = "okay";
	49	};
	50
	51	&uart1 {
	52	pinctrl-names = "default";
	53	pinctrl-0 = <&pinctrl_uart1>;
	54	status = "okay";
	55	};
	56
	57	&uart5 { /* for bluetooth */
	58	pinctrl-names = "default";
	59	pinctrl-0 = <&pinctrl_uart5>;
	60	fsl,uart-has-rtscts;
	61	status = "okay";
	62	};
	63
	64	&usdhc2 {
65	pinctrl-names = "default";
66	pinctrl-0 = <&pinctrl_usdhc2>;
67	non-removable;
68	no-1-8-v;
69	keep-power-in-suspend;
70	enable-sdio-wakeup;
71	status = "okay";
72	};
73
74	&usdhc3 {
75	pinctrl-names = "default", "state_100mhz", "state_200mhz";
76	pinctrl-0 = <&pinctrl_usdhc3>;
77	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
78	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
79	bus-width = <8>;
80	cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
81	wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
82	keep-power-in-suspend;
83	enable-sdio-wakeup;
84	vmmc-supply = <&vcc_sd3>;
85	status = "okay";
86	};
87
88	&usdhc4 {
89	pinctrl-names = "default";
90	pinctrl-0 = <&pinctrl_usdhc4>;
91	cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
92	wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
93	status = "okay";
94	};
95
96	&iomuxc {
97	imx6x-sdb {
98	pinctrl_enet1: enet1grp {
99	fsl,pins = <
100	MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
101	MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
102	MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
103	MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
104	MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
105	MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
106	MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
107	MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
108	MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
109	MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
110	MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
111	MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
112	MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
113	MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
114	>;
115	};
116
117	pinctrl_vcc_sd3: vccsd3grp {
118	fsl,pins = <
119	MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
120	>;
121	};
122
123	pinctrl_uart1: uart1grp {
124	fsl,pins = <
125	MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
126	MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
127	>;
128	};
129
130	pinctrl_uart5: uart5grp {
131	fsl,pins = <
132	MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
133	MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
134	MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
135	MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
136	>;
137	};
138
139	pinctrl_usdhc2: usdhc2grp {
140	fsl,pins = <
141	MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
142	MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
143	MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
144	MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
145	MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
146	MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
147	>;
148	};
149
150	pinctrl_usdhc3: usdhc3grp {
151	fsl,pins = <
152	MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
153	MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
154	MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
155	MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
156	MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
157	MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
158	MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
159	MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
160	MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
161	MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
162	MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
163	MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
164	>;
165	};
166
167	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
168	fsl,pins = <
169	MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
170	MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
171	MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
172	MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
173	MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
174	MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
175	MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
176	MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
177	MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
178	MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
179	>;
180	};
181
182	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
183	fsl,pins = <
184	MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
185	MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
186	MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
187	MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
188	MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
189	MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
190	MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
191	MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
192	MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
193	MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
194	>;
195	};
196
197	pinctrl_usdhc4: usdhc4grp {
198	fsl,pins = <
199	MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
200	MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
201	MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
202	MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
203	MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
204	MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
205	MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
206	MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
207	>;
208	};
209	};
210	};