ARM: dts: imx6qdl-sabreauto: Support debug LED
[linux-2.6-block.git] / arch / arm / boot / dts / imx6sl-evk.dts
CommitLineData
117ccd55
SG
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
33106702 11#include <dt-bindings/gpio/gpio.h>
4291b645 12#include <dt-bindings/input/input.h>
117ccd55
SG
13#include "imx6sl.dtsi"
14
15/ {
16 model = "Freescale i.MX6 SoloLite EVK Board";
17 compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
18
19 memory {
20 reg = <0x80000000 0x40000000>;
21 };
6022232b 22
33106702
FE
23 leds {
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_led>;
27
28 user {
29 label = "debug";
30 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "heartbeat";
32 };
33 };
34
6022232b
PC
35 regulators {
36 compatible = "simple-bus";
56160e33
SG
37 #address-cells = <1>;
38 #size-cells = <0>;
6022232b 39
56160e33 40 reg_usb_otg1_vbus: regulator@0 {
6022232b 41 compatible = "regulator-fixed";
56160e33 42 reg = <0>;
6022232b
PC
43 regulator-name = "usb_otg1_vbus";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 gpio = <&gpio4 0 0>;
47 enable-active-high;
48 };
49
56160e33 50 reg_usb_otg2_vbus: regulator@1 {
6022232b 51 compatible = "regulator-fixed";
56160e33 52 reg = <1>;
6022232b
PC
53 regulator-name = "usb_otg2_vbus";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
56 gpio = <&gpio4 2 0>;
57 enable-active-high;
58 };
032de438
FE
59
60 reg_aud3v: regulator@2 {
61 compatible = "regulator-fixed";
62 reg = <2>;
63 regulator-name = "wm8962-supply-3v15";
64 regulator-min-microvolt = <3150000>;
65 regulator-max-microvolt = <3150000>;
66 regulator-boot-on;
67 };
68
69 reg_aud4v: regulator@3 {
70 compatible = "regulator-fixed";
71 reg = <3>;
72 regulator-name = "wm8962-supply-4v2";
73 regulator-min-microvolt = <4325000>;
74 regulator-max-microvolt = <4325000>;
75 regulator-boot-on;
76 };
77 };
78
79 sound {
80 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
81 model = "wm8962-audio";
82 ssi-controller = <&ssi2>;
83 audio-codec = <&codec>;
84 audio-routing =
85 "Headphone Jack", "HPOUTL",
86 "Headphone Jack", "HPOUTR",
87 "Ext Spk", "SPKOUTL",
88 "Ext Spk", "SPKOUTR",
89 "AMIC", "MICBIAS",
90 "IN3R", "AMIC";
91 mux-int-port = <2>;
92 mux-ext-port = <3>;
6022232b 93 };
117ccd55
SG
94};
95
032de438
FE
96&audmux {
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_audmux3>;
99 status = "okay";
100};
101
d1b53975
HS
102&ecspi1 {
103 fsl,spi-num-chipselects = <1>;
104 cs-gpios = <&gpio4 11 0>;
105 pinctrl-names = "default";
fffaa65d 106 pinctrl-0 = <&pinctrl_ecspi1>;
d1b53975
HS
107 status = "okay";
108
109 flash: m25p80@0 {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 compatible = "st,m25p32";
113 spi-max-frequency = <20000000>;
114 reg = <0>;
115 };
116};
117
117ccd55
SG
118&fec {
119 pinctrl-names = "default";
fffaa65d 120 pinctrl-0 = <&pinctrl_fec>;
117ccd55
SG
121 phy-mode = "rmii";
122 status = "okay";
123};
124
56df2680
FE
125&i2c1 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c1>;
129 status = "okay";
130
131 pmic: pfuze100@08 {
132 compatible = "fsl,pfuze100";
133 reg = <0x08>;
134
135 regulators {
136 sw1a_reg: sw1ab {
137 regulator-min-microvolt = <300000>;
138 regulator-max-microvolt = <1875000>;
139 regulator-boot-on;
140 regulator-always-on;
141 regulator-ramp-delay = <6250>;
142 };
143
144 sw1c_reg: sw1c {
145 regulator-min-microvolt = <300000>;
146 regulator-max-microvolt = <1875000>;
147 regulator-boot-on;
148 regulator-always-on;
149 regulator-ramp-delay = <6250>;
150 };
151
152 sw2_reg: sw2 {
153 regulator-min-microvolt = <800000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 sw3a_reg: sw3a {
160 regulator-min-microvolt = <400000>;
161 regulator-max-microvolt = <1975000>;
162 regulator-boot-on;
163 regulator-always-on;
164 };
165
166 sw3b_reg: sw3b {
167 regulator-min-microvolt = <400000>;
168 regulator-max-microvolt = <1975000>;
169 regulator-boot-on;
170 regulator-always-on;
171 };
172
173 sw4_reg: sw4 {
174 regulator-min-microvolt = <800000>;
175 regulator-max-microvolt = <3300000>;
176 };
177
178 swbst_reg: swbst {
179 regulator-min-microvolt = <5000000>;
180 regulator-max-microvolt = <5150000>;
181 };
182
183 snvs_reg: vsnvs {
184 regulator-min-microvolt = <1000000>;
185 regulator-max-microvolt = <3000000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 vref_reg: vrefddr {
191 regulator-boot-on;
192 regulator-always-on;
193 };
194
195 vgen1_reg: vgen1 {
196 regulator-min-microvolt = <800000>;
197 regulator-max-microvolt = <1550000>;
198 };
199
200 vgen2_reg: vgen2 {
201 regulator-min-microvolt = <800000>;
202 regulator-max-microvolt = <1550000>;
203 };
204
205 vgen3_reg: vgen3 {
206 regulator-min-microvolt = <1800000>;
207 regulator-max-microvolt = <3300000>;
208 };
209
210 vgen4_reg: vgen4 {
211 regulator-min-microvolt = <1800000>;
212 regulator-max-microvolt = <3300000>;
213 regulator-always-on;
214 };
215
216 vgen5_reg: vgen5 {
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <3300000>;
219 regulator-always-on;
220 };
221
222 vgen6_reg: vgen6 {
223 regulator-min-microvolt = <1800000>;
224 regulator-max-microvolt = <3300000>;
225 regulator-always-on;
226 };
227 };
228 };
229};
230
032de438
FE
231&i2c2 {
232 clock-frequency = <100000>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_i2c2>;
235 status = "okay";
236
237 codec: wm8962@1a {
238 compatible = "wlf,wm8962";
239 reg = <0x1a>;
240 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
241 DCVDD-supply = <&vgen3_reg>;
242 DBVDD-supply = <&reg_aud3v>;
243 AVDD-supply = <&vgen3_reg>;
244 CPVDD-supply = <&vgen3_reg>;
245 MICVDD-supply = <&reg_aud3v>;
246 PLLVDD-supply = <&vgen3_reg>;
247 SPKVDD1-supply = <&reg_aud4v>;
248 SPKVDD2-supply = <&reg_aud4v>;
249 };
250};
251
117ccd55
SG
252&iomuxc {
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_hog>;
255
fffaa65d 256 imx6sl-evk {
117ccd55
SG
257 pinctrl_hog: hoggrp {
258 fsl,pins = <
259 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
260 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
261 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
262 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
263 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
6022232b
PC
264 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
265 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
032de438
FE
266 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
267 >;
268 };
269
270 pinctrl_audmux3: audmux3grp {
271 fsl,pins = <
272 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
273 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
274 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
275 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
117ccd55
SG
276 >;
277 };
fffaa65d
SG
278
279 pinctrl_ecspi1: ecspi1grp {
280 fsl,pins = <
281 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
282 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
283 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
284 >;
285 };
286
287 pinctrl_fec: fecgrp {
288 fsl,pins = <
289 MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
290 MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
291 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
292 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
293 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
294 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
295 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
296 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
297 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
298 >;
299 };
300
56df2680
FE
301 pinctrl_i2c1: i2c1grp {
302 fsl,pins = <
303 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
304 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
305 >;
306 };
307
032de438
FE
308
309 pinctrl_i2c2: i2c2grp {
310 fsl,pins = <
311 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
312 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
313 >;
314 };
315
33106702
FE
316 pinctrl_led: ledgrp {
317 fsl,pins = <
318 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
319 >;
320 };
321
4291b645
AH
322 pinctrl_kpp: kppgrp {
323 fsl,pins = <
324 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
325 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
326 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
327 MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
328 MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
329 MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
330 >;
331 };
332
fffaa65d
SG
333 pinctrl_uart1: uart1grp {
334 fsl,pins = <
335 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
336 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
337 >;
338 };
339
340 pinctrl_usbotg1: usbotg1grp {
341 fsl,pins = <
342 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
343 >;
344 };
345
346 pinctrl_usdhc1: usdhc1grp {
347 fsl,pins = <
348 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
349 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
350 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
351 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
352 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
353 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
354 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
355 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
356 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
357 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
358 >;
359 };
360
361 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
362 fsl,pins = <
363 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
364 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
365 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
366 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
367 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
368 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
369 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
370 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
371 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
372 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
373 >;
374 };
375
376 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
377 fsl,pins = <
378 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
379 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
380 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
381 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
382 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
383 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
384 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
385 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
386 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
387 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
388 >;
389 };
390
391 pinctrl_usdhc2: usdhc2grp {
392 fsl,pins = <
393 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
394 MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
395 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
396 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
397 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
398 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
399 >;
400 };
401
402 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
403 fsl,pins = <
404 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
405 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
406 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
407 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
408 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
409 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
410 >;
411 };
412
413 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
414 fsl,pins = <
415 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
416 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
417 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
418 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
419 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
420 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
421 >;
422 };
423
424 pinctrl_usdhc3: usdhc3grp {
425 fsl,pins = <
426 MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
427 MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
428 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
429 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
430 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
431 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
432 >;
433 };
434
435 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
436 fsl,pins = <
437 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
438 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
439 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
440 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
441 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
442 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
443 >;
444 };
445
446 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
447 fsl,pins = <
448 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
449 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
450 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
451 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
452 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
453 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
454 >;
455 };
117ccd55
SG
456 };
457};
458
4291b645
AH
459&kpp {
460 pinctrl-names = "default";
461 pinctrl-0 = <&pinctrl_kpp>;
462 linux,keymap = <
463 MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
464 MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
465 MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
466 MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
467 MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
468 MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
469 MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
470 MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
471 >;
472 status = "okay";
473};
474
032de438
FE
475&ssi2 {
476 fsl,mode = "i2s-slave";
477 status = "okay";
478};
479
117ccd55
SG
480&uart1 {
481 pinctrl-names = "default";
fffaa65d 482 pinctrl-0 = <&pinctrl_uart1>;
117ccd55
SG
483 status = "okay";
484};
485
6022232b
PC
486&usbotg1 {
487 vbus-supply = <&reg_usb_otg1_vbus>;
488 pinctrl-names = "default";
fffaa65d 489 pinctrl-0 = <&pinctrl_usbotg1>;
6022232b
PC
490 disable-over-current;
491 status = "okay";
492};
493
494&usbotg2 {
495 vbus-supply = <&reg_usb_otg2_vbus>;
496 dr_mode = "host";
497 disable-over-current;
498 status = "okay";
499};
500
117ccd55 501&usdhc1 {
fa87dfd6 502 pinctrl-names = "default", "state_100mhz", "state_200mhz";
fffaa65d
SG
503 pinctrl-0 = <&pinctrl_usdhc1>;
504 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
505 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
117ccd55
SG
506 bus-width = <8>;
507 cd-gpios = <&gpio4 7 0>;
508 wp-gpios = <&gpio4 6 0>;
509 status = "okay";
510};
511
512&usdhc2 {
fa87dfd6 513 pinctrl-names = "default", "state_100mhz", "state_200mhz";
fffaa65d
SG
514 pinctrl-0 = <&pinctrl_usdhc2>;
515 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
516 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
117ccd55
SG
517 cd-gpios = <&gpio5 0 0>;
518 wp-gpios = <&gpio4 29 0>;
519 status = "okay";
520};
521
522&usdhc3 {
fa87dfd6 523 pinctrl-names = "default", "state_100mhz", "state_200mhz";
fffaa65d
SG
524 pinctrl-0 = <&pinctrl_usdhc3>;
525 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
526 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
117ccd55
SG
527 cd-gpios = <&gpio3 22 0>;
528 status = "okay";
529};