Commit | Line | Data |
---|---|---|
2688a32f FE |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | ||
89c1a8cf DA |
12 | #include <dt-bindings/gpio/gpio.h> |
13 | ||
2688a32f FE |
14 | / { |
15 | regulators { | |
16 | compatible = "simple-bus"; | |
56160e33 SG |
17 | #address-cells = <1>; |
18 | #size-cells = <0>; | |
2688a32f | 19 | |
56160e33 | 20 | reg_2p5v: regulator@0 { |
2688a32f | 21 | compatible = "regulator-fixed"; |
56160e33 | 22 | reg = <0>; |
2688a32f FE |
23 | regulator-name = "2P5V"; |
24 | regulator-min-microvolt = <2500000>; | |
25 | regulator-max-microvolt = <2500000>; | |
26 | regulator-always-on; | |
27 | }; | |
28 | ||
56160e33 | 29 | reg_3p3v: regulator@1 { |
2688a32f | 30 | compatible = "regulator-fixed"; |
56160e33 | 31 | reg = <1>; |
2688a32f FE |
32 | regulator-name = "3P3V"; |
33 | regulator-min-microvolt = <3300000>; | |
34 | regulator-max-microvolt = <3300000>; | |
35 | regulator-always-on; | |
36 | }; | |
37 | }; | |
38 | ||
39 | sound { | |
40 | compatible = "fsl,imx6-wandboard-sgtl5000", | |
41 | "fsl,imx-audio-sgtl5000"; | |
42 | model = "imx6-wandboard-sgtl5000"; | |
43 | ssi-controller = <&ssi1>; | |
44 | audio-codec = <&codec>; | |
45 | audio-routing = | |
46 | "MIC_IN", "Mic Jack", | |
47 | "Mic Jack", "Mic Bias", | |
48 | "Headphone Jack", "HP_OUT"; | |
49 | mux-int-port = <1>; | |
50 | mux-ext-port = <3>; | |
51 | }; | |
c9d96df2 FE |
52 | |
53 | sound-spdif { | |
54 | compatible = "fsl,imx-audio-spdif"; | |
55 | model = "imx-spdif"; | |
56 | spdif-controller = <&spdif>; | |
57 | spdif-out; | |
58 | }; | |
2688a32f FE |
59 | }; |
60 | ||
61 | &audmux { | |
62 | pinctrl-names = "default"; | |
817c27a1 | 63 | pinctrl-0 = <&pinctrl_audmux>; |
2688a32f FE |
64 | status = "okay"; |
65 | }; | |
66 | ||
fed687c5 FE |
67 | &hdmi { |
68 | ddc-i2c-bus = <&i2c1>; | |
69 | status = "okay"; | |
70 | }; | |
71 | ||
72 | &i2c1 { | |
73 | clock-frequency = <100000>; | |
74 | pinctrl-names = "default"; | |
75 | pinctrl-0 = <&pinctrl_i2c1>; | |
76 | status = "okay"; | |
77 | }; | |
78 | ||
2688a32f FE |
79 | &i2c2 { |
80 | clock-frequency = <100000>; | |
81 | pinctrl-names = "default"; | |
817c27a1 | 82 | pinctrl-0 = <&pinctrl_i2c2>; |
2688a32f FE |
83 | status = "okay"; |
84 | ||
85 | codec: sgtl5000@0a { | |
86 | compatible = "fsl,sgtl5000"; | |
87 | reg = <0x0a>; | |
b26a68c1 | 88 | clocks = <&clks IMX6QDL_CLK_CKO>; |
2688a32f FE |
89 | VDDA-supply = <®_2p5v>; |
90 | VDDIO-supply = <®_3p3v>; | |
79935915 | 91 | lrclk-strength = <3>; |
2688a32f FE |
92 | }; |
93 | }; | |
94 | ||
95 | &iomuxc { | |
96 | pinctrl-names = "default"; | |
2688a32f | 97 | |
817c27a1 | 98 | imx6qdl-wandboard { |
817c27a1 SG |
99 | |
100 | pinctrl_audmux: audmuxgrp { | |
101 | fsl,pins = < | |
77112dd5 NC |
102 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
103 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 | |
104 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 | |
105 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 | |
817c27a1 SG |
106 | >; |
107 | }; | |
108 | ||
109 | pinctrl_enet: enetgrp { | |
110 | fsl,pins = < | |
111 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
112 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
c007b3a6 UKK |
113 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
114 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 | |
115 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 | |
116 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 | |
117 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 | |
118 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 | |
817c27a1 | 119 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
c007b3a6 UKK |
120 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
121 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 | |
122 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 | |
123 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 | |
124 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 | |
125 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 | |
817c27a1 | 126 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
9fc77821 | 127 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
817c27a1 SG |
128 | >; |
129 | }; | |
130 | ||
fed687c5 FE |
131 | pinctrl_i2c1: i2c1grp { |
132 | fsl,pins = < | |
05c183e4 JT |
133 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
134 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
fed687c5 FE |
135 | >; |
136 | }; | |
137 | ||
817c27a1 SG |
138 | pinctrl_i2c2: i2c2grp { |
139 | fsl,pins = < | |
140 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
141 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
142 | >; | |
143 | }; | |
144 | ||
145 | pinctrl_spdif: spdifgrp { | |
146 | fsl,pins = < | |
147 | MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 | |
148 | >; | |
149 | }; | |
150 | ||
151 | pinctrl_uart1: uart1grp { | |
152 | fsl,pins = < | |
153 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 | |
154 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 | |
155 | >; | |
156 | }; | |
157 | ||
158 | pinctrl_uart3: uart3grp { | |
159 | fsl,pins = < | |
160 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 | |
161 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 | |
162 | MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 | |
163 | MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 | |
164 | >; | |
165 | }; | |
166 | ||
167 | pinctrl_usbotg: usbotggrp { | |
168 | fsl,pins = < | |
169 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
170 | >; | |
171 | }; | |
172 | ||
173 | pinctrl_usdhc1: usdhc1grp { | |
174 | fsl,pins = < | |
175 | MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 | |
176 | MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 | |
177 | MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 | |
178 | MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 | |
179 | MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 | |
180 | MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 | |
181 | >; | |
182 | }; | |
183 | ||
184 | pinctrl_usdhc2: usdhc2grp { | |
185 | fsl,pins = < | |
186 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 | |
187 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 | |
188 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 | |
189 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 | |
190 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 | |
191 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 | |
192 | >; | |
193 | }; | |
194 | ||
195 | pinctrl_usdhc3: usdhc3grp { | |
196 | fsl,pins = < | |
197 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
198 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
199 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
200 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
201 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
202 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
203 | >; | |
204 | }; | |
2688a32f FE |
205 | }; |
206 | }; | |
207 | ||
208 | &fec { | |
209 | pinctrl-names = "default"; | |
817c27a1 | 210 | pinctrl-0 = <&pinctrl_enet>; |
2688a32f | 211 | phy-mode = "rgmii"; |
12de44f5 | 212 | phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; |
9fc77821 SS |
213 | interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, |
214 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; | |
a28eeb43 | 215 | fsl,err006687-workaround-present; |
2688a32f FE |
216 | status = "okay"; |
217 | }; | |
218 | ||
c9d96df2 FE |
219 | &spdif { |
220 | pinctrl-names = "default"; | |
817c27a1 | 221 | pinctrl-0 = <&pinctrl_spdif>; |
c9d96df2 FE |
222 | status = "okay"; |
223 | }; | |
224 | ||
2688a32f | 225 | &ssi1 { |
2688a32f FE |
226 | status = "okay"; |
227 | }; | |
228 | ||
229 | &uart1 { | |
230 | pinctrl-names = "default"; | |
817c27a1 | 231 | pinctrl-0 = <&pinctrl_uart1>; |
2688a32f FE |
232 | status = "okay"; |
233 | }; | |
234 | ||
235 | &uart3 { | |
236 | pinctrl-names = "default"; | |
817c27a1 | 237 | pinctrl-0 = <&pinctrl_uart3>; |
2e7c416c | 238 | uart-has-rtscts; |
2688a32f FE |
239 | status = "okay"; |
240 | }; | |
241 | ||
242 | &usbh1 { | |
243 | status = "okay"; | |
244 | }; | |
245 | ||
e9ac890a FE |
246 | &usbotg { |
247 | pinctrl-names = "default"; | |
817c27a1 | 248 | pinctrl-0 = <&pinctrl_usbotg>; |
e9ac890a FE |
249 | disable-over-current; |
250 | dr_mode = "peripheral"; | |
251 | status = "okay"; | |
252 | }; | |
253 | ||
2688a32f FE |
254 | &usdhc1 { |
255 | pinctrl-names = "default"; | |
817c27a1 | 256 | pinctrl-0 = <&pinctrl_usdhc1>; |
89c1a8cf | 257 | cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; |
2688a32f FE |
258 | status = "okay"; |
259 | }; | |
260 | ||
2688a32f FE |
261 | &usdhc3 { |
262 | pinctrl-names = "default"; | |
817c27a1 | 263 | pinctrl-0 = <&pinctrl_usdhc3>; |
89c1a8cf | 264 | cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; |
2688a32f FE |
265 | status = "okay"; |
266 | }; |