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b32e7002 GB |
1 | /* |
2 | * Copyright 2015 Boundary Devices, Inc. | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This file is distributed in the hope that it will be useful | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * Or, alternatively | |
19 | * | |
20 | * b) Permission is hereby granted, free of charge, to any person | |
21 | * obtaining a copy of this software and associated documentation | |
22 | * files (the "Software"), to deal in the Software without | |
23 | * restriction, including without limitation the rights to use | |
24 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
25 | * sell copies of the Software, and to permit persons to whom the | |
26 | * Software is furnished to do so, subject to the following | |
27 | * conditions: | |
28 | * | |
29 | * The above copyright notice and this permission notice shall be | |
30 | * included in all copies or substantial portions of the Software. | |
31 | * | |
32 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND | |
33 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
34 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
35 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
36 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY | |
37 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
38 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
39 | * OTHER DEALINGS IN THE SOFTWARE. | |
40 | */ | |
41 | #include <dt-bindings/gpio/gpio.h> | |
42 | #include <dt-bindings/input/input.h> | |
43 | ||
44 | / { | |
45 | chosen { | |
46 | stdout-path = &uart2; | |
47 | }; | |
48 | ||
49 | memory { | |
50 | reg = <0x10000000 0xF0000000>; | |
51 | }; | |
52 | ||
53 | regulators { | |
54 | compatible = "simple-bus"; | |
55 | #address-cells = <1>; | |
56 | #size-cells = <0>; | |
57 | ||
58 | reg_1p8v: regulator@0 { | |
59 | compatible = "regulator-fixed"; | |
60 | reg = <0>; | |
61 | regulator-name = "1P8V"; | |
62 | regulator-min-microvolt = <1800000>; | |
63 | regulator-max-microvolt = <1800000>; | |
64 | regulator-always-on; | |
65 | }; | |
66 | ||
67 | reg_2p5v: regulator@1 { | |
68 | compatible = "regulator-fixed"; | |
69 | reg = <1>; | |
70 | regulator-name = "2P5V"; | |
71 | regulator-min-microvolt = <2500000>; | |
72 | regulator-max-microvolt = <2500000>; | |
73 | regulator-always-on; | |
74 | }; | |
75 | ||
76 | reg_3p3v: regulator@2 { | |
77 | compatible = "regulator-fixed"; | |
78 | reg = <2>; | |
79 | regulator-name = "3P3V"; | |
80 | regulator-min-microvolt = <3300000>; | |
81 | regulator-max-microvolt = <3300000>; | |
82 | regulator-always-on; | |
83 | }; | |
84 | ||
85 | reg_usb_otg_vbus: regulator@3 { | |
86 | compatible = "regulator-fixed"; | |
87 | reg = <3>; | |
88 | regulator-name = "usb_otg_vbus"; | |
89 | regulator-min-microvolt = <5000000>; | |
90 | regulator-max-microvolt = <5000000>; | |
91 | gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; | |
92 | enable-active-high; | |
93 | }; | |
94 | ||
95 | reg_usb_h1_vbus: regulator@4 { | |
96 | compatible = "regulator-fixed"; | |
97 | reg = <4>; | |
98 | pinctrl-names = "default"; | |
99 | pinctrl-0 = <&pinctrl_usbh1>; | |
100 | regulator-name = "usb_h1_vbus"; | |
101 | regulator-min-microvolt = <3300000>; | |
102 | regulator-max-microvolt = <3300000>; | |
103 | gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; | |
104 | enable-active-high; | |
105 | }; | |
106 | ||
107 | reg_wlan_vmmc: regulator@5 { | |
108 | compatible = "regulator-fixed"; | |
109 | reg = <5>; | |
110 | pinctrl-names = "default"; | |
111 | pinctrl-0 = <&pinctrl_wlan_vmmc>; | |
112 | regulator-name = "reg_wlan_vmmc"; | |
113 | regulator-min-microvolt = <3300000>; | |
114 | regulator-max-microvolt = <3300000>; | |
115 | gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; | |
116 | startup-delay-us = <70000>; | |
117 | enable-active-high; | |
118 | }; | |
119 | ||
120 | reg_can_xcvr: regulator@6 { | |
121 | compatible = "regulator-fixed"; | |
122 | reg = <6>; | |
123 | regulator-name = "CAN XCVR"; | |
124 | regulator-min-microvolt = <3300000>; | |
125 | regulator-max-microvolt = <3300000>; | |
126 | pinctrl-names = "default"; | |
127 | pinctrl-0 = <&pinctrl_can_xcvr>; | |
128 | gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
129 | }; | |
130 | }; | |
131 | ||
132 | gpio-keys { | |
133 | compatible = "gpio-keys"; | |
134 | pinctrl-names = "default"; | |
135 | pinctrl-0 = <&pinctrl_gpio_keys>; | |
136 | ||
137 | power { | |
138 | label = "Power Button"; | |
139 | gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; | |
140 | linux,code = <KEY_POWER>; | |
26cefdd1 | 141 | wakeup-source; |
b32e7002 GB |
142 | }; |
143 | ||
144 | menu { | |
145 | label = "Menu"; | |
146 | gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; | |
147 | linux,code = <KEY_MENU>; | |
148 | }; | |
149 | ||
150 | home { | |
151 | label = "Home"; | |
152 | gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; | |
153 | linux,code = <KEY_HOME>; | |
154 | }; | |
155 | ||
156 | back { | |
157 | label = "Back"; | |
158 | gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; | |
159 | linux,code = <KEY_BACK>; | |
160 | }; | |
161 | ||
162 | volume-up { | |
163 | label = "Volume Up"; | |
164 | gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; | |
165 | linux,code = <KEY_VOLUMEUP>; | |
166 | }; | |
167 | ||
168 | volume-down { | |
169 | label = "Volume Down"; | |
170 | gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; | |
171 | linux,code = <KEY_VOLUMEDOWN>; | |
172 | }; | |
173 | }; | |
174 | ||
175 | i2cmux@2 { | |
176 | compatible = "i2c-mux-gpio"; | |
177 | pinctrl-names = "default"; | |
178 | pinctrl-0 = <&pinctrl_i2c2mux>; | |
179 | #address-cells = <1>; | |
180 | #size-cells = <0>; | |
181 | mux-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH | |
182 | &gpio4 15 GPIO_ACTIVE_HIGH>; | |
183 | i2c-parent = <&i2c2>; | |
184 | idle-state = <0>; | |
185 | ||
186 | i2c2@1 { | |
187 | reg = <1>; | |
188 | #address-cells = <1>; | |
189 | #size-cells = <0>; | |
190 | }; | |
191 | ||
192 | i2c2@2 { | |
193 | reg = <2>; | |
194 | #address-cells = <1>; | |
195 | #size-cells = <0>; | |
196 | }; | |
197 | }; | |
198 | ||
199 | i2cmux@3 { | |
200 | compatible = "i2c-mux-gpio"; | |
201 | pinctrl-names = "default"; | |
202 | pinctrl-0 = <&pinctrl_i2c3mux>; | |
203 | #address-cells = <1>; | |
204 | #size-cells = <0>; | |
205 | mux-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; | |
206 | i2c-parent = <&i2c3>; | |
207 | idle-state = <0>; | |
208 | ||
209 | i2c3@1 { | |
210 | reg = <1>; | |
211 | #address-cells = <1>; | |
212 | #size-cells = <0>; | |
213 | }; | |
214 | }; | |
215 | ||
216 | leds { | |
217 | compatible = "gpio-leds"; | |
218 | ||
219 | speaker-enable { | |
220 | gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; | |
221 | retain-state-suspended; | |
222 | default-state = "off"; | |
223 | }; | |
224 | ||
225 | ttymxc4-rs232 { | |
226 | gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; | |
227 | retain-state-suspended; | |
228 | default-state = "on"; | |
229 | }; | |
230 | }; | |
231 | ||
a7859df4 | 232 | backlight_lcd: backlight-lcd { |
b32e7002 GB |
233 | compatible = "pwm-backlight"; |
234 | pwms = <&pwm1 0 5000000>; | |
235 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
236 | default-brightness-level = <7>; | |
237 | power-supply = <®_3p3v>; | |
238 | status = "okay"; | |
239 | }; | |
240 | ||
a7859df4 | 241 | backlight_lvds0: backlight-lvds0 { |
b32e7002 GB |
242 | compatible = "pwm-backlight"; |
243 | pwms = <&pwm4 0 5000000>; | |
244 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
245 | default-brightness-level = <7>; | |
246 | power-supply = <®_3p3v>; | |
247 | status = "okay"; | |
248 | }; | |
249 | ||
a7859df4 | 250 | backlight_lvds1: backlight-lvds1 { |
b32e7002 GB |
251 | compatible = "pwm-backlight"; |
252 | pwms = <&pwm2 0 5000000>; | |
253 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
254 | default-brightness-level = <7>; | |
255 | power-supply = <®_3p3v>; | |
256 | status = "okay"; | |
257 | }; | |
258 | ||
259 | lcd_display: display@di0 { | |
260 | compatible = "fsl,imx-parallel-display"; | |
261 | #address-cells = <1>; | |
262 | #size-cells = <0>; | |
263 | interface-pix-fmt = "bgr666"; | |
264 | pinctrl-names = "default"; | |
265 | pinctrl-0 = <&pinctrl_j15>; | |
266 | status = "okay"; | |
267 | ||
268 | port@0 { | |
269 | reg = <0>; | |
270 | ||
271 | lcd_display_in: endpoint { | |
272 | remote-endpoint = <&ipu1_di0_disp0>; | |
273 | }; | |
274 | }; | |
275 | ||
276 | port@1 { | |
277 | reg = <1>; | |
278 | ||
279 | lcd_display_out: endpoint { | |
280 | remote-endpoint = <&lcd_panel_in>; | |
281 | }; | |
282 | }; | |
283 | }; | |
284 | ||
a7859df4 | 285 | panel-lcd { |
b32e7002 GB |
286 | compatible = "okaya,rs800480t-7x0gp"; |
287 | backlight = <&backlight_lcd>; | |
288 | ||
289 | port { | |
290 | lcd_panel_in: endpoint { | |
291 | remote-endpoint = <&lcd_display_out>; | |
292 | }; | |
293 | }; | |
294 | }; | |
295 | ||
a7859df4 | 296 | panel-lvds0 { |
b32e7002 GB |
297 | compatible = "hannstar,hsd100pxn1"; |
298 | backlight = <&backlight_lvds0>; | |
299 | ||
300 | port { | |
301 | panel_in_lvds0: endpoint { | |
302 | remote-endpoint = <&lvds0_out>; | |
303 | }; | |
304 | }; | |
305 | }; | |
306 | ||
a7859df4 | 307 | panel-lvds1 { |
b32e7002 GB |
308 | compatible = "hannstar,hsd100pxn1"; |
309 | backlight = <&backlight_lvds1>; | |
310 | ||
311 | port { | |
312 | panel_in_lvds1: endpoint { | |
313 | remote-endpoint = <&lvds1_out>; | |
314 | }; | |
315 | }; | |
316 | }; | |
317 | ||
318 | sound { | |
319 | compatible = "fsl,imx6q-nitrogen6_max-sgtl5000", | |
320 | "fsl,imx-audio-sgtl5000"; | |
321 | model = "imx6q-nitrogen6_max-sgtl5000"; | |
b32e7002 GB |
322 | ssi-controller = <&ssi1>; |
323 | audio-codec = <&codec>; | |
324 | audio-routing = | |
325 | "MIC_IN", "Mic Jack", | |
326 | "Mic Jack", "Mic Bias", | |
327 | "Headphone Jack", "HP_OUT"; | |
328 | mux-int-port = <1>; | |
329 | mux-ext-port = <3>; | |
330 | }; | |
331 | }; | |
332 | ||
333 | &audmux { | |
334 | pinctrl-names = "default"; | |
335 | pinctrl-0 = <&pinctrl_audmux>; | |
336 | status = "okay"; | |
337 | }; | |
338 | ||
339 | &can1 { | |
340 | pinctrl-names = "default"; | |
341 | pinctrl-0 = <&pinctrl_can1>; | |
342 | xceiver-supply = <®_can_xcvr>; | |
343 | status = "okay"; | |
344 | }; | |
345 | ||
346 | &clks { | |
347 | assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, | |
348 | <&clks IMX6QDL_CLK_LDB_DI1_SEL>; | |
349 | assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, | |
350 | <&clks IMX6QDL_CLK_PLL3_USB_OTG>; | |
351 | }; | |
352 | ||
353 | &ecspi1 { | |
354 | fsl,spi-num-chipselects = <1>; | |
355 | cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; | |
356 | pinctrl-names = "default"; | |
357 | pinctrl-0 = <&pinctrl_ecspi1>; | |
358 | status = "okay"; | |
359 | ||
360 | flash: m25p80@0 { | |
361 | compatible = "microchip,sst25vf016b"; | |
362 | spi-max-frequency = <20000000>; | |
363 | reg = <0>; | |
364 | }; | |
365 | }; | |
366 | ||
367 | &fec { | |
368 | pinctrl-names = "default"; | |
369 | pinctrl-0 = <&pinctrl_enet>; | |
370 | phy-mode = "rgmii"; | |
371 | phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; | |
372 | txen-skew-ps = <0>; | |
373 | txc-skew-ps = <3000>; | |
374 | rxdv-skew-ps = <0>; | |
375 | rxc-skew-ps = <3000>; | |
376 | rxd0-skew-ps = <0>; | |
377 | rxd1-skew-ps = <0>; | |
378 | rxd2-skew-ps = <0>; | |
379 | rxd3-skew-ps = <0>; | |
380 | txd0-skew-ps = <0>; | |
381 | txd1-skew-ps = <0>; | |
382 | txd2-skew-ps = <0>; | |
383 | txd3-skew-ps = <0>; | |
384 | interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, | |
385 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; | |
a28eeb43 | 386 | fsl,err006687-workaround-present; |
b32e7002 GB |
387 | status = "okay"; |
388 | }; | |
389 | ||
390 | &hdmi { | |
391 | ddc-i2c-bus = <&i2c2>; | |
392 | status = "okay"; | |
393 | }; | |
394 | ||
395 | &i2c1 { | |
396 | clock-frequency = <100000>; | |
397 | pinctrl-names = "default"; | |
398 | pinctrl-0 = <&pinctrl_i2c1>; | |
399 | status = "okay"; | |
400 | ||
401 | codec: sgtl5000@0a { | |
402 | compatible = "fsl,sgtl5000"; | |
6ab5c2b6 GB |
403 | pinctrl-names = "default"; |
404 | pinctrl-0 = <&pinctrl_sgtl5000>; | |
b32e7002 | 405 | reg = <0x0a>; |
b26a68c1 | 406 | clocks = <&clks IMX6QDL_CLK_CKO>; |
b32e7002 GB |
407 | VDDA-supply = <®_2p5v>; |
408 | VDDIO-supply = <®_3p3v>; | |
409 | }; | |
410 | ||
411 | rtc: rtc@68 { | |
412 | compatible = "st,rv4162"; | |
413 | pinctrl-names = "default"; | |
414 | pinctrl-0 = <&pinctrl_rv4162>; | |
415 | reg = <0x68>; | |
416 | interrupts-extended = <&gpio4 6 IRQ_TYPE_LEVEL_LOW>; | |
417 | }; | |
418 | }; | |
419 | ||
420 | &i2c2 { | |
421 | clock-frequency = <100000>; | |
422 | pinctrl-names = "default"; | |
423 | pinctrl-0 = <&pinctrl_i2c2>; | |
424 | status = "okay"; | |
425 | }; | |
426 | ||
427 | &i2c3 { | |
428 | clock-frequency = <100000>; | |
429 | pinctrl-names = "default"; | |
430 | pinctrl-0 = <&pinctrl_i2c3>; | |
431 | status = "okay"; | |
432 | ||
433 | touchscreen@04 { | |
434 | compatible = "eeti,egalax_ts"; | |
435 | reg = <0x04>; | |
436 | interrupt-parent = <&gpio1>; | |
437 | interrupts = <9 IRQ_TYPE_EDGE_FALLING>; | |
438 | wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; | |
439 | }; | |
440 | ||
441 | touchscreen@38 { | |
442 | compatible = "edt,edt-ft5x06"; | |
443 | reg = <0x38>; | |
444 | interrupt-parent = <&gpio1>; | |
445 | interrupts = <9 IRQ_TYPE_EDGE_FALLING>; | |
446 | }; | |
447 | }; | |
448 | ||
449 | &iomuxc { | |
a7859df4 | 450 | imx6q-nitrogen6-max { |
b32e7002 GB |
451 | pinctrl_audmux: audmuxgrp { |
452 | fsl,pins = < | |
453 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 | |
454 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 | |
455 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 | |
456 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 | |
457 | >; | |
458 | }; | |
459 | ||
460 | pinctrl_can1: can1grp { | |
461 | fsl,pins = < | |
462 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 | |
463 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 | |
464 | >; | |
465 | }; | |
466 | ||
467 | pinctrl_can_xcvr: can-xcvrgrp { | |
468 | fsl,pins = < | |
469 | /* Flexcan XCVR enable */ | |
470 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 | |
471 | >; | |
472 | }; | |
473 | ||
474 | pinctrl_ecspi1: ecspi1grp { | |
475 | fsl,pins = < | |
476 | MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 | |
477 | MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 | |
478 | MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 | |
479 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 | |
480 | >; | |
481 | }; | |
482 | ||
483 | pinctrl_enet: enetgrp { | |
484 | fsl,pins = < | |
485 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | |
486 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | |
c007b3a6 UKK |
487 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
488 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 | |
489 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 | |
490 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 | |
491 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 | |
492 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 | |
b32e7002 | 493 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
c007b3a6 UKK |
494 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
495 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 | |
496 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 | |
497 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 | |
498 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 | |
499 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 | |
b32e7002 GB |
500 | /* Phy reset */ |
501 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 | |
502 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 | |
503 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 | |
504 | >; | |
505 | }; | |
506 | ||
a7859df4 | 507 | pinctrl_gpio_keys: gpio-keysgrp { |
b32e7002 GB |
508 | fsl,pins = < |
509 | /* Power Button */ | |
510 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 | |
511 | /* Menu Button */ | |
512 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 | |
513 | /* Home Button */ | |
514 | MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 | |
515 | /* Back Button */ | |
516 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 | |
517 | /* Volume Up Button */ | |
518 | MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 | |
519 | /* Volume Down Button */ | |
520 | MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 | |
521 | >; | |
522 | }; | |
523 | ||
524 | pinctrl_i2c1: i2c1grp { | |
525 | fsl,pins = < | |
526 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 | |
527 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
528 | >; | |
529 | }; | |
530 | ||
531 | pinctrl_i2c2: i2c2grp { | |
532 | fsl,pins = < | |
533 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
534 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
535 | >; | |
536 | }; | |
537 | ||
538 | pinctrl_i2c2mux: i2c2muxgrp { | |
539 | fsl,pins = < | |
540 | /* ov5642 camera i2c enable */ | |
541 | MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x000b0 | |
542 | /* ov5640_mipi camera i2c enable */ | |
543 | MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0 | |
544 | >; | |
545 | }; | |
546 | ||
547 | pinctrl_i2c3: i2c3grp { | |
548 | fsl,pins = < | |
549 | MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 | |
550 | MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 | |
551 | MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 | |
552 | >; | |
553 | }; | |
554 | ||
555 | pinctrl_i2c3mux: i2c3muxgrp { | |
556 | fsl,pins = < | |
557 | /* PCIe I2C enable */ | |
558 | MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x000b0 | |
559 | >; | |
560 | }; | |
561 | ||
562 | pinctrl_j15: j15grp { | |
563 | fsl,pins = < | |
564 | MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 | |
565 | MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 | |
566 | MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 | |
567 | MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 | |
568 | MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 | |
569 | MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 | |
570 | MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 | |
571 | MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 | |
572 | MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 | |
573 | MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 | |
574 | MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 | |
575 | MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 | |
576 | MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 | |
577 | MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 | |
578 | MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 | |
579 | MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 | |
580 | MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 | |
581 | MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 | |
582 | MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 | |
583 | MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 | |
584 | MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 | |
585 | MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 | |
586 | MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 | |
587 | MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 | |
588 | MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 | |
589 | MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 | |
590 | MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 | |
591 | MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 | |
592 | >; | |
593 | }; | |
594 | ||
595 | pinctrl_pcie: pciegrp { | |
596 | fsl,pins = < | |
597 | /* PCIe reset */ | |
598 | MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x000b0 | |
599 | >; | |
600 | }; | |
601 | ||
602 | pinctrl_pwm1: pwm1grp { | |
603 | fsl,pins = < | |
604 | MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 | |
605 | >; | |
606 | }; | |
607 | ||
608 | pinctrl_pwm2: pwm2grp { | |
609 | fsl,pins = < | |
610 | MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 | |
611 | >; | |
612 | }; | |
613 | ||
614 | pinctrl_pwm3: pwm3grp { | |
615 | fsl,pins = < | |
616 | MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 | |
617 | >; | |
618 | }; | |
619 | ||
620 | pinctrl_pwm4: pwm4grp { | |
621 | fsl,pins = < | |
622 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 | |
623 | >; | |
624 | }; | |
625 | ||
626 | pinctrl_rv4162: rv4162grp { | |
627 | fsl,pins = < | |
628 | MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 | |
629 | >; | |
630 | }; | |
631 | ||
632 | pinctrl_sgtl5000: sgtl5000grp { | |
633 | fsl,pins = < | |
634 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 | |
635 | MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 | |
636 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 | |
637 | >; | |
638 | }; | |
639 | ||
640 | pinctrl_uart1: uart1grp { | |
641 | fsl,pins = < | |
642 | MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 | |
643 | MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 | |
644 | >; | |
645 | }; | |
646 | ||
647 | pinctrl_uart2: uart2grp { | |
648 | fsl,pins = < | |
649 | MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 | |
650 | MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 | |
651 | >; | |
652 | }; | |
653 | ||
654 | pinctrl_uart5: uart5grp { | |
655 | fsl,pins = < | |
656 | MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x130b1 | |
657 | MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x030b1 | |
658 | /* RS485 RX Enable: pull up */ | |
659 | MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b1 | |
660 | /* RS485 DEN: pull down */ | |
661 | MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b1 | |
662 | /* RS485/!RS232 Select: pull down (rs232) */ | |
663 | MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x030b1 | |
664 | /* ON: pull down */ | |
665 | MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x030b1 | |
666 | >; | |
667 | }; | |
668 | ||
669 | pinctrl_usbh1: usbh1grp { | |
670 | fsl,pins = < | |
671 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0 | |
672 | >; | |
673 | }; | |
674 | ||
675 | pinctrl_usbotg: usbotggrp { | |
676 | fsl,pins = < | |
677 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
678 | MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 | |
679 | /* power enable, high active */ | |
680 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 | |
681 | >; | |
682 | }; | |
683 | ||
684 | pinctrl_usdhc2: usdhc2grp { | |
685 | fsl,pins = < | |
686 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 | |
687 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 | |
688 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 | |
689 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 | |
690 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 | |
691 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 | |
692 | >; | |
693 | }; | |
694 | ||
695 | pinctrl_usdhc3: usdhc3grp { | |
696 | fsl,pins = < | |
697 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
698 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
699 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
700 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
701 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
702 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
703 | MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x100b0 | |
704 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 | |
705 | >; | |
706 | }; | |
707 | ||
708 | pinctrl_usdhc4: usdhc4grp { | |
709 | fsl,pins = < | |
710 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 | |
711 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 | |
712 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 | |
713 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 | |
714 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 | |
715 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 | |
716 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 | |
717 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 | |
718 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 | |
719 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 | |
720 | >; | |
721 | }; | |
722 | ||
a7859df4 | 723 | pinctrl_wlan_vmmc: wlan-vmmcgrp { |
b32e7002 GB |
724 | fsl,pins = < |
725 | MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0 | |
726 | MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0 | |
727 | MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0 | |
728 | MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 | |
729 | >; | |
730 | }; | |
731 | }; | |
732 | }; | |
733 | ||
734 | &ipu1_di0_disp0 { | |
735 | remote-endpoint = <&lcd_display_in>; | |
736 | }; | |
737 | ||
738 | &ldb { | |
739 | status = "okay"; | |
740 | ||
741 | lvds-channel@0 { | |
742 | fsl,data-mapping = "spwg"; | |
743 | fsl,data-width = <18>; | |
744 | status = "okay"; | |
745 | ||
746 | port@4 { | |
747 | reg = <4>; | |
748 | ||
749 | lvds0_out: endpoint { | |
750 | remote-endpoint = <&panel_in_lvds0>; | |
751 | }; | |
752 | }; | |
753 | }; | |
754 | ||
755 | lvds-channel@1 { | |
756 | fsl,data-mapping = "spwg"; | |
757 | fsl,data-width = <18>; | |
758 | status = "okay"; | |
759 | ||
760 | port@4 { | |
761 | reg = <4>; | |
762 | ||
763 | lvds1_out: endpoint { | |
764 | remote-endpoint = <&panel_in_lvds1>; | |
765 | }; | |
766 | }; | |
767 | }; | |
768 | }; | |
769 | ||
770 | &pcie { | |
771 | pinctrl-names = "default"; | |
772 | pinctrl-0 = <&pinctrl_pcie>; | |
773 | reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>; | |
774 | status = "okay"; | |
775 | }; | |
776 | ||
777 | &pwm1 { | |
778 | pinctrl-names = "default"; | |
779 | pinctrl-0 = <&pinctrl_pwm1>; | |
780 | status = "okay"; | |
781 | }; | |
782 | ||
783 | &pwm2 { | |
784 | pinctrl-names = "default"; | |
785 | pinctrl-0 = <&pinctrl_pwm2>; | |
786 | status = "okay"; | |
787 | }; | |
788 | ||
789 | &pwm3 { | |
790 | pinctrl-names = "default"; | |
791 | pinctrl-0 = <&pinctrl_pwm3>; | |
792 | status = "okay"; | |
793 | }; | |
794 | ||
795 | &pwm4 { | |
796 | pinctrl-names = "default"; | |
797 | pinctrl-0 = <&pinctrl_pwm4>; | |
798 | status = "okay"; | |
799 | }; | |
800 | ||
801 | &ssi1 { | |
802 | status = "okay"; | |
803 | }; | |
804 | ||
805 | &uart1 { | |
806 | pinctrl-names = "default"; | |
807 | pinctrl-0 = <&pinctrl_uart1>; | |
808 | status = "okay"; | |
809 | }; | |
810 | ||
811 | &uart2 { | |
812 | pinctrl-names = "default"; | |
813 | pinctrl-0 = <&pinctrl_uart2>; | |
814 | status = "okay"; | |
815 | }; | |
816 | ||
817 | &uart5 { | |
818 | pinctrl-names = "default"; | |
819 | pinctrl-0 = <&pinctrl_uart5>; | |
820 | status = "okay"; | |
821 | }; | |
822 | ||
823 | &usbh1 { | |
824 | vbus-supply = <®_usb_h1_vbus>; | |
825 | status = "okay"; | |
826 | }; | |
827 | ||
828 | &usbotg { | |
829 | vbus-supply = <®_usb_otg_vbus>; | |
830 | pinctrl-names = "default"; | |
831 | pinctrl-0 = <&pinctrl_usbotg>; | |
832 | disable-over-current; | |
833 | status = "okay"; | |
834 | }; | |
835 | ||
836 | &usdhc2 { | |
837 | pinctrl-names = "default"; | |
838 | pinctrl-0 = <&pinctrl_usdhc2>; | |
839 | bus-width = <4>; | |
840 | non-removable; | |
841 | vmmc-supply = <®_wlan_vmmc>; | |
842 | cap-power-off-card; | |
843 | keep-power-in-suspend; | |
844 | status = "okay"; | |
845 | ||
846 | #address-cells = <1>; | |
847 | #size-cells = <0>; | |
848 | wlcore: wlcore@2 { | |
849 | compatible = "ti,wl1271"; | |
850 | reg = <2>; | |
851 | interrupt-parent = <&gpio6>; | |
852 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; | |
853 | ref-clock-frequency = <38400000>; | |
854 | }; | |
855 | }; | |
856 | ||
857 | &usdhc3 { | |
858 | pinctrl-names = "default"; | |
859 | pinctrl-0 = <&pinctrl_usdhc3>; | |
860 | cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
861 | bus-width = <4>; | |
862 | vmmc-supply = <®_3p3v>; | |
863 | status = "okay"; | |
864 | }; | |
865 | ||
866 | &usdhc4 { | |
867 | pinctrl-names = "default"; | |
868 | pinctrl-0 = <&pinctrl_usdhc4>; | |
869 | bus-width = <8>; | |
870 | non-removable; | |
871 | vmmc-supply = <®_1p8v>; | |
872 | keep-power-in-suspend; | |
873 | status = "okay"; | |
874 | }; |