[linux-2.6-block.git] / arch / arm / boot / dts / imx6q-dmo-edmqmx6.dts

/*
 * Copyright 2013 Data Modul AG
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "imx6q.dtsi"

/ {
	model = "Data Modul eDM-QMX6 Board";
	compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";

	chosen {
		stdout-path = &uart2;
	};

	aliases {
		gpio7 = &stmpe_gpio1;
		gpio8 = &stmpe_gpio2;
		stmpe-i2c0 = &stmpe1;
		stmpe-i2c1 = &stmpe2;
	};

	memory@10000000 {
		reg = <0x10000000 0x80000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_switch: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg_switch";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio7 12 0>;
			regulator-boot-on;
			regulator-always-on;
		};

		reg_usb_host1: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_host1_en";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio3 31 0>;
			enable-active-high;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led-blue {
			label = "blue";
			gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-green {
			label = "green";
			gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
		};

		led-pink {
			label = "pink";
			gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		led-red {
			label = "red";
			gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
		};
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&ecspi5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi5>;
	cs-gpios = <&gpio1 12 0>;
	status = "okay";

	flash: m25p80@0 {
		compatible = "m25p80", "jedec,spi-nor";
		spi-max-frequency = <40000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
	phy-supply = <&vgen2_1v2_eth>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2
		     &pinctrl_stmpe1
		     &pinctrl_stmpe2
		     &pinctrl_pfuze>;
	status = "okay";

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 8>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_1v2_eth: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vdd_high_in: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	stmpe1: stmpe1601@40 {
		compatible = "st,stmpe1601";
		reg = <0x40>;
		interrupts = <30 0>;
		interrupt-parent = <&gpio3>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio1: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	stmpe2: stmpe1601@44 {
		compatible = "st,stmpe1601";
		reg = <0x44>;
		interrupts = <2 0>;
		interrupt-parent = <&gpio5>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio2: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	temp1: ad7414@4c {
		compatible = "ad,ad7414";
		reg = <0x4c>;
	};

	temp2: ad7414@4d {
		compatible = "ad,ad7414";
		reg = <0x4d>;
	};

	rtc: m41t62@68 {
		compatible = "st,m41t62";
		reg = <0x68>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6q-dmo-edmqmx6 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
			>;
		};

		pinctrl_ecspi5: ecspi5rp-1 {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000
				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000
				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1
			>;
		};

		pinctrl_pfuze: pfuze100grp1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
			>;
		};

		pinctrl_stmpe1: stmpe1grp {
			fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
		};

		pinctrl_stmpe2: stmpe2grp {
			fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&sata {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_host1>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};
Commit	Line	Data
c1f77e73 S	1	/*
	2	* Copyright 2013 Data Modul AG
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/dts-v1/;
	13
	14	#include <dt-bindings/gpio/gpio.h>
	15	#include "imx6q.dtsi"
	16
	17	/ {
	18	model = "Data Modul eDM-QMX6 Board";
	19	compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
	20
48f51963 SH	21	chosen {
	22	stdout-path = &uart2;
	23	};
	24
c1f77e73	25	aliases {
52d13453 LS	26	gpio7 = &stmpe_gpio1;
	27	gpio8 = &stmpe_gpio2;
	28	stmpe-i2c0 = &stmpe1;
	29	stmpe-i2c1 = &stmpe2;
c1f77e73 S	30	};
c1f77e73 S	31
ad00e080	32	memory@10000000 {
c1f77e73 S	33	reg = <0x10000000 0x80000000>;
	34	};
	35
	36	regulators {
	37	compatible = "simple-bus";
	38	#address-cells = <1>;
	39	#size-cells = <0>;
	40
	41	reg_3p3v: regulator@0 {
	42	compatible = "regulator-fixed";
	43	reg = <0>;
	44	regulator-name = "3P3V";
	45	regulator-min-microvolt = <3300000>;
	46	regulator-max-microvolt = <3300000>;
	47	regulator-always-on;
	48	};
	49
465ca5dc	50	reg_usb_otg_switch: regulator@1 {
c1f77e73 S	51	compatible = "regulator-fixed";
c1f77e73 S	52	reg = <1>;
465ca5dc	53	regulator-name = "usb_otg_switch";
c1f77e73 S	54	regulator-min-microvolt = <5000000>;
	55	regulator-max-microvolt = <5000000>;
	56	gpio = <&gpio7 12 0>;
465ca5dc SH	57	regulator-boot-on;
465ca5dc SH	58	regulator-always-on;
c1f77e73 S	59	};
	60
	61	reg_usb_host1: regulator@2 {
	62	compatible = "regulator-fixed";
	63	reg = <2>;
	64	regulator-name = "usb_host1_en";
	65	regulator-min-microvolt = <3300000>;
	66	regulator-max-microvolt = <3300000>;
	67	gpio = <&gpio3 31 0>;
	68	enable-active-high;
	69	};
	70	};
	71
	72	gpio-leds {
	73	compatible = "gpio-leds";
	74
	75	led-blue {
	76	label = "blue";
52d13453	77	gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
c1f77e73 S	78	linux,default-trigger = "heartbeat";
	79	};
	80
	81	led-green {
	82	label = "green";
52d13453	83	gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
c1f77e73 S	84	};
	85
	86	led-pink {
	87	label = "pink";
52d13453	88	gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
c1f77e73 S	89	};
	90
	91	led-red {
	92	label = "red";
52d13453	93	gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
c1f77e73 S	94	};
	95	};
	96	};
	97
37183793 SF	98	&can1 {
	99	pinctrl-names = "default";
	100	pinctrl-0 = <&pinctrl_can1>;
	101	status = "okay";
	102	};
	103
819826a1 LS	104	&ecspi5 {
	105	pinctrl-names = "default";
	106	pinctrl-0 = <&pinctrl_ecspi5>;
819826a1 LS	107	cs-gpios = <&gpio1 12 0>;
	108	status = "okay";
	109
	110	flash: m25p80@0 {
79826ac6	111	compatible = "m25p80", "jedec,spi-nor";
819826a1 LS	112	spi-max-frequency = <40000000>;
	113	reg = <0>;
	114	};
	115	};
	116
c1f77e73 S	117	&fec {
	118	pinctrl-names = "default";
	119	pinctrl-0 = <&pinctrl_enet>;
	120	phy-mode = "rgmii";
12de44f5	121	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
c1f77e73 S	122	phy-supply = <&vgen2_1v2_eth>;
	123	status = "okay";
	124	};
	125
3c6c8685 SF	126	&i2c1 {
	127	clock-frequency = <100000>;
	128	pinctrl-names = "default";
	129	pinctrl-0 = <&pinctrl_i2c1>;
	130	status = "okay";
	131	};
	132
c1f77e73 S	133	&i2c2 {
	134	clock-frequency = <100000>;
	135	pinctrl-names = "default";
	136	pinctrl-0 = <&pinctrl_i2c2
52d13453	137	&pinctrl_stmpe1
d02f74aa LS	138	&pinctrl_stmpe2
d02f74aa LS	139	&pinctrl_pfuze>;
c1f77e73 S	140	status = "okay";
c1f77e73 S	141
8dccafaa	142	pmic: pfuze100@8 {
c1f77e73 S	143	compatible = "fsl,pfuze100";
	144	reg = <0x08>;
	145	interrupt-parent = <&gpio3>;
	146	interrupts = <20 8>;
	147
	148	regulators {
	149	sw1a_reg: sw1ab {
	150	regulator-min-microvolt = <300000>;
	151	regulator-max-microvolt = <1875000>;
	152	regulator-boot-on;
	153	regulator-always-on;
	154	};
	155
	156	sw1c_reg: sw1c {
	157	regulator-min-microvolt = <300000>;
	158	regulator-max-microvolt = <1875000>;
	159	regulator-boot-on;
	160	regulator-always-on;
	161	};
	162
	163	sw2_reg: sw2 {
	164	regulator-min-microvolt = <800000>;
	165	regulator-max-microvolt = <3300000>;
	166	regulator-boot-on;
	167	regulator-always-on;
	168	};
	169
	170	sw3a_reg: sw3a {
	171	regulator-min-microvolt = <400000>;
	172	regulator-max-microvolt = <1975000>;
	173	regulator-boot-on;
	174	regulator-always-on;
	175	};
	176
	177	sw3b_reg: sw3b {
	178	regulator-min-microvolt = <400000>;
	179	regulator-max-microvolt = <1975000>;
	180	regulator-boot-on;
	181	regulator-always-on;
	182	};
	183
	184	sw4_reg: sw4 {
	185	regulator-min-microvolt = <400000>;
	186	regulator-max-microvolt = <1975000>;
	187	regulator-always-on;
	188	};
	189
	190	swbst_reg: swbst {
	191	regulator-min-microvolt = <5000000>;
	192	regulator-max-microvolt = <5150000>;
	193	regulator-always-on;
	194	};
	195
	196	snvs_reg: vsnvs {
	197	regulator-min-microvolt = <1000000>;
	198	regulator-max-microvolt = <3000000>;
	199	regulator-boot-on;
	200	regulator-always-on;
	201	};
	202
	203	vref_reg: vrefddr {
	204	regulator-boot-on;
	205	regulator-always-on;
	206	};
207
208	vgen1_reg: vgen1 {
209	regulator-min-microvolt = <800000>;
210	regulator-max-microvolt = <1550000>;
211	};
212
213	vgen2_1v2_eth: vgen2 {
214	regulator-min-microvolt = <800000>;
215	regulator-max-microvolt = <1550000>;
216	};
217
218	vdd_high_in: vgen3 {
219	regulator-min-microvolt = <1800000>;
220	regulator-max-microvolt = <3300000>;
221	regulator-boot-on;
222	regulator-always-on;
223	};
224
225	vgen4_reg: vgen4 {
226	regulator-min-microvolt = <1800000>;
227	regulator-max-microvolt = <3300000>;
228	regulator-always-on;
229	};
230
231	vgen5_reg: vgen5 {
232	regulator-min-microvolt = <1800000>;
233	regulator-max-microvolt = <3300000>;
234	regulator-always-on;
235	};
236
237	vgen6_reg: vgen6 {
238	regulator-min-microvolt = <1800000>;
239	regulator-max-microvolt = <3300000>;
240	regulator-always-on;
241	};
242	};
243	};
244
52d13453	245	stmpe1: stmpe1601@40 {
c1f77e73 S	246	compatible = "st,stmpe1601";
	247	reg = <0x40>;
	248	interrupts = <30 0>;
	249	interrupt-parent = <&gpio3>;
e59d28e8 SF	250	vcc-supply = <&sw2_reg>;
e59d28e8 SF	251	vio-supply = <&sw2_reg>;
c1f77e73	252
52d13453 LS	253	stmpe_gpio1: stmpe_gpio {
	254	#gpio-cells = <2>;
	255	compatible = "st,stmpe-gpio";
	256	};
	257	};
	258
	259	stmpe2: stmpe1601@44 {
	260	compatible = "st,stmpe1601";
	261	reg = <0x44>;
	262	interrupts = <2 0>;
	263	interrupt-parent = <&gpio5>;
e59d28e8 SF	264	vcc-supply = <&sw2_reg>;
e59d28e8 SF	265	vio-supply = <&sw2_reg>;
52d13453 LS	266
52d13453 LS	267	stmpe_gpio2: stmpe_gpio {
c1f77e73 S	268	#gpio-cells = <2>;
	269	compatible = "st,stmpe-gpio";
	270	};
	271	};
	272
	273	temp1: ad7414@4c {
	274	compatible = "ad,ad7414";
	275	reg = <0x4c>;
	276	};
	277
	278	temp2: ad7414@4d {
	279	compatible = "ad,ad7414";
	280	reg = <0x4d>;
	281	};
	282
	283	rtc: m41t62@68 {
0a6f366a	284	compatible = "st,m41t62";
c1f77e73 S	285	reg = <0x68>;
	286	};
	287	};
	288
3c6c8685 SF	289	&i2c3 {
	290	clock-frequency = <100000>;
	291	pinctrl-names = "default";
	292	pinctrl-0 = <&pinctrl_i2c3>;
	293	status = "okay";
	294	};
	295
c1f77e73 S	296	&iomuxc {
	297	pinctrl-names = "default";
	298	pinctrl-0 = <&pinctrl_hog>;
	299
	300	imx6q-dmo-edmqmx6 {
	301	pinctrl_hog: hoggrp {
	302	fsl,pins = <
	303	MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
	304	MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
	305	>;
	306	};
	307
37183793 SF	308	pinctrl_can1: can1grp {
	309	fsl,pins = <
	310	MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
	311	MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
	312	>;
	313	};
	314
819826a1 LS	315	pinctrl_ecspi5: ecspi5rp-1 {
	316	fsl,pins = <
	317	MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
	318	MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
	319	MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
	320	MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
	321	>;
	322	};
	323
c1f77e73 S	324	pinctrl_enet: enetgrp {
c1f77e73 S	325	fsl,pins = <
c007b3a6 UKK	326	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
	327	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
	328	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
	329	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
	330	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
	331	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
	332	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
	333	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
	334	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
	335	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
	336	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
	337	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
c1f77e73 S	338	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	339	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	340	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2f643105	341	MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
c1f77e73 S	342	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	343	>;
	344	};
	345
3c6c8685 SF	346	pinctrl_i2c1: i2c1grp {
	347	fsl,pins = <
	348	MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
	349	MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
	350	>;
	351	};
	352
c1f77e73 S	353	pinctrl_i2c2: i2c2grp {
	354	fsl,pins = <
	355	MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
	356	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	357	>;
	358	};
	359
3c6c8685 SF	360	pinctrl_i2c3: i2c3grp {
	361	fsl,pins = <
	362	MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
	363	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	364	>;
	365	};
	366
fd101c4c SF	367	pinctrl_pcie: pciegrp {
	368	fsl,pins = <
	369	MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1
	370	>;
	371	};
	372
d02f74aa LS	373	pinctrl_pfuze: pfuze100grp1 {
	374	fsl,pins = <
	375	MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
	376	>;
	377	};
	378
52d13453	379	pinctrl_stmpe1: stmpe1grp {
c1f77e73 S	380	fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
	381	};
	382
52d13453 LS	383	pinctrl_stmpe2: stmpe2grp {
	384	fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
	385	};
	386
c1f77e73 S	387	pinctrl_uart1: uart1grp {
	388	fsl,pins = <
	389	MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
	390	MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
	391	>;
	392	};
	393
	394	pinctrl_uart2: uart2grp {
	395	fsl,pins = <
	396	MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
	397	MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
	398	>;
	399	};
	400
	401	pinctrl_usbotg: usbotggrp {
	402	fsl,pins = <
19f7cb6d	403	MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
c1f77e73 S	404	>;
	405	};
	406
	407	pinctrl_usdhc3: usdhc3grp {
	408	fsl,pins = <
	409	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	410	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	411	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	412	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	413	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	414	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
	415	>;
	416	};
	417
	418	pinctrl_usdhc4: usdhc4grp {
	419	fsl,pins = <
	420	MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
	421	MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
	422	MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
	423	MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
	424	MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
	425	MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
	426	MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
	427	MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
	428	MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
	429	MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
	430	>;
	431	};
	432	};
	433	};
	434
fd101c4c SF	435	&pcie {
	436	pinctrl-names = "default";
	437	pinctrl-0 = <&pinctrl_pcie>;
cc20028f	438	reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
fd101c4c SF	439	status = "okay";
	440	};
	441
c1f77e73 S	442	&sata {
	443	status = "okay";
	444	};
	445
	446	&uart1 {
	447	pinctrl-names = "default";
	448	pinctrl-0 = <&pinctrl_uart1>;
	449	status = "okay";
	450	};
	451
	452	&uart2 {
	453	pinctrl-names = "default";
	454	pinctrl-0 = <&pinctrl_uart2>;
	455	status = "okay";
	456	};
	457
	458	&usbh1 {
	459	vbus-supply = <&reg_usb_host1>;
	460	disable-over-current;
8dde78e8	461	dr_mode = "host";
c1f77e73 S	462	status = "okay";
	463	};
	464
	465	&usbotg {
c1f77e73 S	466	pinctrl-names = "default";
	467	pinctrl-0 = <&pinctrl_usbotg>;
	468	disable-over-current;
	469	status = "okay";
	470	};
	471
	472	&usdhc3 {
	473	pinctrl-names = "default";
	474	pinctrl-0 = <&pinctrl_usdhc3>;
	475	vmmc-supply = <&reg_3p3v>;
	476	status = "okay";
	477	};
	478
	479	&usdhc4 {
	480	pinctrl-names = "default";
	481	pinctrl-0 = <&pinctrl_usdhc4>;
	482	vmmc-supply = <&reg_3p3v>;
	483	non-removable;
	484	bus-width = <8>;
	485	status = "okay";
	486	};