Commit | Line | Data |
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7d740f87 SG |
1 | /* |
2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
89c1a8cf | 14 | #include <dt-bindings/gpio/gpio.h> |
36dffd8f | 15 | #include "imx6q.dtsi" |
7d740f87 SG |
16 | |
17 | / { | |
752baf56 DB |
18 | model = "Freescale i.MX6 Quad Armadillo2 Board"; |
19 | compatible = "fsl,imx6q-arm2", "fsl,imx6q"; | |
7d740f87 | 20 | |
7d740f87 SG |
21 | memory { |
22 | reg = <0x10000000 0x80000000>; | |
23 | }; | |
24 | ||
648162ac SG |
25 | regulators { |
26 | compatible = "simple-bus"; | |
56160e33 SG |
27 | #address-cells = <1>; |
28 | #size-cells = <0>; | |
648162ac | 29 | |
56160e33 | 30 | reg_3p3v: regulator@0 { |
648162ac | 31 | compatible = "regulator-fixed"; |
56160e33 | 32 | reg = <0>; |
648162ac SG |
33 | regulator-name = "3P3V"; |
34 | regulator-min-microvolt = <3300000>; | |
35 | regulator-max-microvolt = <3300000>; | |
36 | regulator-always-on; | |
37 | }; | |
67339b35 | 38 | |
56160e33 | 39 | reg_usb_otg_vbus: regulator@1 { |
67339b35 | 40 | compatible = "regulator-fixed"; |
56160e33 | 41 | reg = <1>; |
67339b35 PC |
42 | regulator-name = "usb_otg_vbus"; |
43 | regulator-min-microvolt = <5000000>; | |
44 | regulator-max-microvolt = <5000000>; | |
45 | gpio = <&gpio3 22 0>; | |
46 | enable-active-high; | |
47 | }; | |
648162ac SG |
48 | }; |
49 | ||
7d740f87 SG |
50 | leds { |
51 | compatible = "gpio-leds"; | |
52 | ||
53 | debug-led { | |
54 | label = "Heartbeat"; | |
4d191868 | 55 | gpios = <&gpio3 25 0>; |
7d740f87 SG |
56 | linux,default-trigger = "heartbeat"; |
57 | }; | |
58 | }; | |
59 | }; | |
be4ccfce SG |
60 | |
61 | &gpmi { | |
62 | pinctrl-names = "default"; | |
817c27a1 | 63 | pinctrl-0 = <&pinctrl_gpmi_nand>; |
be4ccfce SG |
64 | status = "disabled"; /* gpmi nand conflicts with SD */ |
65 | }; | |
66 | ||
67 | &iomuxc { | |
68 | pinctrl-names = "default"; | |
69 | pinctrl-0 = <&pinctrl_hog>; | |
70 | ||
817c27a1 | 71 | imx6q-arm2 { |
be4ccfce SG |
72 | pinctrl_hog: hoggrp { |
73 | fsl,pins = < | |
c56009b2 | 74 | MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 |
be4ccfce SG |
75 | >; |
76 | }; | |
be4ccfce | 77 | |
817c27a1 SG |
78 | pinctrl_enet: enetgrp { |
79 | fsl,pins = < | |
80 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 | |
81 | MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 | |
82 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | |
83 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | |
84 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | |
85 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | |
86 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | |
87 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | |
88 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | |
89 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | |
90 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | |
91 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | |
92 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | |
93 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | |
94 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | |
4c2620e7 | 95 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
817c27a1 SG |
96 | >; |
97 | }; | |
98 | ||
99 | pinctrl_gpmi_nand: gpminandgrp { | |
100 | fsl,pins = < | |
101 | MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 | |
102 | MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 | |
103 | MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 | |
104 | MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 | |
105 | MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 | |
106 | MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 | |
107 | MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 | |
108 | MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 | |
109 | MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 | |
110 | MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 | |
111 | MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 | |
112 | MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 | |
113 | MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 | |
114 | MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 | |
115 | MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 | |
116 | MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 | |
117 | MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 | |
118 | >; | |
119 | }; | |
120 | ||
121 | pinctrl_uart2: uart2grp { | |
122 | fsl,pins = < | |
123 | MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 | |
124 | MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 | |
125 | MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 | |
126 | MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 | |
127 | >; | |
128 | }; | |
129 | ||
130 | pinctrl_uart4: uart4grp { | |
131 | fsl,pins = < | |
132 | MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 | |
133 | MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 | |
134 | >; | |
135 | }; | |
136 | ||
137 | pinctrl_usbotg: usbotggrp { | |
138 | fsl,pins = < | |
139 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
140 | >; | |
141 | }; | |
142 | ||
143 | pinctrl_usdhc3: usdhc3grp { | |
144 | fsl,pins = < | |
145 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
146 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
147 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
148 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
149 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
150 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
151 | MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 | |
152 | MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 | |
153 | MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 | |
154 | MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 | |
155 | >; | |
156 | }; | |
157 | ||
158 | pinctrl_usdhc3_cdwp: usdhc3cdwp { | |
be4ccfce | 159 | fsl,pins = < |
c56009b2 SG |
160 | MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 |
161 | MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 | |
be4ccfce SG |
162 | >; |
163 | }; | |
817c27a1 SG |
164 | |
165 | pinctrl_usdhc4: usdhc4grp { | |
166 | fsl,pins = < | |
167 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 | |
168 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 | |
169 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 | |
170 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 | |
171 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 | |
172 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 | |
173 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 | |
174 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 | |
175 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 | |
176 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 | |
177 | >; | |
178 | }; | |
be4ccfce SG |
179 | }; |
180 | }; | |
181 | ||
182 | &fec { | |
183 | pinctrl-names = "default"; | |
817c27a1 | 184 | pinctrl-0 = <&pinctrl_enet>; |
be4ccfce | 185 | phy-mode = "rgmii"; |
4c2620e7 TK |
186 | interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, |
187 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; | |
be4ccfce SG |
188 | status = "okay"; |
189 | }; | |
190 | ||
67339b35 PC |
191 | &usbotg { |
192 | vbus-supply = <®_usb_otg_vbus>; | |
193 | pinctrl-names = "default"; | |
817c27a1 | 194 | pinctrl-0 = <&pinctrl_usbotg>; |
67339b35 PC |
195 | disable-over-current; |
196 | status = "okay"; | |
197 | }; | |
198 | ||
be4ccfce | 199 | &usdhc3 { |
89c1a8cf DA |
200 | cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; |
201 | wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; | |
be4ccfce SG |
202 | vmmc-supply = <®_3p3v>; |
203 | pinctrl-names = "default"; | |
817c27a1 SG |
204 | pinctrl-0 = <&pinctrl_usdhc3 |
205 | &pinctrl_usdhc3_cdwp>; | |
be4ccfce SG |
206 | status = "okay"; |
207 | }; | |
208 | ||
209 | &usdhc4 { | |
210 | non-removable; | |
211 | vmmc-supply = <®_3p3v>; | |
212 | pinctrl-names = "default"; | |
817c27a1 | 213 | pinctrl-0 = <&pinctrl_usdhc4>; |
be4ccfce SG |
214 | status = "okay"; |
215 | }; | |
216 | ||
51056d9c HS |
217 | &uart2 { |
218 | pinctrl-names = "default"; | |
817c27a1 | 219 | pinctrl-0 = <&pinctrl_uart2>; |
51056d9c HS |
220 | fsl,dte-mode; |
221 | fsl,uart-has-rtscts; | |
51056d9c HS |
222 | status = "okay"; |
223 | }; | |
224 | ||
be4ccfce SG |
225 | &uart4 { |
226 | pinctrl-names = "default"; | |
817c27a1 | 227 | pinctrl-0 = <&pinctrl_uart4>; |
be4ccfce SG |
228 | status = "okay"; |
229 | }; |