Commit | Line | Data |
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ec55b150 IP |
1 | /* |
2 | * Copyright 2014 Iain Paton <ipaton0@gmail.com> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | */ | |
9 | ||
10 | /dts-v1/; | |
11 | #include "imx6dl.dtsi" | |
12 | #include <dt-bindings/gpio/gpio.h> | |
13 | ||
14 | / { | |
15 | model = "RIoTboard i.MX6S"; | |
16 | compatible = "riot,imx6s-riotboard", "fsl,imx6dl"; | |
17 | ||
18 | memory { | |
19 | reg = <0x10000000 0x40000000>; | |
20 | }; | |
21 | ||
22 | regulators { | |
23 | compatible = "simple-bus"; | |
24 | #address-cells = <1>; | |
25 | #size-cells = <0>; | |
26 | ||
27 | reg_2p5v: regulator@0 { | |
28 | compatible = "regulator-fixed"; | |
29 | reg = <0>; | |
30 | regulator-name = "2P5V"; | |
31 | regulator-min-microvolt = <2500000>; | |
32 | regulator-max-microvolt = <2500000>; | |
33 | }; | |
34 | ||
35 | reg_3p3v: regulator@1 { | |
36 | compatible = "regulator-fixed"; | |
37 | reg = <1>; | |
38 | regulator-name = "3P3V"; | |
39 | regulator-min-microvolt = <3300000>; | |
40 | regulator-max-microvolt = <3300000>; | |
41 | }; | |
42 | ||
43 | reg_usb_otg_vbus: regulator@2 { | |
44 | compatible = "regulator-fixed"; | |
45 | reg = <2>; | |
46 | regulator-name = "usb_otg_vbus"; | |
47 | regulator-min-microvolt = <5000000>; | |
48 | regulator-max-microvolt = <5000000>; | |
49 | gpio = <&gpio3 22 0>; | |
50 | enable-active-high; | |
51 | }; | |
52 | }; | |
53 | ||
54 | leds { | |
55 | compatible = "gpio-leds"; | |
56 | pinctrl-names = "default"; | |
57 | pinctrl-0 = <&pinctrl_led>; | |
58 | ||
59 | led0: user1 { | |
60 | label = "user1"; | |
61 | gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; | |
62 | default-state = "on"; | |
63 | linux,default-trigger = "heartbeat"; | |
64 | }; | |
65 | ||
66 | led1: user2 { | |
67 | label = "user2"; | |
68 | gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; | |
69 | default-state = "off"; | |
70 | }; | |
71 | }; | |
72 | ||
73 | sound { | |
74 | compatible = "fsl,imx-audio-sgtl5000"; | |
75 | model = "imx6-riotboard-sgtl5000"; | |
76 | ssi-controller = <&ssi1>; | |
77 | audio-codec = <&codec>; | |
78 | audio-routing = | |
79 | "MIC_IN", "Mic Jack", | |
80 | "Mic Jack", "Mic Bias", | |
81 | "Headphone Jack", "HP_OUT"; | |
82 | mux-int-port = <1>; | |
83 | mux-ext-port = <3>; | |
84 | }; | |
85 | }; | |
86 | ||
87 | &audmux { | |
88 | pinctrl-names = "default"; | |
89 | pinctrl-0 = <&pinctrl_audmux>; | |
90 | status = "okay"; | |
91 | }; | |
92 | ||
93 | &fec { | |
94 | pinctrl-names = "default"; | |
95 | pinctrl-0 = <&pinctrl_enet>; | |
96 | phy-mode = "rgmii"; | |
12de44f5 | 97 | phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; |
ec55b150 IP |
98 | interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, |
99 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; | |
a28eeb43 | 100 | fsl,err006687-workaround-present; |
ec55b150 IP |
101 | status = "okay"; |
102 | }; | |
103 | ||
e8ebecf6 OR |
104 | &gpio1 { |
105 | gpio-line-names = | |
106 | "", "", "SD2_WP", "", "SD2_CD", "I2C3_SCL", | |
107 | "I2C3_SDA", "I2C4_SCL", | |
108 | "I2C4_SDA", "", "", "", "", "", "", "", | |
109 | "", "PWM3", "", "", "", "", "", "", | |
110 | "", "", "", "", "", "", "", ""; | |
111 | }; | |
112 | ||
113 | &gpio3 { | |
114 | gpio-line-names = | |
115 | "", "", "", "", "", "", "", "", | |
116 | "", "", "", "", "", "", "", "", | |
117 | "", "", "", "", "", "", "USB_OTG_VBUS", "", | |
118 | "UART3_TXD", "UART3_RXD", "", "", "EIM_D28", "", "", ""; | |
119 | }; | |
120 | ||
121 | &gpio4 { | |
122 | gpio-line-names = | |
123 | "", "", "", "", "", "", "UART4_TXD", "UART4_RXD", | |
124 | "UART5_TXD", "UART5_RXD", "", "", "", "", "", "", | |
125 | "GPIO4_16", "GPIO4_17", "GPIO4_18", "GPIO4_19", "", | |
126 | "CSPI3_CLK", "CSPI3_MOSI", "CSPI3_MISO", | |
127 | "CSPI3_CS0", "CSPI3_CS1", "GPIO4_26", "GPIO4_27", | |
128 | "CSPI3_RDY", "PWM1", "PWM2", "GPIO4_31"; | |
129 | }; | |
130 | ||
131 | &gpio5 { | |
132 | gpio-line-names = | |
133 | "", "", "EIM_A25", "", "", "GPIO5_05", "GPIO5_06", | |
134 | "GPIO5_07", | |
135 | "GPIO5_08", "CSPI2_CS1", "CSPI2_MOSI", "CSPI2_MISO", | |
136 | "CSPI2_CS0", "CSPI2_CLK", "", "", | |
137 | "", "", "", "", "", "", "", "", | |
138 | "", "", "", "", "", "", "", ""; | |
139 | }; | |
140 | ||
141 | &gpio7 { | |
142 | gpio-line-names = | |
143 | "SD3_CD", "SD3_WP", "", "", "", "", "", "", | |
144 | "", "", "", "", "", "", "", "", | |
145 | "", "", "", "", "", "", "", "", | |
146 | "", "", "", "", "", "", "", ""; | |
147 | }; | |
148 | ||
ec55b150 IP |
149 | &hdmi { |
150 | ddc-i2c-bus = <&i2c2>; | |
151 | status = "okay"; | |
152 | }; | |
153 | ||
154 | &i2c1 { | |
155 | clock-frequency = <100000>; | |
156 | pinctrl-names = "default"; | |
157 | pinctrl-0 = <&pinctrl_i2c1>; | |
158 | status = "okay"; | |
159 | ||
160 | codec: sgtl5000@0a { | |
161 | compatible = "fsl,sgtl5000"; | |
162 | reg = <0x0a>; | |
b26a68c1 | 163 | clocks = <&clks IMX6QDL_CLK_CKO>; |
ec55b150 IP |
164 | VDDA-supply = <®_2p5v>; |
165 | VDDIO-supply = <®_3p3v>; | |
166 | }; | |
167 | ||
168 | pmic: pf0100@08 { | |
169 | compatible = "fsl,pfuze100"; | |
170 | reg = <0x08>; | |
171 | interrupt-parent = <&gpio5>; | |
172 | interrupts = <16 8>; | |
173 | ||
174 | regulators { | |
175 | reg_vddcore: sw1ab { /* VDDARM_IN */ | |
176 | regulator-min-microvolt = <300000>; | |
177 | regulator-max-microvolt = <1875000>; | |
178 | regulator-always-on; | |
179 | }; | |
180 | ||
181 | reg_vddsoc: sw1c { /* VDDSOC_IN */ | |
182 | regulator-min-microvolt = <300000>; | |
183 | regulator-max-microvolt = <1875000>; | |
184 | regulator-always-on; | |
185 | }; | |
186 | ||
187 | reg_gen_3v3: sw2 { /* VDDHIGH_IN */ | |
188 | regulator-min-microvolt = <800000>; | |
189 | regulator-max-microvolt = <3300000>; | |
190 | regulator-always-on; | |
191 | }; | |
192 | ||
193 | reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */ | |
194 | regulator-min-microvolt = <400000>; | |
195 | regulator-max-microvolt = <1975000>; | |
196 | regulator-always-on; | |
197 | }; | |
198 | ||
199 | reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */ | |
200 | regulator-min-microvolt = <400000>; | |
201 | regulator-max-microvolt = <1975000>; | |
202 | regulator-always-on; | |
203 | }; | |
204 | ||
205 | reg_ddr_vtt: sw4 { /* MIPI conn */ | |
206 | regulator-min-microvolt = <400000>; | |
207 | regulator-max-microvolt = <1975000>; | |
208 | regulator-always-on; | |
209 | }; | |
210 | ||
211 | reg_5v_600mA: swbst { /* not used */ | |
212 | regulator-min-microvolt = <5000000>; | |
213 | regulator-max-microvolt = <5150000>; | |
214 | }; | |
215 | ||
216 | reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */ | |
217 | regulator-min-microvolt = <1500000>; | |
218 | regulator-max-microvolt = <3000000>; | |
219 | regulator-always-on; | |
220 | }; | |
221 | ||
222 | vref_reg: vrefddr { /* VREF_DDR */ | |
223 | regulator-boot-on; | |
224 | regulator-always-on; | |
225 | }; | |
226 | ||
227 | reg_vgen1_1v5: vgen1 { /* not used */ | |
228 | regulator-min-microvolt = <800000>; | |
229 | regulator-max-microvolt = <1550000>; | |
230 | }; | |
231 | ||
232 | reg_vgen2_1v2_eth: vgen2 { /* pcie ? */ | |
233 | regulator-min-microvolt = <800000>; | |
234 | regulator-max-microvolt = <1550000>; | |
235 | regulator-always-on; | |
236 | }; | |
237 | ||
238 | reg_vgen3_2v8: vgen3 { /* not used */ | |
239 | regulator-min-microvolt = <1800000>; | |
240 | regulator-max-microvolt = <3300000>; | |
241 | }; | |
242 | reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */ | |
243 | regulator-min-microvolt = <1800000>; | |
244 | regulator-max-microvolt = <3300000>; | |
245 | regulator-always-on; | |
246 | }; | |
247 | ||
248 | reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */ | |
249 | regulator-min-microvolt = <1800000>; | |
250 | regulator-max-microvolt = <3300000>; | |
251 | regulator-always-on; | |
252 | }; | |
253 | ||
254 | reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */ | |
255 | regulator-min-microvolt = <1800000>; | |
256 | regulator-max-microvolt = <3300000>; | |
257 | regulator-always-on; | |
258 | }; | |
259 | }; | |
260 | }; | |
261 | }; | |
262 | ||
263 | &i2c2 { | |
264 | clock-frequency = <100000>; | |
265 | pinctrl-names = "default"; | |
266 | pinctrl-0 = <&pinctrl_i2c2>; | |
267 | status = "okay"; | |
268 | }; | |
269 | ||
270 | &i2c4 { | |
271 | clock-frequency = <100000>; | |
272 | pinctrl-names = "default"; | |
273 | pinctrl-0 = <&pinctrl_i2c4>; | |
274 | clocks = <&clks 116>; | |
275 | status = "okay"; | |
276 | }; | |
277 | ||
278 | &pwm1 { | |
279 | pinctrl-names = "default"; | |
280 | pinctrl-0 = <&pinctrl_pwm1>; | |
281 | status = "okay"; | |
282 | }; | |
283 | ||
284 | &pwm2 { | |
285 | pinctrl-names = "default"; | |
286 | pinctrl-0 = <&pinctrl_pwm2>; | |
287 | status = "okay"; | |
288 | }; | |
289 | ||
290 | &pwm3 { | |
291 | pinctrl-names = "default"; | |
292 | pinctrl-0 = <&pinctrl_pwm3>; | |
293 | status = "okay"; | |
294 | }; | |
295 | ||
296 | &pwm4 { | |
297 | pinctrl-names = "default"; | |
298 | pinctrl-0 = <&pinctrl_pwm4>; | |
299 | status = "okay"; | |
300 | }; | |
301 | ||
302 | &ssi1 { | |
ec55b150 IP |
303 | status = "okay"; |
304 | }; | |
305 | ||
306 | &uart1 { | |
307 | pinctrl-names = "default"; | |
308 | pinctrl-0 = <&pinctrl_uart1>; | |
309 | status = "okay"; | |
310 | }; | |
311 | ||
312 | &uart2 { | |
313 | pinctrl-names = "default"; | |
314 | pinctrl-0 = <&pinctrl_uart2>; | |
315 | status = "okay"; | |
316 | }; | |
317 | ||
318 | &uart3 { | |
319 | pinctrl-names = "default"; | |
320 | pinctrl-0 = <&pinctrl_uart3>; | |
321 | status = "okay"; | |
322 | }; | |
323 | ||
324 | &uart4 { | |
325 | pinctrl-names = "default"; | |
326 | pinctrl-0 = <&pinctrl_uart4>; | |
327 | status = "okay"; | |
328 | }; | |
329 | ||
330 | &uart5 { | |
331 | pinctrl-names = "default"; | |
332 | pinctrl-0 = <&pinctrl_uart5>; | |
333 | status = "okay"; | |
334 | }; | |
335 | ||
336 | &usbh1 { | |
337 | dr_mode = "host"; | |
338 | disable-over-current; | |
339 | status = "okay"; | |
340 | }; | |
341 | ||
342 | &usbotg { | |
343 | vbus-supply = <®_usb_otg_vbus>; | |
344 | pinctrl-names = "default"; | |
345 | pinctrl-0 = <&pinctrl_usbotg>; | |
346 | disable-over-current; | |
347 | dr_mode = "otg"; | |
348 | status = "okay"; | |
349 | }; | |
350 | ||
351 | &usdhc2 { | |
352 | pinctrl-names = "default"; | |
353 | pinctrl-0 = <&pinctrl_usdhc2>; | |
89c1a8cf DA |
354 | cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
355 | wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; | |
ec55b150 IP |
356 | vmmc-supply = <®_3p3v>; |
357 | status = "okay"; | |
358 | }; | |
359 | ||
360 | &usdhc3 { | |
361 | pinctrl-names = "default"; | |
362 | pinctrl-0 = <&pinctrl_usdhc3>; | |
89c1a8cf DA |
363 | cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; |
364 | wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; | |
ec55b150 IP |
365 | vmmc-supply = <®_3p3v>; |
366 | status = "okay"; | |
367 | }; | |
368 | ||
369 | &usdhc4 { | |
370 | pinctrl-names = "default"; | |
371 | pinctrl-0 = <&pinctrl_usdhc4>; | |
372 | vmmc-supply = <®_3p3v>; | |
373 | non-removable; | |
374 | status = "okay"; | |
375 | }; | |
376 | ||
377 | &iomuxc { | |
378 | pinctrl-names = "default"; | |
379 | ||
380 | imx6-riotboard { | |
381 | pinctrl_audmux: audmuxgrp { | |
382 | fsl,pins = < | |
cb9456b5 IP |
383 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
384 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 | |
385 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 | |
386 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 | |
ec55b150 IP |
387 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ |
388 | >; | |
389 | }; | |
390 | ||
391 | pinctrl_ecspi1: ecspi1grp { | |
392 | fsl,pins = < | |
393 | MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 | |
394 | MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 | |
395 | MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 | |
396 | MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */ | |
397 | >; | |
398 | }; | |
399 | ||
400 | pinctrl_ecspi2: ecspi2grp { | |
401 | fsl,pins = < | |
402 | MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */ | |
403 | MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1 | |
404 | MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1 | |
405 | MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */ | |
406 | MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1 | |
407 | >; | |
408 | }; | |
409 | ||
410 | pinctrl_ecspi3: ecspi3grp { | |
411 | fsl,pins = < | |
412 | MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 | |
413 | MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 | |
414 | MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 | |
415 | MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */ | |
416 | MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */ | |
417 | >; | |
418 | }; | |
419 | ||
420 | pinctrl_enet: enetgrp { | |
421 | fsl,pins = < | |
422 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
423 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
c007b3a6 UKK |
424 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
425 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 | |
426 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 | |
427 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 | |
428 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 | |
429 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 | |
ec55b150 | 430 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ |
c007b3a6 UKK |
431 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */ |
432 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */ | |
433 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */ | |
434 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */ | |
435 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */ | |
ec55b150 | 436 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ |
cb9456b5 | 437 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */ |
46311707 | 438 | MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ |
cb9456b5 | 439 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 /* AR8035 interrupt */ |
ec55b150 IP |
440 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
441 | >; | |
442 | }; | |
443 | ||
444 | pinctrl_i2c1: i2c1grp { | |
445 | fsl,pins = < | |
446 | MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 | |
447 | MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 | |
448 | >; | |
449 | }; | |
450 | ||
451 | pinctrl_i2c2: i2c2grp { | |
452 | fsl,pins = < | |
453 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
454 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
455 | >; | |
456 | }; | |
457 | ||
458 | pinctrl_i2c3: i2c3grp { | |
459 | fsl,pins = < | |
460 | MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 | |
461 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 | |
462 | >; | |
463 | }; | |
464 | ||
465 | pinctrl_i2c4: i2c4grp { | |
466 | fsl,pins = < | |
467 | MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 | |
468 | MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 | |
469 | >; | |
470 | }; | |
471 | ||
472 | pinctrl_led: ledgrp { | |
473 | fsl,pins = < | |
cb9456b5 IP |
474 | MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */ |
475 | MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* user led1 */ | |
ec55b150 IP |
476 | >; |
477 | }; | |
478 | ||
479 | pinctrl_pwm1: pwm1grp { | |
480 | fsl,pins = < | |
481 | MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 | |
482 | >; | |
483 | }; | |
484 | ||
485 | pinctrl_pwm2: pwm2grp { | |
486 | fsl,pins = < | |
487 | MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 | |
488 | >; | |
489 | }; | |
490 | ||
491 | pinctrl_pwm3: pwm3grp { | |
492 | fsl,pins = < | |
493 | MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 | |
494 | >; | |
495 | }; | |
496 | ||
497 | pinctrl_pwm4: pwm4grp { | |
498 | fsl,pins = < | |
499 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 | |
500 | >; | |
501 | }; | |
502 | ||
503 | pinctrl_uart1: uart1grp { | |
504 | fsl,pins = < | |
505 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 | |
506 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 | |
507 | >; | |
508 | }; | |
509 | ||
510 | pinctrl_uart2: uart2grp { | |
511 | fsl,pins = < | |
512 | MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 | |
513 | MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 | |
514 | >; | |
515 | }; | |
516 | ||
517 | pinctrl_uart3: uart3grp { | |
518 | fsl,pins = < | |
519 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 | |
520 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 | |
521 | >; | |
522 | }; | |
523 | ||
524 | pinctrl_uart4: uart4grp { | |
525 | fsl,pins = < | |
526 | MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 | |
527 | MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 | |
528 | >; | |
529 | }; | |
530 | ||
531 | pinctrl_uart5: uart5grp { | |
532 | fsl,pins = < | |
533 | MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 | |
534 | MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 | |
535 | >; | |
536 | }; | |
537 | ||
538 | pinctrl_usbotg: usbotggrp { | |
539 | fsl,pins = < | |
540 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 | |
cb9456b5 IP |
541 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */ |
542 | MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 | |
ec55b150 IP |
543 | >; |
544 | }; | |
545 | ||
546 | pinctrl_usdhc2: usdhc2grp { | |
547 | fsl,pins = < | |
548 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 | |
549 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 | |
550 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 | |
551 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 | |
552 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 | |
553 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 | |
cb9456b5 IP |
554 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* SD2 CD */ |
555 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* SD2 WP */ | |
ec55b150 IP |
556 | >; |
557 | }; | |
558 | ||
559 | pinctrl_usdhc3: usdhc3grp { | |
560 | fsl,pins = < | |
561 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
562 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
563 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
564 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
565 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
566 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
cb9456b5 IP |
567 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* SD3 CD */ |
568 | MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* SD3 WP */ | |
ec55b150 IP |
569 | >; |
570 | }; | |
571 | ||
572 | pinctrl_usdhc4: usdhc4grp { | |
573 | fsl,pins = < | |
574 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 | |
575 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 | |
576 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 | |
577 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 | |
578 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 | |
579 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 | |
cb9456b5 | 580 | MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x17059 /* SD4 RST (eMMC) */ |
ec55b150 IP |
581 | >; |
582 | }; | |
583 | }; | |
584 | }; |