[linux-2.6-block.git] / arch / arm / boot / dts / imx51-zii-rdu1.dts

/*
 * Copyright (C) 2017 Zodiac Inflight Innovations
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "imx51.dtsi"
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	model = "ZII RDU1 Board";
	compatible = "zii,imx51-rdu1", "fsl,imx51";

	chosen {
		stdout-path = &uart1;
	};

	/* Will be filled by the bootloader */
	memory@90000000 {
		reg = <0x90000000 0>;
	};

	aliases {
		mdio-gpio0 = &mdio_gpio;
		rtc0 = &ds1341;
	};

	clk_26M_osc: 26M_osc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
	};

	clk_26M_osc_gate: 26M_gate {
		compatible = "gpio-gate-clock";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_clk26mhz>;
		clocks = <&clk_26M_osc>;
		#clock-cells = <0>;
		enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
	};

	clk_26M_usb: usbhost_gate {
		compatible = "gpio-gate-clock";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbgate26mhz>;
		clocks = <&clk_26M_osc_gate>;
		#clock-cells = <0>;
		enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	};

	clk_26M_snd: snd_gate {
		compatible = "gpio-gate-clock";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sndgate26mhz>;
		clocks = <&clk_26M_osc_gate>;
		#clock-cells = <0>;
		enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
	};

	reg_5p0v_main: regulator-5p0v-main {
		compatible = "regulator-fixed";
		regulator-name = "5V_MAIN";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	disp0 {
		compatible = "fsl,imx-parallel-display";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu_disp1>;

		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			display_in: endpoint {
				remote-endpoint = <&ipu_di0_disp1>;
			};
		};

		port@1 {
			reg = <1>;

			display_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};

	panel {
		/* no compatible here, bootloader will patch in correct one */
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_panel>;
		power-supply = <&reg_3p3v>;
		enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
		status = "disabled";

		port {
			panel_in: endpoint {
				remote-endpoint = <&display_out>;
			};
		};
	};

	i2c_gpio: i2c-gpio {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_swi2c>;
		gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
			<&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
		i2c-gpio,delay-us = <50>;
		status = "okay";

		#address-cells = <1>;
		#size-cells = <0>;

		sgtl5000: codec@a {
			compatible = "fsl,sgtl5000";
			reg = <0x0a>;
			clocks = <&clk_26M_snd>;
			VDDA-supply = <&vdig_reg>;
			VDDIO-supply = <&vvideo_reg>;
			#sound-dai-cells = <0>;
		};
	};

	spi_gpio: spi-gpio {
		compatible = "spi-gpio";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpiospi0>;
		status = "okay";

		gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
		gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
		gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
		num-chipselects = <1>;
		cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;

		eeprom@0 {
			compatible = "eeprom-93xx46";
			reg = <0>;
			spi-max-frequency = <1000000>;
			spi-cs-high;
			data-size = <8>;
		};
	};

	mdio_gpio: mdio-gpio {
		compatible = "virtual,mdio-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_swmdio>;
		gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
			<&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */

		#address-cells = <1>;
		#size-cells = <0>;

		switch@0 {
			compatible = "marvell,mv88e6085";
			reg = <0>;
			dsa,member = <0 0>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "cpu";
					ethernet = <&fec>;

					fixed-link {
						speed = <100>;
						full-duplex;
					};
				};

				port@1 {
					reg = <1>;
					label = "netaux";
				};

				port@3 {
					reg = <3>;
					label = "netright";
				};

				port@4 {
					reg = <4>;
					label = "netleft";
				};
			};
		};
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "Front";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_codec>;
		simple-audio-card,frame-master = <&sound_codec>;
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack";
		simple-audio-card,routing =
			"Headphone Jack", "HPLEFT",
			"Headphone Jack", "HPRIGHT";
		simple-audio-card,aux-devs = <&hpa1>;

		sound_cpu: simple-audio-card,cpu {
			sound-dai = <&ssi2>;
		};

		sound_codec: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			clocks = <&clk_26M_snd>;
		};
	};

	usbh1phy: usbphy1 {
		compatible = "usb-nop-xceiv";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbh1phy>;
		clocks = <&clk_26M_usb>;
		clock-names = "main_clk";
		reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
		vcc-supply = <&vusb_reg>;
		#phy-cells = <0>;
	};

	usbh2phy: usbphy2 {
		compatible = "usb-nop-xceiv";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbh2phy>;
		clocks = <&clk_26M_usb>;
		clock-names = "main_clk";
		reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
		vcc-supply = <&vusb_reg>;
		#phy-cells = <0>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	ssi2 {
		fsl,audmux-port = <1>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_SYN |
			 IMX_AUDMUX_V2_PTCR_TFSEL(2) |
			 IMX_AUDMUX_V2_PTCR_TCSEL(2) |
			 IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
			IMX_AUDMUX_V2_PDCR_RXDSEL(2)
		>;
	};

	aud3 {
		fsl,audmux-port = <2>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN
			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
		>;
	};
};

&cpu {
	cpu-supply = <&sw1_reg>;
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
		   <&gpio4 25 GPIO_ACTIVE_LOW>;
	status = "okay";

	pmic@0 {
		compatible = "fsl,mc13892";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		spi-max-frequency = <6000000>;
		spi-cs-high;
		reg = <0>;
		interrupt-parent = <&gpio1>;
		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
		fsl,mc13xxx-uses-adc;

		regulators {
			sw1_reg: sw1 {
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <1375000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3_reg: sw3 {
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vpll_reg: vpll {
				regulator-min-microvolt = <1050000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vdig_reg: vdig {
				regulator-min-microvolt = <1650000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
			};

			vsd_reg: vsd {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3150000>;
			};

			vusb_reg: vusb {
				regulator-always-on;
			};

			vusb2_reg: vusb2 {
				regulator-min-microvolt = <2400000>;
				regulator-max-microvolt = <2775000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vvideo_reg: vvideo {
				regulator-min-microvolt = <2775000>;
				regulator-max-microvolt = <2775000>;
			};

			vaudio_reg: vaudio {
				regulator-min-microvolt = <2300000>;
				regulator-max-microvolt = <3000000>;
			};

			vcam_reg: vcam {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <3000000>;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <3150000>;
				regulator-always-on;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <2900000>;
				regulator-always-on;
			};
		};

		leds {
			#address-cells = <1>;
			#size-cells = <0>;
			led-control = <0x0 0x0 0x3f83f8 0x0>;

			sysled0@3 {
				reg = <3>;
				label = "system:green:status";
				linux,default-trigger = "default-on";
			};

			sysled1@4 {
				reg = <4>;
				label = "system:green:act";
				linux,default-trigger = "heartbeat";
			};
		};
	};

	flash@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
		spi-max-frequency = <25000000>;
		reg = <1>;
	};
};

&esdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc1>;
	bus-width = <4>;
	no-1-8-v;
	non-removable;
	no-sdio;
	no-sd;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec>;
	phy-mode = "mii";
	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
	phy-supply = <&vgen3_reg>;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c04";
		pagesize = <16>;
		reg = <0x50>;
	};

	hpa1: amp@60 {
		compatible = "ti,tpa6130a2";
		reg = <0x60>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ampgpio>;
		power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		Vdd-supply = <&reg_3p3v>;
	};

	ds1341: rtc@68 {
		compatible = "maxim,ds1341";
		reg = <0x68>;
	};

	/* touch nodes default disabled, bootloader will enable the right one */

	touchscreen@4b {
		compatible = "atmel,maxtouch";
		reg = <0x4b>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ts>;
		interrupt-parent = <&gpio3>;
		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
		status = "disabled";
	};

	touchscreen@4c {
		compatible = "atmel,maxtouch";
		reg = <0x4c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ts>;
		interrupt-parent = <&gpio3>;
		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
		status = "disabled";
	};

	touchscreen@20 {
		compatible = "syna,rmi4-i2c";
		reg = <0x20>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ts>;
		interrupt-parent = <&gpio3>;
		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
		status = "disabled";

		#address-cells = <1>;
		#size-cells = <0>;

		rmi4-f01@1 {
			reg = <0x1>;
			syna,nosleep-mode = <2>;
		};

		rmi4-f11@11 {
			reg = <0x11>;
			touchscreen-inverted-y;
			touchscreen-swapped-x-y;
			syna,sensor-type = <1>;
		};
	};

};

&ipu_di0_disp1 {
	remote-endpoint = <&display_in>;
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";

	rave-sp {
		compatible = "zii,rave-sp-rdu1";
		current-speed = <38400>;

		watchdog {
			compatible = "zii,rave-sp-watchdog";
		};

		backlight {
			compatible = "zii,rave-sp-backlight";
		};

		pwrbutton {
			compatible = "zii,rave-sp-pwrbutton";
		};
	};
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	dr_mode = "host";
	phy_type = "ulpi";
	fsl,usbphy = <&usbh1phy>;
	disable-over-current;
	maximum-speed = "full-speed";
	vbus-supply = <&reg_5p0v_main>;
	status = "okay";
};

&usbh2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh2>;
	dr_mode = "host";
	phy_type = "ulpi";
	fsl,usbphy = <&usbh2phy>;
	disable-over-current;
	vbus-supply = <&reg_5p0v_main>;
	status = "okay";
};

&usbphy0 {
	vcc-supply = <&vusb_reg>;
};

&usbotg {
	dr_mode = "host";
	disable-over-current;
	phy_type = "utmi_wide";
	vbus-supply = <&reg_5p0v_main>;
	status = "okay";
};

&iomuxc {
	pinctrl_ampgpio: ampgpiogrp {
		fsl,pins = <
			MX51_PAD_GPIO1_9__GPIO1_9		0x5e
		>;
	};

	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0xa5
			MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x85
			MX51_PAD_AUD3_BB_CK__AUD3_TXC		0xa5
			MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x85
		>;
	};

	pinctrl_clk26mhz: clk26mhzgrp {
		fsl,pins = <
			MX51_PAD_DI1_PIN12__GPIO3_1		0x85
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
			MX51_PAD_CSPI1_SS0__GPIO4_24		0x85
			MX51_PAD_CSPI1_SS1__GPIO4_25		0x85
		>;
	};

	pinctrl_esdhc1: esdhc1grp {
		fsl,pins = <
			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
		>;
	};

	pinctrl_fec: fecgrp {
		fsl,pins = <
			MX51_PAD_EIM_EB2__FEC_MDIO		0x1f5
			MX51_PAD_NANDF_D9__FEC_RDATA0		0x2180
			MX51_PAD_EIM_EB3__FEC_RDATA1		0x180
			MX51_PAD_EIM_CS2__FEC_RDATA2		0x180
			MX51_PAD_EIM_CS3__FEC_RDATA3		0x180
			MX51_PAD_EIM_CS4__FEC_RX_ER		0x180
			MX51_PAD_NANDF_D11__FEC_RX_DV		0x2084
			MX51_PAD_EIM_CS5__FEC_CRS		0x180
			MX51_PAD_NANDF_RB2__FEC_COL		0x2180
			MX51_PAD_NANDF_RB3__FEC_RX_CLK		0x2180
			MX51_PAD_NANDF_CS2__FEC_TX_ER		0x2004
			MX51_PAD_NANDF_CS3__FEC_MDC		0x2004
			MX51_PAD_NANDF_D8__FEC_TDATA0		0x2180
			MX51_PAD_NANDF_CS4__FEC_TDATA1		0x2004
			MX51_PAD_NANDF_CS5__FEC_TDATA2		0x2004
			MX51_PAD_NANDF_CS6__FEC_TDATA3		0x2004
			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x2004
			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x2180
			MX51_PAD_EIM_A20__GPIO2_14		0x85
		>;
	};

	pinctrl_gpiospi0: gpiospi0grp {
		fsl,pins = <
			MX51_PAD_CSI2_D18__GPIO4_11		0x85
			MX51_PAD_CSI2_D19__GPIO4_12		0x85
			MX51_PAD_CSI2_HSYNC__GPIO4_14		0x85
			MX51_PAD_CSI2_PIXCLK__GPIO4_15		0x85
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed
			MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed
		>;
	};

	pinctrl_ipu_disp1: ipudisp1grp {
		fsl,pins = <
			MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5
			MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5
			MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5
			MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5
			MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5
			MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5
			MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5
			MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5
			MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5
			MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5
			MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5
			MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5
			MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5
			MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5
			MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5
			MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5
			MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5
			MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5
			MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5
			MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5
			MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5
			MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5
			MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5
			MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5
			MX51_PAD_DI1_PIN2__DI1_PIN2		0x5
			MX51_PAD_DI1_PIN3__DI1_PIN3		0x5
			MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	0x5
		>;
	};

	pinctrl_panel: panelgrp {
		fsl,pins = <
			MX51_PAD_DI1_D0_CS__GPIO3_3		0x85
		>;
	};

	pinctrl_pmic: pmicgrp {
		fsl,pins = <
			MX51_PAD_GPIO1_4__GPIO1_4		0x1e0
			MX51_PAD_GPIO1_8__GPIO1_8		0x21e2
		>;
	};

	pinctrl_sndgate26mhz: sndgate26mhzgrp {
		fsl,pins = <
			MX51_PAD_CSPI1_RDY__GPIO4_26		0x85
		>;
	};

	pinctrl_swi2c: swi2cgrp {
		fsl,pins = <
			MX51_PAD_GPIO1_2__GPIO1_2		0xc5
			MX51_PAD_DI1_D1_CS__GPIO3_4		0x400001f5
		>;
	};

	pinctrl_swmdio: swmdiogrp {
		fsl,pins = <
			MX51_PAD_NANDF_D14__GPIO3_26		0x21e6
			MX51_PAD_NANDF_D15__GPIO3_25		0x21e6
		>;
	};

	pinctrl_ts: tsgrp {
		fsl,pins = <
			MX51_PAD_CSI1_D8__GPIO3_12		0x85
			MX51_PAD_CSI1_D9__GPIO3_13		0x85
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
			MX51_PAD_UART1_RTS__UART1_RTS		0x1c4
			MX51_PAD_UART1_CTS__UART1_CTS		0x1c4
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX51_PAD_UART2_RXD__UART2_RXD		0xc5
			MX51_PAD_UART2_TXD__UART2_TXD		0xc5
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX51_PAD_EIM_D25__UART3_RXD		0x1c5
			MX51_PAD_EIM_D26__UART3_TXD		0x1c5
		>;
	};

	pinctrl_usbgate26mhz: usbgate26mhzgrp {
		fsl,pins = <
			MX51_PAD_DISP2_DAT6__GPIO1_19		0x85
		>;
	};

	pinctrl_usbh1: usbh1grp {
		fsl,pins = <
			MX51_PAD_USBH1_STP__USBH1_STP		0x0
			MX51_PAD_USBH1_CLK__USBH1_CLK		0x0
			MX51_PAD_USBH1_DIR__USBH1_DIR		0x0
			MX51_PAD_USBH1_NXT__USBH1_NXT		0x0
			MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x0
			MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x0
			MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x0
			MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x0
			MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x0
			MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x0
			MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x0
			MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x0
		>;
	};

	pinctrl_usbh1phy: usbh1phygrp {
		fsl,pins = <
			MX51_PAD_NANDF_D0__GPIO4_8		0x85
		>;
	};

	pinctrl_usbh2: usbh2grp {
		fsl,pins = <
			MX51_PAD_EIM_A26__USBH2_STP		0x0
			MX51_PAD_EIM_A24__USBH2_CLK		0x0
			MX51_PAD_EIM_A25__USBH2_DIR		0x0
			MX51_PAD_EIM_A27__USBH2_NXT		0x0
			MX51_PAD_EIM_D16__USBH2_DATA0		0x0
			MX51_PAD_EIM_D17__USBH2_DATA1		0x0
			MX51_PAD_EIM_D18__USBH2_DATA2		0x0
			MX51_PAD_EIM_D19__USBH2_DATA3		0x0
			MX51_PAD_EIM_D20__USBH2_DATA4		0x0
			MX51_PAD_EIM_D21__USBH2_DATA5		0x0
			MX51_PAD_EIM_D22__USBH2_DATA6		0x0
			MX51_PAD_EIM_D23__USBH2_DATA7		0x0
		>;
	};

	pinctrl_usbh2phy: usbh2phygrp {
		fsl,pins = <
			MX51_PAD_NANDF_D1__GPIO4_7		0x85
		>;
	};
};
Commit	Line	Data
ceef0396 LS	1	/*
	2	* Copyright (C) 2017 Zodiac Inflight Innovations
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This file is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This file is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* Or, alternatively,
	19	*
	20	* b) Permission is hereby granted, free of charge, to any person
	21	* obtaining a copy of this software and associated documentation
	22	* files (the "Software"), to deal in the Software without
	23	* restriction, including without limitation the rights to use,
	24	* copy, modify, merge, publish, distribute, sublicense, and/or
	25	* sell copies of the Software, and to permit persons to whom the
	26	* Software is furnished to do so, subject to the following
	27	* conditions:
	28	*
	29	* The above copyright notice and this permission notice shall be
	30	* included in all copies or substantial portions of the Software.
	31	*
	32	* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
	33	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	34	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	35	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	36	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	37	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	38	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	39	* OTHER DEALINGS IN THE SOFTWARE.
	40	*/
	41
	42	/dts-v1/;
	43	#include "imx51.dtsi"
	44	#include <dt-bindings/sound/fsl-imx-audmux.h>
	45
	46	/ {
	47	model = "ZII RDU1 Board";
	48	compatible = "zii,imx51-rdu1", "fsl,imx51";
	49
	50	chosen {
	51	stdout-path = &uart1;
	52	};
	53
6de57233	54	/* Will be filled by the bootloader */
c08be1ad FE	55	memory@90000000 {
c08be1ad FE	56	reg = <0x90000000 0>;
6de57233 MF	57	};
6de57233 MF	58
ceef0396 LS	59	aliases {
	60	mdio-gpio0 = &mdio_gpio;
	61	rtc0 = &ds1341;
	62	};
	63
	64	clk_26M_osc: 26M_osc {
	65	compatible = "fixed-clock";
	66	#clock-cells = <0>;
	67	clock-frequency = <26000000>;
	68	};
	69
	70	clk_26M_osc_gate: 26M_gate {
	71	compatible = "gpio-gate-clock";
	72	pinctrl-names = "default";
	73	pinctrl-0 = <&pinctrl_clk26mhz>;
	74	clocks = <&clk_26M_osc>;
	75	#clock-cells = <0>;
	76	enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
	77	};
	78
	79	clk_26M_usb: usbhost_gate {
	80	compatible = "gpio-gate-clock";
	81	pinctrl-names = "default";
	82	pinctrl-0 = <&pinctrl_usbgate26mhz>;
	83	clocks = <&clk_26M_osc_gate>;
	84	#clock-cells = <0>;
	85	enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	86	};
	87
	88	clk_26M_snd: snd_gate {
	89	compatible = "gpio-gate-clock";
	90	pinctrl-names = "default";
	91	pinctrl-0 = <&pinctrl_sndgate26mhz>;
	92	clocks = <&clk_26M_osc_gate>;
	93	#clock-cells = <0>;
	94	enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
	95	};
	96
	97	reg_5p0v_main: regulator-5p0v-main {
	98	compatible = "regulator-fixed";
	99	regulator-name = "5V_MAIN";
	100	regulator-min-microvolt = <5000000>;
	101	regulator-max-microvolt = <5000000>;
	102	regulator-always-on;
	103	};
	104
	105	reg_3p3v: regulator-3p3v {
	106	compatible = "regulator-fixed";
	107	regulator-name = "3.3V";
	108	regulator-min-microvolt = <3300000>;
	109	regulator-max-microvolt = <3300000>;
	110	regulator-always-on;
	111	};
	112
	113	disp0 {
	114	compatible = "fsl,imx-parallel-display";
	115	pinctrl-names = "default";
	116	pinctrl-0 = <&pinctrl_ipu_disp1>;
	117
	118	#address-cells = <1>;
	119	#size-cells = <0>;
	120
	121	port@0 {
	122	reg = <0>;
123
124	display_in: endpoint {
125	remote-endpoint = <&ipu_di0_disp1>;
126	};
127	};
128
129	port@1 {
130	reg = <1>;
131
132	display_out: endpoint {
133	remote-endpoint = <&panel_in>;
134	};
135	};
136	};
137
138	panel {
139	/* no compatible here, bootloader will patch in correct one */
140	pinctrl-names = "default";
141	pinctrl-0 = <&pinctrl_panel>;
142	power-supply = <&reg_3p3v>;
143	enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
144	status = "disabled";
145
146	port {
147	panel_in: endpoint {
148	remote-endpoint = <&display_out>;
149	};
150	};
151	};
152
153	i2c_gpio: i2c-gpio {
154	compatible = "i2c-gpio";
155	pinctrl-names = "default";
156	pinctrl-0 = <&pinctrl_swi2c>;
157	gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
158	<&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
159	i2c-gpio,delay-us = <50>;
160	status = "okay";
161
162	#address-cells = <1>;
163	#size-cells = <0>;
164
da7920e3	165	sgtl5000: codec@a {
ceef0396 LS	166	compatible = "fsl,sgtl5000";
	167	reg = <0x0a>;
	168	clocks = <&clk_26M_snd>;
	169	VDDA-supply = <&vdig_reg>;
	170	VDDIO-supply = <&vvideo_reg>;
	171	#sound-dai-cells = <0>;
	172	};
	173	};
	174
	175	spi_gpio: spi-gpio {
	176	compatible = "spi-gpio";
	177	#address-cells = <1>;
	178	#size-cells = <0>;
	179	pinctrl-names = "default";
	180	pinctrl-0 = <&pinctrl_gpiospi0>;
	181	status = "okay";
	182
	183	gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
	184	gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
	185	gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
	186	num-chipselects = <1>;
	187	cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
	188
	189	eeprom@0 {
	190	compatible = "eeprom-93xx46";
	191	reg = <0>;
	192	spi-max-frequency = <1000000>;
	193	spi-cs-high;
	194	data-size = <8>;
	195	};
	196	};
	197
	198	mdio_gpio: mdio-gpio {
	199	compatible = "virtual,mdio-gpio";
	200	pinctrl-names = "default";
	201	pinctrl-0 = <&pinctrl_swmdio>;
	202	gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
	203	<&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
	204
	205	#address-cells = <1>;
	206	#size-cells = <0>;
	207
	208	switch@0 {
	209	compatible = "marvell,mv88e6085";
ceef0396 LS	210	reg = <0>;
	211	dsa,member = <0 0>;
	212
	213	ports {
	214	#address-cells = <1>;
	215	#size-cells = <0>;
	216
	217	port@0 {
	218	reg = <0>;
	219	label = "cpu";
	220	ethernet = <&fec>;
	221
	222	fixed-link {
	223	speed = <100>;
	224	full-duplex;
	225	};
	226	};
	227
	228	port@1 {
	229	reg = <1>;
	230	label = "netaux";
	231	};
	232
	233	port@3 {
	234	reg = <3>;
	235	label = "netright";
	236	};
	237
	238	port@4 {
	239	reg = <4>;
	240	label = "netleft";
	241	};
	242	};
	243	};
	244	};
	245
	246	sound {
	247	compatible = "simple-audio-card";
6d5b36f6	248	simple-audio-card,name = "Front";
ceef0396 LS	249	simple-audio-card,format = "i2s";
	250	simple-audio-card,bitclock-master = <&sound_codec>;
	251	simple-audio-card,frame-master = <&sound_codec>;
	252	simple-audio-card,widgets =
	253	"Headphone", "Headphone Jack";
	254	simple-audio-card,routing =
	255	"Headphone Jack", "HPLEFT",
	256	"Headphone Jack", "HPRIGHT";
6d5b36f6	257	simple-audio-card,aux-devs = <&hpa1>;
ceef0396 LS	258
	259	sound_cpu: simple-audio-card,cpu {
	260	sound-dai = <&ssi2>;
	261	};
	262
	263	sound_codec: simple-audio-card,codec {
	264	sound-dai = <&sgtl5000>;
	265	clocks = <&clk_26M_snd>;
	266	};
	267	};
	268
	269	usbh1phy: usbphy1 {
	270	compatible = "usb-nop-xceiv";
	271	pinctrl-names = "default";
	272	pinctrl-0 = <&pinctrl_usbh1phy>;
	273	clocks = <&clk_26M_usb>;
	274	clock-names = "main_clk";
	275	reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
	276	vcc-supply = <&vusb_reg>;
d745d5f2	277	#phy-cells = <0>;
ceef0396 LS	278	};
	279
	280	usbh2phy: usbphy2 {
	281	compatible = "usb-nop-xceiv";
	282	pinctrl-names = "default";
	283	pinctrl-0 = <&pinctrl_usbh2phy>;
	284	clocks = <&clk_26M_usb>;
	285	clock-names = "main_clk";
	286	reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
	287	vcc-supply = <&vusb_reg>;
d745d5f2	288	#phy-cells = <0>;
ceef0396 LS	289	};
	290	};
	291
	292	&audmux {
	293	pinctrl-names = "default";
	294	pinctrl-0 = <&pinctrl_audmux>;
	295	status = "okay";
	296
	297	ssi2 {
	298	fsl,audmux-port = <1>;
	299	fsl,port-config = <
	300	(IMX_AUDMUX_V2_PTCR_SYN \|
	301	IMX_AUDMUX_V2_PTCR_TFSEL(2) \|
	302	IMX_AUDMUX_V2_PTCR_TCSEL(2) \|
	303	IMX_AUDMUX_V2_PTCR_TFSDIR \|
	304	IMX_AUDMUX_V2_PTCR_TCLKDIR)
	305	IMX_AUDMUX_V2_PDCR_RXDSEL(2)
	306	>;
	307	};
	308
	309	aud3 {
	310	fsl,audmux-port = <2>;
	311	fsl,port-config = <
	312	IMX_AUDMUX_V2_PTCR_SYN
	313	IMX_AUDMUX_V2_PDCR_RXDSEL(1)
	314	>;
	315	};
	316	};
	317
	318	&cpu {
	319	cpu-supply = <&sw1_reg>;
	320	};
	321
	322	&ecspi1 {
	323	pinctrl-names = "default";
	324	pinctrl-0 = <&pinctrl_ecspi1>;
	325	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
	326	<&gpio4 25 GPIO_ACTIVE_LOW>;
	327	status = "okay";
	328
	329	pmic@0 {
	330	compatible = "fsl,mc13892";
	331	pinctrl-names = "default";
	332	pinctrl-0 = <&pinctrl_pmic>;
	333	spi-max-frequency = <6000000>;
	334	spi-cs-high;
	335	reg = <0>;
	336	interrupt-parent = <&gpio1>;
	337	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
	338	fsl,mc13xxx-uses-adc;
	339
	340	regulators {
	341	sw1_reg: sw1 {
	342	regulator-min-microvolt = <600000>;
	343	regulator-max-microvolt = <1375000>;
	344	regulator-boot-on;
	345	regulator-always-on;
	346	};
	347
	348	sw2_reg: sw2 {
	349	regulator-min-microvolt = <900000>;
	350	regulator-max-microvolt = <1850000>;
	351	regulator-boot-on;
	352	regulator-always-on;
353	};
354
355	sw3_reg: sw3 {
356	regulator-min-microvolt = <1100000>;
357	regulator-max-microvolt = <1850000>;
358	regulator-boot-on;
359	regulator-always-on;
360	};
361
362	sw4_reg: sw4 {
363	regulator-min-microvolt = <1100000>;
364	regulator-max-microvolt = <1850000>;
365	regulator-boot-on;
366	regulator-always-on;
367	};
368
369	vpll_reg: vpll {
370	regulator-min-microvolt = <1050000>;
371	regulator-max-microvolt = <1800000>;
372	regulator-boot-on;
373	regulator-always-on;
374	};
375
376	vdig_reg: vdig {
377	regulator-min-microvolt = <1650000>;
378	regulator-max-microvolt = <1650000>;
379	regulator-boot-on;
380	};
381
382	vsd_reg: vsd {
383	regulator-min-microvolt = <1800000>;
384	regulator-max-microvolt = <3150000>;
385	};
386
387	vusb_reg: vusb {
388	regulator-always-on;
389	};
390
391	vusb2_reg: vusb2 {
392	regulator-min-microvolt = <2400000>;
393	regulator-max-microvolt = <2775000>;
394	regulator-boot-on;
395	regulator-always-on;
396	};
397
398	vvideo_reg: vvideo {
399	regulator-min-microvolt = <2775000>;
400	regulator-max-microvolt = <2775000>;
401	};
402
403	vaudio_reg: vaudio {
404	regulator-min-microvolt = <2300000>;
405	regulator-max-microvolt = <3000000>;
406	};
407
408	vcam_reg: vcam {
409	regulator-min-microvolt = <2500000>;
410	regulator-max-microvolt = <3000000>;
411	};
412
413	vgen1_reg: vgen1 {
414	regulator-min-microvolt = <1200000>;
415	regulator-max-microvolt = <1200000>;
416	};
417
418	vgen2_reg: vgen2 {
419	regulator-min-microvolt = <1200000>;
420	regulator-max-microvolt = <3150000>;
421	regulator-always-on;
422	};
423
424	vgen3_reg: vgen3 {
425	regulator-min-microvolt = <1800000>;
426	regulator-max-microvolt = <2900000>;
427	regulator-always-on;
428	};
429	};
430
431	leds {
432	#address-cells = <1>;
433	#size-cells = <0>;
434	led-control = <0x0 0x0 0x3f83f8 0x0>;
435
bee37d85	436	sysled0@3 {
ceef0396 LS	437	reg = <3>;
	438	label = "system:green:status";
	439	linux,default-trigger = "default-on";
	440	};
	441
bee37d85	442	sysled1@4 {
ceef0396 LS	443	reg = <4>;
	444	label = "system:green:act";
	445	linux,default-trigger = "heartbeat";
	446	};
	447	};
	448	};
	449
	450	flash@1 {
	451	#address-cells = <1>;
	452	#size-cells = <1>;
	453	compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
	454	spi-max-frequency = <25000000>;
	455	reg = <1>;
	456	};
	457	};
	458
	459	&esdhc1 {
	460	pinctrl-names = "default";
	461	pinctrl-0 = <&pinctrl_esdhc1>;
	462	bus-width = <4>;
f2677037	463	no-1-8-v;
ceef0396	464	non-removable;
f2677037 NY	465	no-sdio;
f2677037 NY	466	no-sd;
ceef0396 LS	467	status = "okay";
	468	};
	469
	470	&fec {
	471	pinctrl-names = "default";
	472	pinctrl-0 = <&pinctrl_fec>;
	473	phy-mode = "mii";
	474	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
	475	phy-supply = <&vgen3_reg>;
	476	status = "okay";
	477	};
	478
	479	&i2c2 {
	480	pinctrl-names = "default";
	481	pinctrl-0 = <&pinctrl_i2c2>;
	482	status = "okay";
	483
	484	eeprom@50 {
	485	compatible = "atmel,24c04";
	486	pagesize = <16>;
	487	reg = <0x50>;
	488	};
	489
6d5b36f6	490	hpa1: amp@60 {
ceef0396 LS	491	compatible = "ti,tpa6130a2";
	492	reg = <0x60>;
	493	pinctrl-names = "default";
	494	pinctrl-0 = <&pinctrl_ampgpio>;
	495	power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	496	Vdd-supply = <&reg_3p3v>;
	497	};
	498
	499	ds1341: rtc@68 {
	500	compatible = "maxim,ds1341";
	501	reg = <0x68>;
	502	};
	503
	504	/* touch nodes default disabled, bootloader will enable the right one */
	505
	506	touchscreen@4b {
	507	compatible = "atmel,maxtouch";
	508	reg = <0x4b>;
	509	pinctrl-names = "default";
	510	pinctrl-0 = <&pinctrl_ts>;
	511	interrupt-parent = <&gpio3>;
	512	interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
	513	status = "disabled";
	514	};
	515
	516	touchscreen@4c {
	517	compatible = "atmel,maxtouch";
	518	reg = <0x4c>;
	519	pinctrl-names = "default";
	520	pinctrl-0 = <&pinctrl_ts>;
	521	interrupt-parent = <&gpio3>;
	522	interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
	523	status = "disabled";
	524	};
	525
	526	touchscreen@20 {
6d3299ae	527	compatible = "syna,rmi4-i2c";
ceef0396 LS	528	reg = <0x20>;
	529	pinctrl-names = "default";
	530	pinctrl-0 = <&pinctrl_ts>;
	531	interrupt-parent = <&gpio3>;
	532	interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
	533	status = "disabled";
	534
	535	#address-cells = <1>;
	536	#size-cells = <0>;
	537
	538	rmi4-f01@1 {
	539	reg = <0x1>;
	540	syna,nosleep-mode = <2>;
	541	};
	542
	543	rmi4-f11@11 {
	544	reg = <0x11>;
6d3299ae NY	545	touchscreen-inverted-y;
6d3299ae NY	546	touchscreen-swapped-x-y;
ceef0396 LS	547	syna,sensor-type = <1>;
	548	};
	549	};
	550
	551	};
	552
	553	&ipu_di0_disp1 {
	554	remote-endpoint = <&display_in>;
	555	};
	556
	557	&ssi2 {
	558	status = "okay";
	559	};
	560
	561	&uart1 {
	562	pinctrl-names = "default";
	563	pinctrl-0 = <&pinctrl_uart1>;
	564	status = "okay";
	565	};
	566
	567	&uart2 {
	568	pinctrl-names = "default";
	569	pinctrl-0 = <&pinctrl_uart2>;
	570	status = "okay";
	571	};
	572
	573	&uart3 {
	574	pinctrl-names = "default";
	575	pinctrl-0 = <&pinctrl_uart3>;
	576	status = "okay";
cbeb1dc7 AS	577
	578	rave-sp {
	579	compatible = "zii,rave-sp-rdu1";
	580	current-speed = <38400>;
	581
	582	watchdog {
	583	compatible = "zii,rave-sp-watchdog";
	584	};
6e21e4c2 NY	585
	586	backlight {
	587	compatible = "zii,rave-sp-backlight";
	588	};
	589
	590	pwrbutton {
	591	compatible = "zii,rave-sp-pwrbutton";
	592	};
cbeb1dc7	593	};
ceef0396 LS	594	};
	595
	596	&usbh1 {
	597	pinctrl-names = "default";
	598	pinctrl-0 = <&pinctrl_usbh1>;
	599	dr_mode = "host";
	600	phy_type = "ulpi";
	601	fsl,usbphy = <&usbh1phy>;
	602	disable-over-current;
1a68ab4d	603	maximum-speed = "full-speed";
ceef0396 LS	604	vbus-supply = <&reg_5p0v_main>;
	605	status = "okay";
	606	};
	607
	608	&usbh2 {
	609	pinctrl-names = "default";
	610	pinctrl-0 = <&pinctrl_usbh2>;
	611	dr_mode = "host";
	612	phy_type = "ulpi";
	613	fsl,usbphy = <&usbh2phy>;
	614	disable-over-current;
	615	vbus-supply = <&reg_5p0v_main>;
	616	status = "okay";
	617	};
	618
	619	&usbphy0 {
	620	vcc-supply = <&vusb_reg>;
	621	};
	622
	623	&usbotg {
	624	dr_mode = "host";
	625	disable-over-current;
	626	phy_type = "utmi_wide";
	627	vbus-supply = <&reg_5p0v_main>;
	628	status = "okay";
	629	};
	630
	631	&iomuxc {
	632	pinctrl_ampgpio: ampgpiogrp {
	633	fsl,pins = <
	634	MX51_PAD_GPIO1_9__GPIO1_9 0x5e
	635	>;
	636	};
	637
	638	pinctrl_audmux: audmuxgrp {
	639	fsl,pins = <
	640	MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0xa5
	641	MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x85
	642	MX51_PAD_AUD3_BB_CK__AUD3_TXC 0xa5
	643	MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x85
	644	>;
	645	};
	646
	647	pinctrl_clk26mhz: clk26mhzgrp {
	648	fsl,pins = <
	649	MX51_PAD_DI1_PIN12__GPIO3_1 0x85
	650	>;
	651	};
	652
	653	pinctrl_ecspi1: ecspi1grp {
	654	fsl,pins = <
	655	MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
	656	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
	657	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
	658	MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
	659	MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
	660	>;
	661	};
	662
	663	pinctrl_esdhc1: esdhc1grp {
	664	fsl,pins = <
	665	MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
	666	MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
	667	MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
668	MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
669	MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
670	MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
671	>;
672	};
673
674	pinctrl_fec: fecgrp {
675	fsl,pins = <
676	MX51_PAD_EIM_EB2__FEC_MDIO 0x1f5
677	MX51_PAD_NANDF_D9__FEC_RDATA0 0x2180
678	MX51_PAD_EIM_EB3__FEC_RDATA1 0x180
679	MX51_PAD_EIM_CS2__FEC_RDATA2 0x180
680	MX51_PAD_EIM_CS3__FEC_RDATA3 0x180
681	MX51_PAD_EIM_CS4__FEC_RX_ER 0x180
682	MX51_PAD_NANDF_D11__FEC_RX_DV 0x2084
683	MX51_PAD_EIM_CS5__FEC_CRS 0x180
684	MX51_PAD_NANDF_RB2__FEC_COL 0x2180
685	MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x2180
686	MX51_PAD_NANDF_CS2__FEC_TX_ER 0x2004
687	MX51_PAD_NANDF_CS3__FEC_MDC 0x2004
688	MX51_PAD_NANDF_D8__FEC_TDATA0 0x2180
689	MX51_PAD_NANDF_CS4__FEC_TDATA1 0x2004
690	MX51_PAD_NANDF_CS5__FEC_TDATA2 0x2004
691	MX51_PAD_NANDF_CS6__FEC_TDATA3 0x2004
692	MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
693	MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
694	MX51_PAD_EIM_A20__GPIO2_14 0x85
695	>;
696	};
697
698	pinctrl_gpiospi0: gpiospi0grp {
699	fsl,pins = <
700	MX51_PAD_CSI2_D18__GPIO4_11 0x85
701	MX51_PAD_CSI2_D19__GPIO4_12 0x85
702	MX51_PAD_CSI2_HSYNC__GPIO4_14 0x85
703	MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x85
704	>;
705	};
706
707	pinctrl_i2c2: i2c2grp {
708	fsl,pins = <
709	MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
710	MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
711	>;
712	};
713
714	pinctrl_ipu_disp1: ipudisp1grp {
715	fsl,pins = <
716	MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
717	MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
718	MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
719	MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
720	MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
721	MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
722	MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
723	MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
724	MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
725	MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
726	MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
727	MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
728	MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
729	MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
730	MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
731	MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
732	MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
733	MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
734	MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
735	MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
736	MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
737	MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
738	MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
739	MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
740	MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
741	MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
742	MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
743	>;
744	};
745
746	pinctrl_panel: panelgrp {
747	fsl,pins = <
748	MX51_PAD_DI1_D0_CS__GPIO3_3 0x85
749	>;
750	};
751
752	pinctrl_pmic: pmicgrp {
753	fsl,pins = <
754	MX51_PAD_GPIO1_4__GPIO1_4 0x1e0
755	MX51_PAD_GPIO1_8__GPIO1_8 0x21e2
756	>;
757	};
758
759	pinctrl_sndgate26mhz: sndgate26mhzgrp {
760	fsl,pins = <
761	MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
762	>;
763	};
764
765	pinctrl_swi2c: swi2cgrp {
766	fsl,pins = <
767	MX51_PAD_GPIO1_2__GPIO1_2 0xc5
768	MX51_PAD_DI1_D1_CS__GPIO3_4 0x400001f5
769	>;
770	};
771
772	pinctrl_swmdio: swmdiogrp {
773	fsl,pins = <
774	MX51_PAD_NANDF_D14__GPIO3_26 0x21e6
775	MX51_PAD_NANDF_D15__GPIO3_25 0x21e6
776	>;
777	};
778
779	pinctrl_ts: tsgrp {
780	fsl,pins = <
781	MX51_PAD_CSI1_D8__GPIO3_12 0x85
782	MX51_PAD_CSI1_D9__GPIO3_13 0x85
783	>;
784	};
785
786	pinctrl_uart1: uart1grp {
787	fsl,pins = <
788	MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
789	MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
790	MX51_PAD_UART1_RTS__UART1_RTS 0x1c4
791	MX51_PAD_UART1_CTS__UART1_CTS 0x1c4
792	>;
793	};
794
795	pinctrl_uart2: uart2grp {
796	fsl,pins = <
797	MX51_PAD_UART2_RXD__UART2_RXD 0xc5
798	MX51_PAD_UART2_TXD__UART2_TXD 0xc5
799	>;
800	};
801
802	pinctrl_uart3: uart3grp {
803	fsl,pins = <
804	MX51_PAD_EIM_D25__UART3_RXD 0x1c5
805	MX51_PAD_EIM_D26__UART3_TXD 0x1c5
806	>;
807	};
808
809	pinctrl_usbgate26mhz: usbgate26mhzgrp {
810	fsl,pins = <
811	MX51_PAD_DISP2_DAT6__GPIO1_19 0x85
812	>;
813	};
814
815	pinctrl_usbh1: usbh1grp {
816	fsl,pins = <
817	MX51_PAD_USBH1_STP__USBH1_STP 0x0
818	MX51_PAD_USBH1_CLK__USBH1_CLK 0x0
819	MX51_PAD_USBH1_DIR__USBH1_DIR 0x0
820	MX51_PAD_USBH1_NXT__USBH1_NXT 0x0
821	MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x0
822	MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x0
823	MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x0
824	MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x0
825	MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x0
826	MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x0
827	MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x0
828	MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x0
829	>;
830	};
831
832	pinctrl_usbh1phy: usbh1phygrp {
833	fsl,pins = <
834	MX51_PAD_NANDF_D0__GPIO4_8 0x85
835	>;
836	};
837
838	pinctrl_usbh2: usbh2grp {
839	fsl,pins = <
840	MX51_PAD_EIM_A26__USBH2_STP 0x0
841	MX51_PAD_EIM_A24__USBH2_CLK 0x0
842	MX51_PAD_EIM_A25__USBH2_DIR 0x0
843	MX51_PAD_EIM_A27__USBH2_NXT 0x0
844	MX51_PAD_EIM_D16__USBH2_DATA0 0x0
845	MX51_PAD_EIM_D17__USBH2_DATA1 0x0
846	MX51_PAD_EIM_D18__USBH2_DATA2 0x0
847	MX51_PAD_EIM_D19__USBH2_DATA3 0x0
848	MX51_PAD_EIM_D20__USBH2_DATA4 0x0
849	MX51_PAD_EIM_D21__USBH2_DATA5 0x0
850	MX51_PAD_EIM_D22__USBH2_DATA6 0x0
851	MX51_PAD_EIM_D23__USBH2_DATA7 0x0
852	>;
853	};
854
855	pinctrl_usbh2phy: usbh2phygrp {
856	fsl,pins = <
857	MX51_PAD_NANDF_D1__GPIO4_7 0x85
858	>;
859	};
860	};