projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 153f1d84 DC |
1 | /* |
| 2 | * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or | |
| 5 | * modify it under the terms of the GNU General Public License | |
| 6 | * as published by the Free Software Foundation; either version 2 | |
| 7 | * of the License, or (at your option) any later version. | |
| 8 | * This program is distributed in the hope that it will be useful, | |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | * GNU General Public License for more details. | |
| 12 | */ | |
| 13 | ||
| 14 | /dts-v1/; | |
| 15 | ||
| 16 | #include <dt-bindings/gpio/gpio.h> | |
| 17 | #include <dt-bindings/input/input.h> | |
| 18 | #include "imx35-eukrea-cpuimx35.dtsi" | |
| 19 | ||
| 20 | / { | |
| 21 | model = "Eukrea CPUIMX35"; | |
| 22 | compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; | |
| 23 | ||
| 24 | gpio_keys { | |
| 25 | compatible = "gpio-keys"; | |
| 26 | pinctrl-names = "default"; | |
| 27 | pinctrl-0 = <&pinctrl_bp1>; | |
| 28 | ||
| 29 | bp1 { | |
| 30 | label = "BP1"; | |
| 31 | gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; | |
| 32 | linux,code = <BTN_MISC>; | |
| 33 | gpio-key,wakeup; | |
| 34 | linux,input-type = <1>; | |
| 35 | }; | |
| 36 | }; | |
| 37 | ||
| 38 | leds { | |
| 39 | compatible = "gpio-leds"; | |
| 40 | pinctrl-names = "default"; | |
| 41 | pinctrl-0 = <&pinctrl_led1>; | |
| 42 | ||
| 43 | led1 { | |
| 44 | label = "led1"; | |
| 45 | gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; | |
| 46 | linux,default-trigger = "heartbeat"; | |
| 47 | }; | |
| 48 | }; | |
| 499c8bf5 DC |
49 | |
| 50 | sound { | |
| 51 | compatible = "eukrea,asoc-tlv320"; | |
| 52 | eukrea,model = "imx35-eukrea-tlv320aic23"; | |
| 53 | ssi-controller = <&ssi1>; | |
| 54 | fsl,mux-int-port = <1>; | |
| 55 | fsl,mux-ext-port = <4>; | |
| 56 | }; | |
| 153f1d84 DC |
57 | }; |
| 58 | ||
| 59 | &audmux { | |
| 60 | pinctrl-names = "default"; | |
| 61 | pinctrl-0 = <&pinctrl_audmux>; | |
| 62 | status = "okay"; | |
| 63 | }; | |
| 64 | ||
| 65 | &esdhc1 { | |
| 66 | pinctrl-names = "default"; | |
| 67 | pinctrl-0 = <&pinctrl_esdhc1>; | |
| 68 | cd-gpios = <&gpio3 24>; | |
| 69 | status = "okay"; | |
| 70 | }; | |
| 71 | ||
| 72 | &i2c1 { | |
| 73 | tlv320aic23: codec@1a { | |
| 74 | compatible = "ti,tlv320aic23"; | |
| 75 | reg = <0x1a>; | |
| 76 | }; | |
| 77 | }; | |
| 78 | ||
| 79 | &iomuxc { | |
| 80 | imx35-eukrea { | |
| 81 | pinctrl_audmux: audmuxgrp { | |
| 82 | fsl,pins = < | |
| 83 | MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 | |
| 84 | MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 | |
| 85 | MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 | |
| 86 | MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 | |
| 87 | >; | |
| 88 | }; | |
| 89 | ||
| 90 | pinctrl_bp1: bp1grp { | |
| 91 | fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>; | |
| 92 | }; | |
| 93 | ||
| 94 | pinctrl_esdhc1: esdhc1grp { | |
| 95 | fsl,pins = < | |
| 96 | MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 | |
| 97 | MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 | |
| 98 | MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 | |
| 99 | MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 | |
| 100 | MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 | |
| 101 | MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 | |
| 102 | MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */ | |
| 103 | >; | |
| 104 | }; | |
| 105 | ||
| 106 | pinctrl_led1: led1grp { | |
| 107 | fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>; | |
| 108 | }; | |
| 109 | ||
| 110 | pinctrl_reg_lcd_3v3: reg-lcd-3v3 { | |
| 111 | fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>; | |
| 112 | }; | |
| 113 | ||
| 114 | pinctrl_uart1: uart1grp { | |
| 115 | fsl,pins = < | |
| 116 | MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 | |
| 117 | MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 | |
| 118 | MX35_PAD_CTS1__UART1_CTS 0x1c5 | |
| 119 | MX35_PAD_RTS1__UART1_RTS 0x1c5 | |
| 120 | >; | |
| 121 | }; | |
| 122 | ||
| 123 | pinctrl_uart2: uart2grp { | |
| 124 | fsl,pins = < | |
| 125 | MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 | |
| 126 | MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 | |
| 127 | MX35_PAD_RTS2__UART2_RTS 0x1c5 | |
| 128 | MX35_PAD_CTS2__UART2_CTS 0x1c5 | |
| 129 | >; | |
| 130 | }; | |
| 131 | }; | |
| 132 | }; | |
| 133 | ||
| 134 | &ssi1 { | |
| 499c8bf5 | 135 | codec-handle = <&tlv320aic23>; |
| 153f1d84 DC |
136 | status = "okay"; |
| 137 | }; | |
| 138 | ||
| 139 | &uart1 { | |
| 140 | pinctrl-names = "default"; | |
| 141 | pinctrl-0 = <&pinctrl_uart1>; | |
| 142 | fsl,uart-has-rtscts; | |
| 143 | status = "okay"; | |
| 144 | }; | |
| 145 | ||
| 146 | &uart2 { | |
| 147 | pinctrl-names = "default"; | |
| 148 | pinctrl-0 = <&pinctrl_uart2>; | |
| 149 | fsl,uart-has-rtscts; | |
| 150 | status = "okay"; | |
| 151 | }; | |
| 9afe7d9d DC |
152 | |
| 153 | &usbhost1 { | |
| 154 | phy_type = "serial"; | |
| 155 | dr_mode = "host"; | |
| 156 | status = "okay"; | |
| 157 | }; | |
| 158 | ||
| 159 | &usbotg { | |
| 160 | phy_type = "utmi"; | |
| 161 | dr_mode = "otg"; | |
| 162 | external-vbus-divider; | |
| 163 | status = "okay"; | |
| 164 | }; |