[linux-2.6-block.git] / arch / arm / boot / dts / imx28.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		saif0 = &saif0;
		saif1 = &saif1;
		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc@80002000 {
				reg = <0x80002000 0x2000>;
				interrupts = <13 87>;
				status = "disabled";
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx28-dma-apbh";
				reg = <0x80004000 0x2000>;
			};

			perfmon@80006000 {
				reg = <0x80006000 0x800>;
				interrupts = <27>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <88>, <41>;
				interrupt-names = "gpmi-dma", "bch";
				fsl,gpmi-dma-channel = <4>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <96 82>;
				fsl,ssp-dma-channel = <0>;
				status = "disabled";
			};

			ssp1: ssp@80012000 {
				reg = <0x80012000 0x2000>;
				interrupts = <97 83>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			ssp2: ssp@80014000 {
				reg = <0x80014000 0x2000>;
				interrupts = <98 84>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			ssp3: ssp@80016000 {
				reg = <0x80016000 0x2000>;
				interrupts = <99 85>;
				fsl,ssp-dma-channel = <3>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3102 /* MX28_PAD_PWM0__DUART_RX */
						0x3112 /* MX28_PAD_PWM1__DUART_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				duart_pins_b: duart@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				duart_4pins_a: duart-4pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
						0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
						0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
						0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
						0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
						0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
						0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
						0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
						0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
						0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
						0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
						0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
						0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
						0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_status_cfg: gpmi-status-cfg {
					fsl,pinmux-ids = <
						0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
						0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
						0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
					>;
					fsl,drive-strength = <2>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
						0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
						0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
						0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart1_pins_a: auart1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
						0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
						0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
						0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart2_2pins_a: auart2-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
						0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart3_pins_a: auart3@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
						0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
						0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
						0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart3_2pins_a: auart3-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
						0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				mac0_pins_a: mac0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
						0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
						0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
						0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
						0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
						0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
						0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
						0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
						0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
						0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
						0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
						0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
						0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
						0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
						0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
						0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
						0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
						0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
						0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
						0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
						0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_cd_cfg: mmc0-cd-cfg {
					fsl,pinmux-ids = <
						0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
					>;
					fsl,pull-up = <0>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg {
					fsl,pinmux-ids = <
						0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
					>;
					fsl,drive-strength = <2>;
					fsl,pull-up = <0>;
				};

				i2c0_pins_a: i2c0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
						0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif0_pins_a: saif0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
						0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
						0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
						0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif1_pins_a: saif1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
					>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				pwm0_pins_a: pwm0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3100 /* MX28_PAD_PWM0__PWM_0 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x3120 /* MX28_PAD_PWM2__PWM_2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
						0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
						0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
						0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
						0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
						0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
						0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
						0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
						0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				can0_pins_a: can0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
						0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				can1_pins_a: can1@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
						0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
			};

			digctl@8001c000 {
				reg = <0x8001c000 0x2000>;
				interrupts = <89>;
				status = "disabled";
			};

			etm@80022000 {
				reg = <0x80022000 0x2000>;
				status = "disabled";
			};

			dma-apbx@80024000 {
				compatible = "fsl,imx28-dma-apbx";
				reg = <0x80024000 0x2000>;
			};

			dcp@80028000 {
				reg = <0x80028000 0x2000>;
				interrupts = <52 53 54>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				interrupts = <39>;
				status = "disabled";
			};

			ocotp@8002c000 {
				reg = <0x8002c000 0x2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx28-lcdif";
				reg = <0x80030000 0x2000>;
				interrupts = <38 86>;
				status = "disabled";
			};

			can0: can@80032000 {
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
				reg = <0x80032000 0x2000>;
				interrupts = <8>;
				status = "disabled";
			};

			can1: can@80034000 {
				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
				reg = <0x80034000 0x2000>;
				interrupts = <9>;
				status = "disabled";
			};

			simdbg@8003c000 {
				reg = <0x8003c000 0x200>;
				status = "disabled";
			};

			simgpmisel@8003c200 {
				reg = <0x8003c200 0x100>;
				status = "disabled";
			};

			simsspsel@8003c300 {
				reg = <0x8003c300 0x100>;
				status = "disabled";
			};

			simmemsel@8003c400 {
				reg = <0x8003c400 0x100>;
				status = "disabled";
			};

			gpiomon@8003c500 {
				reg = <0x8003c500 0x100>;
				status = "disabled";
			};

			simenet@8003c700 {
				reg = <0x8003c700 0x100>;
				status = "disabled";
			};

			armjtag@8003c800 {
				reg = <0x8003c800 0x100>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clkctl@80040000 {
				reg = <0x80040000 0x2000>;
				status = "disabled";
			};

			saif0: saif@80042000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80042000 0x2000>;
				interrupts = <59 80>;
				fsl,saif-dma-channel = <4>;
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80046000 0x2000>;
				interrupts = <58 81>;
				fsl,saif-dma-channel = <5>;
				status = "disabled";
			};

			lradc@80050000 {
				compatible = "fsl,imx28-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <10 14 15 16 17 18 19
						20 21 22 23 24 25>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 0x2000>;
				interrupts = <45 66>;
				status = "disabled";
			};

			rtc@80056000 {
				compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x80056000 0x2000>;
				interrupts = <29>;
			};

			i2c0: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x80058000 0x2000>;
				interrupts = <111 68>;
				clock-frequency = <100000>;
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x8005a000 0x2000>;
				interrupts = <110 69>;
				clock-frequency = <100000>;
				status = "disabled";
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				#pwm-cells = <2>;
				fsl,pwm-number = <8>;
				status = "disabled";
			};

			timrot@80068000 {
				reg = <0x80068000 0x2000>;
				status = "disabled";
			};

			auart0: serial@8006a000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006a000 0x2000>;
				interrupts = <112 70 71>;
				status = "disabled";
			};

			auart1: serial@8006c000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <113 72 73>;
				status = "disabled";
			};

			auart2: serial@8006e000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <114 74 75>;
				status = "disabled";
			};

			auart3: serial@80070000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80070000 0x2000>;
				interrupts = <115 76 77>;
				status = "disabled";
			};

			auart4: serial@80072000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80072000 0x2000>;
				interrupts = <116 78 79>;
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
				compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
				reg = <0x8007e000 0x2000>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x10000>;
			interrupts = <93>;
			fsl,usbphy = <&usbphy0>;
			status = "disabled";
		};

		usb1: usb@80090000 {
			compatible = "fsl,imx28-usb", "fsl,imx27-usb";
			reg = <0x80090000 0x10000>;
			interrupts = <92>;
			fsl,usbphy = <&usbphy1>;
			status = "disabled";
		};

		dflpt@800c0000 {
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
			status = "disabled";
		};

		switch@800f8000 {
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};

	};
};
Commit	Line	Data
bc3a59c1 DA	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	interrupt-parent = <&icoll>;
	16
ce4c6f9b SG	17	aliases {
	18	gpio0 = &gpio0;
	19	gpio1 = &gpio1;
	20	gpio2 = &gpio2;
	21	gpio3 = &gpio3;
	22	gpio4 = &gpio4;
530f1d41 SG	23	saif0 = &saif0;
530f1d41 SG	24	saif1 = &saif1;
80d969e4 FE	25	serial0 = &auart0;
	26	serial1 = &auart1;
	27	serial2 = &auart2;
	28	serial3 = &auart3;
	29	serial4 = &auart4;
ce4c6f9b SG	30	};
ce4c6f9b SG	31
bc3a59c1 DA	32	cpus {
	33	cpu@0 {
	34	compatible = "arm,arm926ejs";
	35	};
	36	};
	37
	38	apb@80000000 {
	39	compatible = "simple-bus";
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	reg = <0x80000000 0x80000>;
	43	ranges;
	44
	45	apbh@80000000 {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	reg = <0x80000000 0x3c900>;
	50	ranges;
	51
	52	icoll: interrupt-controller@80000000 {
	53	compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
	54	interrupt-controller;
	55	#interrupt-cells = <1>;
	56	reg = <0x80000000 0x2000>;
	57	};
	58
	59	hsadc@80002000 {
0f06cde7	60	reg = <0x80002000 0x2000>;
bc3a59c1 DA	61	interrupts = <13 87>;
	62	status = "disabled";
	63	};
	64
	65	dma-apbh@80004000 {
84f3570a	66	compatible = "fsl,imx28-dma-apbh";
0f06cde7	67	reg = <0x80004000 0x2000>;
bc3a59c1 DA	68	};
	69
	70	perfmon@80006000 {
0f06cde7	71	reg = <0x80006000 0x800>;
bc3a59c1 DA	72	interrupts = <27>;
	73	status = "disabled";
	74	};
	75
7a8e5149 HS	76	gpmi-nand@8000c000 {
	77	compatible = "fsl,imx28-gpmi-nand";
	78	#address-cells = <1>;
	79	#size-cells = <1>;
0f06cde7	80	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
7a8e5149 HS	81	reg-names = "gpmi-nand", "bch";
	82	interrupts = <88>, <41>;
	83	interrupt-names = "gpmi-dma", "bch";
	84	fsl,gpmi-dma-channel = <4>;
bc3a59c1 DA	85	status = "disabled";
	86	};
	87
	88	ssp0: ssp@80010000 {
0f06cde7	89	reg = <0x80010000 0x2000>;
bc3a59c1	90	interrupts = <96 82>;
35d23047	91	fsl,ssp-dma-channel = <0>;
bc3a59c1 DA	92	status = "disabled";
	93	};
	94
	95	ssp1: ssp@80012000 {
0f06cde7	96	reg = <0x80012000 0x2000>;
bc3a59c1	97	interrupts = <97 83>;
35d23047	98	fsl,ssp-dma-channel = <1>;
bc3a59c1 DA	99	status = "disabled";
	100	};
	101
	102	ssp2: ssp@80014000 {
0f06cde7	103	reg = <0x80014000 0x2000>;
bc3a59c1	104	interrupts = <98 84>;
35d23047	105	fsl,ssp-dma-channel = <2>;
bc3a59c1 DA	106	status = "disabled";
	107	};
	108
	109	ssp3: ssp@80016000 {
0f06cde7	110	reg = <0x80016000 0x2000>;
bc3a59c1	111	interrupts = <99 85>;
35d23047	112	fsl,ssp-dma-channel = <3>;
bc3a59c1 DA	113	status = "disabled";
	114	};
	115
	116	pinctrl@80018000 {
	117	#address-cells = <1>;
	118	#size-cells = <0>;
ce4c6f9b	119	compatible = "fsl,imx28-pinctrl", "simple-bus";
0f06cde7	120	reg = <0x80018000 0x2000>;
bc3a59c1	121
ce4c6f9b SG	122	gpio0: gpio@0 {
	123	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	124	interrupts = <127>;
	125	gpio-controller;
	126	#gpio-cells = <2>;
	127	interrupt-controller;
	128	#interrupt-cells = <2>;
	129	};
	130
	131	gpio1: gpio@1 {
	132	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	133	interrupts = <126>;
	134	gpio-controller;
	135	#gpio-cells = <2>;
	136	interrupt-controller;
	137	#interrupt-cells = <2>;
	138	};
	139
	140	gpio2: gpio@2 {
	141	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	142	interrupts = <125>;
	143	gpio-controller;
	144	#gpio-cells = <2>;
	145	interrupt-controller;
	146	#interrupt-cells = <2>;
	147	};
	148
	149	gpio3: gpio@3 {
	150	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	151	interrupts = <124>;
	152	gpio-controller;
	153	#gpio-cells = <2>;
	154	interrupt-controller;
	155	#interrupt-cells = <2>;
	156	};
	157
	158	gpio4: gpio@4 {
	159	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	160	interrupts = <123>;
	161	gpio-controller;
	162	#gpio-cells = <2>;
	163	interrupt-controller;
	164	#interrupt-cells = <2>;
	165	};
	166
bc3a59c1 DA	167	duart_pins_a: duart@0 {
bc3a59c1 DA	168	reg = <0>;
f14da767 SG	169	fsl,pinmux-ids = <
	170	0x3102 /* MX28_PAD_PWM0__DUART_RX */
	171	0x3112 /* MX28_PAD_PWM1__DUART_TX */
	172	>;
bc3a59c1 DA	173	fsl,drive-strength = <0>;
	174	fsl,voltage = <1>;
	175	fsl,pull-up = <0>;
	176	};
	177
8385e7c1 MR	178	duart_pins_b: duart@1 {
8385e7c1 MR	179	reg = <1>;
f14da767 SG	180	fsl,pinmux-ids = <
	181	0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
	182	0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
	183	>;
8385e7c1 MR	184	fsl,drive-strength = <0>;
	185	fsl,voltage = <1>;
	186	fsl,pull-up = <0>;
	187	};
	188
e1a4d18f SG	189	duart_4pins_a: duart-4pins@0 {
	190	reg = <0>;
	191	fsl,pinmux-ids = <
	192	0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
	193	0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
	194	0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
	195	0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
	196	>;
	197	fsl,drive-strength = <0>;
	198	fsl,voltage = <1>;
	199	fsl,pull-up = <0>;
	200	};
	201
7a8e5149 HS	202	gpmi_pins_a: gpmi-nand@0 {
7a8e5149 HS	203	reg = <0>;
f14da767 SG	204	fsl,pinmux-ids = <
	205	0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
	206	0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
	207	0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
	208	0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
	209	0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
	210	0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
	211	0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
	212	0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
	213	0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
f14da767	214	0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
f14da767 SG	215	0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
	216	0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
	217	0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
	218	0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
	219	0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
	220	>;
7a8e5149 HS	221	fsl,drive-strength = <0>;
	222	fsl,voltage = <1>;
	223	fsl,pull-up = <0>;
	224	};
	225
	226	gpmi_status_cfg: gpmi-status-cfg {
f14da767 SG	227	fsl,pinmux-ids = <
	228	0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
	229	0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
	230	0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
	231	>;
7a8e5149 HS	232	fsl,drive-strength = <2>;
	233	};
	234
80d969e4 FE	235	auart0_pins_a: auart0@0 {
80d969e4 FE	236	reg = <0>;
f14da767 SG	237	fsl,pinmux-ids = <
	238	0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
	239	0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
	240	0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
	241	0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
	242	>;
80d969e4	243	fsl,drive-strength = <0>;
8fa62e11 MV	244	fsl,voltage = <1>;
	245	fsl,pull-up = <0>;
	246	};
	247
	248	auart0_2pins_a: auart0-2pins@0 {
	249	reg = <0>;
	250	fsl,pinmux-ids = <
	251	0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
	252	0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
	253	>;
	254	fsl,drive-strength = <0>;
80d969e4 FE	255	fsl,voltage = <1>;
	256	fsl,pull-up = <0>;
	257	};
	258
e1a4d18f SG	259	auart1_pins_a: auart1@0 {
	260	reg = <0>;
	261	fsl,pinmux-ids = <
	262	0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
	263	0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
	264	0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
	265	0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
	266	>;
	267	fsl,drive-strength = <0>;
	268	fsl,voltage = <1>;
	269	fsl,pull-up = <0>;
	270	};
	271
3143bbb4 SG	272	auart1_2pins_a: auart1-2pins@0 {
	273	reg = <0>;
	274	fsl,pinmux-ids = <
	275	0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
	276	0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
	277	>;
	278	fsl,drive-strength = <0>;
	279	fsl,voltage = <1>;
	280	fsl,pull-up = <0>;
	281	};
	282
	283	auart2_2pins_a: auart2-2pins@0 {
	284	reg = <0>;
	285	fsl,pinmux-ids = <
	286	0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
	287	0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
	288	>;
	289	fsl,drive-strength = <0>;
	290	fsl,voltage = <1>;
	291	fsl,pull-up = <0>;
	292	};
	293
80d969e4 FE	294	auart3_pins_a: auart3@0 {
80d969e4 FE	295	reg = <0>;
f14da767 SG	296	fsl,pinmux-ids = <
	297	0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
	298	0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
	299	0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
	300	0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
	301	>;
80d969e4 FE	302	fsl,drive-strength = <0>;
	303	fsl,voltage = <1>;
	304	fsl,pull-up = <0>;
	305	};
	306
3143bbb4 SG	307	auart3_2pins_a: auart3-2pins@0 {
	308	reg = <0>;
	309	fsl,pinmux-ids = <
	310	0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
	311	0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
	312	>;
	313	fsl,drive-strength = <0>;
	314	fsl,voltage = <1>;
	315	fsl,pull-up = <0>;
	316	};
	317
bc3a59c1 DA	318	mac0_pins_a: mac0@0 {
bc3a59c1 DA	319	reg = <0>;
f14da767 SG	320	fsl,pinmux-ids = <
	321	0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
	322	0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
	323	0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
	324	0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
	325	0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
	326	0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
	327	0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
	328	0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
	329	0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
	330	>;
bc3a59c1 DA	331	fsl,drive-strength = <1>;
	332	fsl,voltage = <1>;
	333	fsl,pull-up = <1>;
	334	};
	335
	336	mac1_pins_a: mac1@0 {
	337	reg = <0>;
f14da767 SG	338	fsl,pinmux-ids = <
	339	0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
	340	0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
	341	0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
	342	0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
	343	0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
	344	0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
	345	>;
bc3a59c1 DA	346	fsl,drive-strength = <1>;
	347	fsl,voltage = <1>;
	348	fsl,pull-up = <1>;
	349	};
35d23047 SG	350
	351	mmc0_8bit_pins_a: mmc0-8bit@0 {
	352	reg = <0>;
f14da767 SG	353	fsl,pinmux-ids = <
	354	0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
	355	0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
	356	0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
	357	0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
	358	0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
	359	0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
	360	0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
	361	0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
	362	0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
	363	0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
	364	0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
	365	>;
35d23047 SG	366	fsl,drive-strength = <1>;
	367	fsl,voltage = <1>;
	368	fsl,pull-up = <1>;
	369	};
	370
8385e7c1 MR	371	mmc0_4bit_pins_a: mmc0-4bit@0 {
8385e7c1 MR	372	reg = <0>;
f14da767 SG	373	fsl,pinmux-ids = <
	374	0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
	375	0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
	376	0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
	377	0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
	378	0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
	379	0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
	380	0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
	381	>;
8385e7c1 MR	382	fsl,drive-strength = <1>;
	383	fsl,voltage = <1>;
	384	fsl,pull-up = <1>;
	385	};
	386
35d23047	387	mmc0_cd_cfg: mmc0-cd-cfg {
f14da767 SG	388	fsl,pinmux-ids = <
	389	0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
	390	>;
35d23047 SG	391	fsl,pull-up = <0>;
	392	};
	393
	394	mmc0_sck_cfg: mmc0-sck-cfg {
f14da767 SG	395	fsl,pinmux-ids = <
	396	0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
	397	>;
35d23047 SG	398	fsl,drive-strength = <2>;
	399	fsl,pull-up = <0>;
	400	};
2a96e391 SG	401
	402	i2c0_pins_a: i2c0@0 {
	403	reg = <0>;
f14da767 SG	404	fsl,pinmux-ids = <
	405	0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
	406	0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
	407	>;
2a96e391 SG	408	fsl,drive-strength = <1>;
	409	fsl,voltage = <1>;
	410	fsl,pull-up = <1>;
	411	};
530f1d41 SG	412
	413	saif0_pins_a: saif0@0 {
	414	reg = <0>;
f14da767 SG	415	fsl,pinmux-ids = <
	416	0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
	417	0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
	418	0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
	419	0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
	420	>;
530f1d41 SG	421	fsl,drive-strength = <2>;
	422	fsl,voltage = <1>;
	423	fsl,pull-up = <1>;
	424	};
	425
	426	saif1_pins_a: saif1@0 {
	427	reg = <0>;
f14da767 SG	428	fsl,pinmux-ids = <
	429	0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
	430	>;
530f1d41 SG	431	fsl,drive-strength = <2>;
	432	fsl,voltage = <1>;
	433	fsl,pull-up = <1>;
	434	};
52f7176b	435
e1a4d18f SG	436	pwm0_pins_a: pwm0@0 {
	437	reg = <0>;
	438	fsl,pinmux-ids = <
	439	0x3100 /* MX28_PAD_PWM0__PWM_0 */
	440	>;
	441	fsl,drive-strength = <0>;
	442	fsl,voltage = <1>;
	443	fsl,pull-up = <0>;
	444	};
	445
52f7176b SG	446	pwm2_pins_a: pwm2@0 {
	447	reg = <0>;
	448	fsl,pinmux-ids = <
	449	0x3120 /* MX28_PAD_PWM2__PWM_2 */
	450	>;
	451	fsl,drive-strength = <0>;
	452	fsl,voltage = <1>;
	453	fsl,pull-up = <0>;
	454	};
a915ee42 SG	455
	456	lcdif_24bit_pins_a: lcdif-24bit@0 {
	457	reg = <0>;
	458	fsl,pinmux-ids = <
	459	0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
	460	0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
	461	0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
	462	0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
	463	0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
	464	0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
	465	0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
	466	0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
	467	0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
	468	0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
	469	0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
	470	0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
	471	0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
	472	0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
	473	0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
	474	0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
	475	0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
	476	0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
	477	0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
	478	0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
	479	0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
	480	0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
	481	0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
	482	0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
a915ee42 SG	483	>;
	484	fsl,drive-strength = <0>;
	485	fsl,voltage = <1>;
	486	fsl,pull-up = <0>;
	487	};
6ca44acf SG	488
	489	can0_pins_a: can0@0 {
	490	reg = <0>;
	491	fsl,pinmux-ids = <
	492	0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
	493	0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
	494	>;
	495	fsl,drive-strength = <0>;
	496	fsl,voltage = <1>;
	497	fsl,pull-up = <0>;
	498	};
	499
	500	can1_pins_a: can1@0 {
	501	reg = <0>;
	502	fsl,pinmux-ids = <
	503	0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
	504	0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
	505	>;
	506	fsl,drive-strength = <0>;
	507	fsl,voltage = <1>;
	508	fsl,pull-up = <0>;
	509	};
bc3a59c1 DA	510	};
	511
	512	digctl@8001c000 {
0f06cde7	513	reg = <0x8001c000 0x2000>;
bc3a59c1 DA	514	interrupts = <89>;
	515	status = "disabled";
	516	};
	517
	518	etm@80022000 {
0f06cde7	519	reg = <0x80022000 0x2000>;
bc3a59c1 DA	520	status = "disabled";
	521	};
	522
	523	dma-apbx@80024000 {
84f3570a	524	compatible = "fsl,imx28-dma-apbx";
0f06cde7	525	reg = <0x80024000 0x2000>;
bc3a59c1 DA	526	};
	527
	528	dcp@80028000 {
0f06cde7	529	reg = <0x80028000 0x2000>;
bc3a59c1 DA	530	interrupts = <52 53 54>;
	531	status = "disabled";
	532	};
	533
	534	pxp@8002a000 {
0f06cde7	535	reg = <0x8002a000 0x2000>;
bc3a59c1 DA	536	interrupts = <39>;
	537	status = "disabled";
	538	};
	539
	540	ocotp@8002c000 {
0f06cde7	541	reg = <0x8002c000 0x2000>;
bc3a59c1 DA	542	status = "disabled";
	543	};
	544
	545	axi-ahb@8002e000 {
0f06cde7	546	reg = <0x8002e000 0x2000>;
bc3a59c1 DA	547	status = "disabled";
	548	};
	549
	550	lcdif@80030000 {
a915ee42	551	compatible = "fsl,imx28-lcdif";
0f06cde7	552	reg = <0x80030000 0x2000>;
bc3a59c1 DA	553	interrupts = <38 86>;
	554	status = "disabled";
	555	};
	556
	557	can0: can@80032000 {
6ca44acf	558	compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
0f06cde7	559	reg = <0x80032000 0x2000>;
bc3a59c1 DA	560	interrupts = <8>;
	561	status = "disabled";
	562	};
	563
	564	can1: can@80034000 {
6ca44acf	565	compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
0f06cde7	566	reg = <0x80034000 0x2000>;
bc3a59c1 DA	567	interrupts = <9>;
	568	status = "disabled";
	569	};
	570
	571	simdbg@8003c000 {
0f06cde7	572	reg = <0x8003c000 0x200>;
bc3a59c1 DA	573	status = "disabled";
	574	};
	575
	576	simgpmisel@8003c200 {
0f06cde7	577	reg = <0x8003c200 0x100>;
bc3a59c1 DA	578	status = "disabled";
	579	};
	580
	581	simsspsel@8003c300 {
0f06cde7	582	reg = <0x8003c300 0x100>;
bc3a59c1 DA	583	status = "disabled";
	584	};
	585
	586	simmemsel@8003c400 {
0f06cde7	587	reg = <0x8003c400 0x100>;
bc3a59c1 DA	588	status = "disabled";
	589	};
	590
	591	gpiomon@8003c500 {
0f06cde7	592	reg = <0x8003c500 0x100>;
bc3a59c1 DA	593	status = "disabled";
	594	};
	595
	596	simenet@8003c700 {
0f06cde7	597	reg = <0x8003c700 0x100>;
bc3a59c1 DA	598	status = "disabled";
	599	};
	600
	601	armjtag@8003c800 {
0f06cde7	602	reg = <0x8003c800 0x100>;
bc3a59c1 DA	603	status = "disabled";
	604	};
	605	};
	606
	607	apbx@80040000 {
	608	compatible = "simple-bus";
	609	#address-cells = <1>;
	610	#size-cells = <1>;
	611	reg = <0x80040000 0x40000>;
	612	ranges;
	613
	614	clkctl@80040000 {
0f06cde7	615	reg = <0x80040000 0x2000>;
bc3a59c1 DA	616	status = "disabled";
	617	};
	618
	619	saif0: saif@80042000 {
530f1d41	620	compatible = "fsl,imx28-saif";
0f06cde7	621	reg = <0x80042000 0x2000>;
bc3a59c1	622	interrupts = <59 80>;
530f1d41	623	fsl,saif-dma-channel = <4>;
bc3a59c1 DA	624	status = "disabled";
	625	};
	626
	627	power@80044000 {
0f06cde7	628	reg = <0x80044000 0x2000>;
bc3a59c1 DA	629	status = "disabled";
	630	};
	631
	632	saif1: saif@80046000 {
530f1d41	633	compatible = "fsl,imx28-saif";
0f06cde7	634	reg = <0x80046000 0x2000>;
bc3a59c1	635	interrupts = <58 81>;
530f1d41	636	fsl,saif-dma-channel = <5>;
bc3a59c1 DA	637	status = "disabled";
	638	};
	639
	640	lradc@80050000 {
aef35104	641	compatible = "fsl,imx28-lradc";
0f06cde7	642	reg = <0x80050000 0x2000>;
aef35104 MV	643	interrupts = <10 14 15 16 17 18 19
aef35104 MV	644	20 21 22 23 24 25>;
bc3a59c1 DA	645	status = "disabled";
	646	};
	647
	648	spdif@80054000 {
0f06cde7	649	reg = <0x80054000 0x2000>;
bc3a59c1 DA	650	interrupts = <45 66>;
	651	status = "disabled";
	652	};
	653
	654	rtc@80056000 {
f98c990c	655	compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
0f06cde7	656	reg = <0x80056000 0x2000>;
f98c990c	657	interrupts = <29>;
bc3a59c1 DA	658	};
	659
	660	i2c0: i2c@80058000 {
2a96e391 SG	661	#address-cells = <1>;
	662	#size-cells = <0>;
	663	compatible = "fsl,imx28-i2c";
0f06cde7	664	reg = <0x80058000 0x2000>;
bc3a59c1	665	interrupts = <111 68>;
cd4f2d4a	666	clock-frequency = <100000>;
bc3a59c1 DA	667	status = "disabled";
	668	};
	669
	670	i2c1: i2c@8005a000 {
2a96e391 SG	671	#address-cells = <1>;
	672	#size-cells = <0>;
	673	compatible = "fsl,imx28-i2c";
0f06cde7	674	reg = <0x8005a000 0x2000>;
bc3a59c1	675	interrupts = <110 69>;
cd4f2d4a	676	clock-frequency = <100000>;
bc3a59c1 DA	677	status = "disabled";
	678	};
	679
52f7176b SG	680	pwm: pwm@80064000 {
52f7176b SG	681	compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
0f06cde7	682	reg = <0x80064000 0x2000>;
52f7176b SG	683	#pwm-cells = <2>;
52f7176b SG	684	fsl,pwm-number = <8>;
bc3a59c1 DA	685	status = "disabled";
	686	};
	687
	688	timrot@80068000 {
0f06cde7	689	reg = <0x80068000 0x2000>;
bc3a59c1 DA	690	status = "disabled";
	691	};
	692
	693	auart0: serial@8006a000 {
80d969e4	694	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	695	reg = <0x8006a000 0x2000>;
	696	interrupts = <112 70 71>;
	697	status = "disabled";
	698	};
	699
	700	auart1: serial@8006c000 {
80d969e4	701	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	702	reg = <0x8006c000 0x2000>;
	703	interrupts = <113 72 73>;
	704	status = "disabled";
	705	};
	706
	707	auart2: serial@8006e000 {
80d969e4	708	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	709	reg = <0x8006e000 0x2000>;
	710	interrupts = <114 74 75>;
	711	status = "disabled";
	712	};
	713
	714	auart3: serial@80070000 {
80d969e4	715	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	716	reg = <0x80070000 0x2000>;
	717	interrupts = <115 76 77>;
	718	status = "disabled";
	719	};
	720
	721	auart4: serial@80072000 {
80d969e4	722	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	723	reg = <0x80072000 0x2000>;
	724	interrupts = <116 78 79>;
	725	status = "disabled";
	726	};
	727
	728	duart: serial@80074000 {
	729	compatible = "arm,pl011", "arm,primecell";
	730	reg = <0x80074000 0x1000>;
	731	interrupts = <47>;
	732	status = "disabled";
	733	};
	734
	735	usbphy0: usbphy@8007c000 {
5da01270	736	compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
bc3a59c1 DA	737	reg = <0x8007c000 0x2000>;
	738	status = "disabled";
	739	};
	740
	741	usbphy1: usbphy@8007e000 {
5da01270	742	compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
bc3a59c1 DA	743	reg = <0x8007e000 0x2000>;
	744	status = "disabled";
	745	};
	746	};
	747	};
	748
	749	ahb@80080000 {
	750	compatible = "simple-bus";
	751	#address-cells = <1>;
	752	#size-cells = <1>;
	753	reg = <0x80080000 0x80000>;
	754	ranges;
	755
5da01270 RZ	756	usb0: usb@80080000 {
5da01270 RZ	757	compatible = "fsl,imx28-usb", "fsl,imx27-usb";
bc3a59c1	758	reg = <0x80080000 0x10000>;
5da01270 RZ	759	interrupts = <93>;
5da01270 RZ	760	fsl,usbphy = <&usbphy0>;
bc3a59c1 DA	761	status = "disabled";
	762	};
	763
5da01270 RZ	764	usb1: usb@80090000 {
5da01270 RZ	765	compatible = "fsl,imx28-usb", "fsl,imx27-usb";
bc3a59c1	766	reg = <0x80090000 0x10000>;
5da01270 RZ	767	interrupts = <92>;
5da01270 RZ	768	fsl,usbphy = <&usbphy1>;
bc3a59c1 DA	769	status = "disabled";
	770	};
	771
	772	dflpt@800c0000 {
	773	reg = <0x800c0000 0x10000>;
	774	status = "disabled";
	775	};
	776
	777	mac0: ethernet@800f0000 {
	778	compatible = "fsl,imx28-fec";
	779	reg = <0x800f0000 0x4000>;
	780	interrupts = <101>;
	781	status = "disabled";
	782	};
	783
	784	mac1: ethernet@800f4000 {
	785	compatible = "fsl,imx28-fec";
	786	reg = <0x800f4000 0x4000>;
	787	interrupts = <102>;
	788	status = "disabled";
	789	};
	790
	791	switch@800f8000 {
	792	reg = <0x800f8000 0x8000>;
	793	status = "disabled";
	794	};
	795
	796	};
	797	};