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2954ff39 SG |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | interrupt-parent = <&icoll>; | |
16 | ||
ce4c6f9b SG |
17 | aliases { |
18 | gpio0 = &gpio0; | |
19 | gpio1 = &gpio1; | |
20 | gpio2 = &gpio2; | |
a4508394 SG |
21 | serial0 = &auart0; |
22 | serial1 = &auart1; | |
ce4c6f9b SG |
23 | }; |
24 | ||
2954ff39 SG |
25 | cpus { |
26 | cpu@0 { | |
27 | compatible = "arm,arm926ejs"; | |
28 | }; | |
29 | }; | |
30 | ||
31 | apb@80000000 { | |
32 | compatible = "simple-bus"; | |
33 | #address-cells = <1>; | |
34 | #size-cells = <1>; | |
35 | reg = <0x80000000 0x80000>; | |
36 | ranges; | |
37 | ||
38 | apbh@80000000 { | |
39 | compatible = "simple-bus"; | |
40 | #address-cells = <1>; | |
41 | #size-cells = <1>; | |
42 | reg = <0x80000000 0x40000>; | |
43 | ranges; | |
44 | ||
45 | icoll: interrupt-controller@80000000 { | |
46 | compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; | |
47 | interrupt-controller; | |
48 | #interrupt-cells = <1>; | |
49 | reg = <0x80000000 0x2000>; | |
50 | }; | |
51 | ||
52 | dma-apbh@80004000 { | |
84f3570a | 53 | compatible = "fsl,imx23-dma-apbh"; |
2954ff39 | 54 | reg = <0x80004000 2000>; |
2954ff39 SG |
55 | }; |
56 | ||
57 | ecc@80008000 { | |
58 | reg = <0x80008000 2000>; | |
59 | status = "disabled"; | |
60 | }; | |
61 | ||
62 | bch@8000a000 { | |
63 | reg = <0x8000a000 2000>; | |
64 | status = "disabled"; | |
65 | }; | |
66 | ||
a217c46c | 67 | gpmi-nand@8000c000 { |
2954ff39 SG |
68 | reg = <0x8000c000 2000>; |
69 | status = "disabled"; | |
70 | }; | |
71 | ||
72 | ssp0: ssp@80010000 { | |
73 | reg = <0x80010000 2000>; | |
be1ce308 SG |
74 | interrupts = <15 14>; |
75 | fsl,ssp-dma-channel = <1>; | |
2954ff39 SG |
76 | status = "disabled"; |
77 | }; | |
78 | ||
79 | etm@80014000 { | |
80 | reg = <0x80014000 2000>; | |
81 | status = "disabled"; | |
82 | }; | |
83 | ||
84 | pinctrl@80018000 { | |
85 | #address-cells = <1>; | |
86 | #size-cells = <0>; | |
ce4c6f9b | 87 | compatible = "fsl,imx23-pinctrl", "simple-bus"; |
2954ff39 SG |
88 | reg = <0x80018000 2000>; |
89 | ||
ce4c6f9b SG |
90 | gpio0: gpio@0 { |
91 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
92 | interrupts = <16>; | |
93 | gpio-controller; | |
94 | #gpio-cells = <2>; | |
95 | interrupt-controller; | |
96 | #interrupt-cells = <2>; | |
97 | }; | |
98 | ||
99 | gpio1: gpio@1 { | |
100 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
101 | interrupts = <17>; | |
102 | gpio-controller; | |
103 | #gpio-cells = <2>; | |
104 | interrupt-controller; | |
105 | #interrupt-cells = <2>; | |
106 | }; | |
107 | ||
108 | gpio2: gpio@2 { | |
109 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
110 | interrupts = <18>; | |
111 | gpio-controller; | |
112 | #gpio-cells = <2>; | |
113 | interrupt-controller; | |
114 | #interrupt-cells = <2>; | |
115 | }; | |
116 | ||
2954ff39 SG |
117 | duart_pins_a: duart@0 { |
118 | reg = <0>; | |
f14da767 SG |
119 | fsl,pinmux-ids = < |
120 | 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ | |
121 | 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ | |
122 | >; | |
2954ff39 SG |
123 | fsl,drive-strength = <0>; |
124 | fsl,voltage = <1>; | |
125 | fsl,pull-up = <0>; | |
126 | }; | |
be1ce308 | 127 | |
a4508394 SG |
128 | auart0_pins_a: auart0@0 { |
129 | reg = <0>; | |
130 | fsl,pinmux-ids = < | |
131 | 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ | |
132 | 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ | |
133 | 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ | |
134 | 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ | |
135 | >; | |
136 | fsl,drive-strength = <0>; | |
137 | fsl,voltage = <1>; | |
138 | fsl,pull-up = <0>; | |
139 | }; | |
140 | ||
72beabae SG |
141 | mmc0_4bit_pins_a: mmc0-4bit@0 { |
142 | reg = <0>; | |
143 | fsl,pinmux-ids = < | |
144 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
145 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
146 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
147 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
148 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
149 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
150 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
151 | >; | |
152 | fsl,drive-strength = <1>; | |
153 | fsl,voltage = <1>; | |
154 | fsl,pull-up = <1>; | |
155 | }; | |
156 | ||
be1ce308 SG |
157 | mmc0_8bit_pins_a: mmc0-8bit@0 { |
158 | reg = <0>; | |
f14da767 SG |
159 | fsl,pinmux-ids = < |
160 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
161 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
162 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
163 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
164 | 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ | |
165 | 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ | |
166 | 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ | |
167 | 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ | |
168 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
169 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
170 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
171 | >; | |
be1ce308 SG |
172 | fsl,drive-strength = <1>; |
173 | fsl,voltage = <1>; | |
174 | fsl,pull-up = <1>; | |
175 | }; | |
176 | ||
177 | mmc0_pins_fixup: mmc0-pins-fixup { | |
f14da767 SG |
178 | fsl,pinmux-ids = < |
179 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
180 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
181 | >; | |
be1ce308 SG |
182 | fsl,pull-up = <0>; |
183 | }; | |
52f7176b SG |
184 | |
185 | pwm2_pins_a: pwm2@0 { | |
186 | reg = <0>; | |
187 | fsl,pinmux-ids = < | |
188 | 0x11c0 /* MX23_PAD_PWM2__PWM2 */ | |
189 | >; | |
190 | fsl,drive-strength = <0>; | |
191 | fsl,voltage = <1>; | |
192 | fsl,pull-up = <0>; | |
193 | }; | |
a915ee42 SG |
194 | |
195 | lcdif_24bit_pins_a: lcdif-24bit@0 { | |
196 | reg = <0>; | |
197 | fsl,pinmux-ids = < | |
198 | 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ | |
199 | 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ | |
200 | 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ | |
201 | 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ | |
202 | 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ | |
203 | 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ | |
204 | 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ | |
205 | 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ | |
206 | 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ | |
207 | 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ | |
208 | 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ | |
209 | 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ | |
210 | 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ | |
211 | 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ | |
212 | 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ | |
213 | 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ | |
214 | 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ | |
215 | 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ | |
216 | 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ | |
217 | 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ | |
218 | 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ | |
219 | 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ | |
220 | 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ | |
221 | 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ | |
222 | 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ | |
223 | 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ | |
224 | 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ | |
225 | 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ | |
226 | >; | |
227 | fsl,drive-strength = <0>; | |
228 | fsl,voltage = <1>; | |
229 | fsl,pull-up = <0>; | |
230 | }; | |
2954ff39 SG |
231 | }; |
232 | ||
233 | digctl@8001c000 { | |
234 | reg = <0x8001c000 2000>; | |
235 | status = "disabled"; | |
236 | }; | |
237 | ||
238 | emi@80020000 { | |
239 | reg = <0x80020000 2000>; | |
240 | status = "disabled"; | |
241 | }; | |
242 | ||
243 | dma-apbx@80024000 { | |
84f3570a | 244 | compatible = "fsl,imx23-dma-apbx"; |
2954ff39 | 245 | reg = <0x80024000 2000>; |
2954ff39 SG |
246 | }; |
247 | ||
248 | dcp@80028000 { | |
249 | reg = <0x80028000 2000>; | |
250 | status = "disabled"; | |
251 | }; | |
252 | ||
253 | pxp@8002a000 { | |
254 | reg = <0x8002a000 2000>; | |
255 | status = "disabled"; | |
256 | }; | |
257 | ||
258 | ocotp@8002c000 { | |
259 | reg = <0x8002c000 2000>; | |
260 | status = "disabled"; | |
261 | }; | |
262 | ||
263 | axi-ahb@8002e000 { | |
264 | reg = <0x8002e000 2000>; | |
265 | status = "disabled"; | |
266 | }; | |
267 | ||
268 | lcdif@80030000 { | |
a915ee42 | 269 | compatible = "fsl,imx23-lcdif"; |
2954ff39 | 270 | reg = <0x80030000 2000>; |
a915ee42 | 271 | interrupts = <46 45>; |
2954ff39 SG |
272 | status = "disabled"; |
273 | }; | |
274 | ||
275 | ssp1: ssp@80034000 { | |
276 | reg = <0x80034000 2000>; | |
be1ce308 SG |
277 | interrupts = <2 20>; |
278 | fsl,ssp-dma-channel = <2>; | |
2954ff39 SG |
279 | status = "disabled"; |
280 | }; | |
281 | ||
282 | tvenc@80038000 { | |
283 | reg = <0x80038000 2000>; | |
284 | status = "disabled"; | |
285 | }; | |
286 | }; | |
287 | ||
288 | apbx@80040000 { | |
289 | compatible = "simple-bus"; | |
290 | #address-cells = <1>; | |
291 | #size-cells = <1>; | |
292 | reg = <0x80040000 0x40000>; | |
293 | ranges; | |
294 | ||
295 | clkctl@80040000 { | |
296 | reg = <0x80040000 2000>; | |
297 | status = "disabled"; | |
298 | }; | |
299 | ||
300 | saif0: saif@80042000 { | |
301 | reg = <0x80042000 2000>; | |
302 | status = "disabled"; | |
303 | }; | |
304 | ||
305 | power@80044000 { | |
306 | reg = <0x80044000 2000>; | |
307 | status = "disabled"; | |
308 | }; | |
309 | ||
310 | saif1: saif@80046000 { | |
311 | reg = <0x80046000 2000>; | |
312 | status = "disabled"; | |
313 | }; | |
314 | ||
315 | audio-out@80048000 { | |
316 | reg = <0x80048000 2000>; | |
317 | status = "disabled"; | |
318 | }; | |
319 | ||
320 | audio-in@8004c000 { | |
321 | reg = <0x8004c000 2000>; | |
322 | status = "disabled"; | |
323 | }; | |
324 | ||
325 | lradc@80050000 { | |
326 | reg = <0x80050000 2000>; | |
327 | status = "disabled"; | |
328 | }; | |
329 | ||
330 | spdif@80054000 { | |
331 | reg = <0x80054000 2000>; | |
332 | status = "disabled"; | |
333 | }; | |
334 | ||
335 | i2c@80058000 { | |
336 | reg = <0x80058000 2000>; | |
337 | status = "disabled"; | |
338 | }; | |
339 | ||
340 | rtc@8005c000 { | |
f98c990c | 341 | compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; |
2954ff39 | 342 | reg = <0x8005c000 2000>; |
f98c990c | 343 | interrupts = <22>; |
2954ff39 SG |
344 | }; |
345 | ||
52f7176b SG |
346 | pwm: pwm@80064000 { |
347 | compatible = "fsl,imx23-pwm"; | |
2954ff39 | 348 | reg = <0x80064000 2000>; |
52f7176b SG |
349 | #pwm-cells = <2>; |
350 | fsl,pwm-number = <5>; | |
2954ff39 SG |
351 | status = "disabled"; |
352 | }; | |
353 | ||
354 | timrot@80068000 { | |
355 | reg = <0x80068000 2000>; | |
356 | status = "disabled"; | |
357 | }; | |
358 | ||
359 | auart0: serial@8006c000 { | |
a4508394 | 360 | compatible = "fsl,imx23-auart"; |
2954ff39 | 361 | reg = <0x8006c000 0x2000>; |
a4508394 | 362 | interrupts = <24 25 23>; |
2954ff39 SG |
363 | status = "disabled"; |
364 | }; | |
365 | ||
366 | auart1: serial@8006e000 { | |
a4508394 | 367 | compatible = "fsl,imx23-auart"; |
2954ff39 | 368 | reg = <0x8006e000 0x2000>; |
a4508394 | 369 | interrupts = <59 60 58>; |
2954ff39 SG |
370 | status = "disabled"; |
371 | }; | |
372 | ||
373 | duart: serial@80070000 { | |
374 | compatible = "arm,pl011", "arm,primecell"; | |
375 | reg = <0x80070000 0x2000>; | |
376 | interrupts = <0>; | |
377 | status = "disabled"; | |
378 | }; | |
379 | ||
380 | usbphy@8007c000 { | |
381 | reg = <0x8007c000 0x2000>; | |
382 | status = "disabled"; | |
383 | }; | |
384 | }; | |
385 | }; | |
386 | ||
387 | ahb@80080000 { | |
388 | compatible = "simple-bus"; | |
389 | #address-cells = <1>; | |
390 | #size-cells = <1>; | |
391 | reg = <0x80080000 0x80000>; | |
392 | ranges; | |
393 | ||
394 | usbctrl@80080000 { | |
395 | reg = <0x80080000 0x10000>; | |
396 | status = "disabled"; | |
397 | }; | |
398 | }; | |
399 | }; |