[linux-2.6-block.git] / arch / arm / boot / dts / imx23.dtsi

// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.

#include "imx23-pinfunc.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	interrupt-parent = <&icoll>;
	/*
	 * The decompressor and also some bootloaders rely on a
	 * pre-existing /chosen node to be available to insert the
	 * command line and merge other ATAGS info.
	 * Also for U-Boot there must be a pre-existing /memory node.
	 */
	chosen {};
	memory { device_type = "memory"; };

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
		spi0 = &ssp0;
		spi1 = &ssp1;
		usbphy0 = &usbphy0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <0>;
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <1>;
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <2>;
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM0__DUART_RX
						MX23_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_AUART1_RX__AUART1_RX
						MX23_PAD_AUART1_TX__AUART1_TX
						MX23_PAD_AUART1_CTS__AUART1_CTS
						MX23_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__AUART1_TX
						MX23_PAD_I2C_SDA__AUART1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D14__AUART2_RX
						MX23_PAD_GPMI_D15__AUART2_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__GPMI_D00
						MX23_PAD_GPMI_D01__GPMI_D01
						MX23_PAD_GPMI_D02__GPMI_D02
						MX23_PAD_GPMI_D03__GPMI_D03
						MX23_PAD_GPMI_D04__GPMI_D04
						MX23_PAD_GPMI_D05__GPMI_D05
						MX23_PAD_GPMI_D06__GPMI_D06
						MX23_PAD_GPMI_D07__GPMI_D07
						MX23_PAD_GPMI_CLE__GPMI_CLE
						MX23_PAD_GPMI_ALE__GPMI_ALE
						MX23_PAD_GPMI_RDY0__GPMI_RDY0
						MX23_PAD_GPMI_RDY1__GPMI_RDY1
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
						MX23_PAD_GPMI_CE1N__GPMI_CE1N
						MX23_PAD_GPMI_CE0N__GPMI_CE0N
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_GPMI_D08__SSP1_DATA4
						MX23_PAD_GPMI_D09__SSP1_DATA5
						MX23_PAD_GPMI_D10__SSP1_DATA6
						MX23_PAD_GPMI_D11__SSP1_DATA7
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc1_4bit_pins_a: mmc1-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc1_8bit_pins_a: mmc1-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_D04__SSP2_DATA4
						MX23_PAD_GPMI_D05__SSP2_DATA5
						MX23_PAD_GPMI_D06__SSP2_DATA6
						MX23_PAD_GPMI_D07__SSP2_DATA7
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM2__PWM2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_D00__LCD_D00
						MX23_PAD_LCD_D01__LCD_D01
						MX23_PAD_LCD_D02__LCD_D02
						MX23_PAD_LCD_D03__LCD_D03
						MX23_PAD_LCD_D04__LCD_D04
						MX23_PAD_LCD_D05__LCD_D05
						MX23_PAD_LCD_D06__LCD_D06
						MX23_PAD_LCD_D07__LCD_D07
						MX23_PAD_LCD_D08__LCD_D08
						MX23_PAD_LCD_D09__LCD_D09
						MX23_PAD_LCD_D10__LCD_D10
						MX23_PAD_LCD_D11__LCD_D11
						MX23_PAD_LCD_D12__LCD_D12
						MX23_PAD_LCD_D13__LCD_D13
						MX23_PAD_LCD_D14__LCD_D14
						MX23_PAD_LCD_D15__LCD_D15
						MX23_PAD_LCD_D16__LCD_D16
						MX23_PAD_LCD_D17__LCD_D17
						MX23_PAD_GPMI_D08__LCD_D18
						MX23_PAD_GPMI_D09__LCD_D19
						MX23_PAD_GPMI_D10__LCD_D20
						MX23_PAD_GPMI_D11__LCD_D21
						MX23_PAD_GPMI_D12__LCD_D22
						MX23_PAD_GPMI_D13__LCD_D23
						MX23_PAD_LCD_DOTCK__LCD_DOTCK
						MX23_PAD_LCD_ENABLE__LCD_ENABLE
						MX23_PAD_LCD_HSYNC__LCD_HSYNC
						MX23_PAD_LCD_VSYNC__LCD_VSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WRN__SSP2_SCK
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D03__SSP2_DATA3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_a: i2c@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__I2C_SCL
						MX23_PAD_I2C_SDA__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_b: i2c@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_ENABLE__I2C_SCL
						MX23_PAD_LCD_HSYNC__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_c: i2c@2 {
					reg = <2>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA1__I2C_SCL
						MX23_PAD_SSP1_DATA2__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				compatible = "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <53 54>;
				status = "okay";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,imx23-ocotp", "fsl,ocotp";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8002c000 0x2000>;
				clocks = <&clks 15>;
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
		};

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc: lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
				clocks = <&clks 26>;
				#io-channel-cells = <1>;
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-i2c";
				reg = <0x80058000 0x2000>;
				interrupts = <27>;
				clock-frequency = <100000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&lradc 8>;
	};
};
Commit	Line	Data
241f76b2 FE	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// Copyright 2012 Freescale Semiconductor, Inc.
2954ff39	4
bc3875f1	5	#include "imx23-pinfunc.h"
2954ff39 SG	6
2954ff39 SG	7	/ {
7f107887 FE	8	#address-cells = <1>;
	9	#size-cells = <1>;
	10
2954ff39	11	interrupt-parent = <&icoll>;
a971c554 FE	12	/*
	13	* The decompressor and also some bootloaders rely on a
	14	* pre-existing /chosen node to be available to insert the
	15	* command line and merge other ATAGS info.
	16	* Also for U-Boot there must be a pre-existing /memory node.
	17	*/
	18	chosen {};
7f08e6aa	19	memory { device_type = "memory"; };
2954ff39	20
ce4c6f9b SG	21	aliases {
	22	gpio0 = &gpio0;
	23	gpio1 = &gpio1;
	24	gpio2 = &gpio2;
a4508394 SG	25	serial0 = &auart0;
a4508394 SG	26	serial1 = &auart1;
6bf6eb09 FE	27	spi0 = &ssp0;
6bf6eb09 FE	28	spi1 = &ssp1;
1f35cc6a	29	usbphy0 = &usbphy0;
ce4c6f9b SG	30	};
ce4c6f9b SG	31
2954ff39	32	cpus {
d447dd88	33	#address-cells = <1>;
7925e89f LP	34	#size-cells = <0>;
7925e89f LP	35
d447dd88	36	cpu@0 {
7925e89f LP	37	compatible = "arm,arm926ej-s";
7925e89f LP	38	device_type = "cpu";
d447dd88	39	reg = <0>;
2954ff39 SG	40	};
	41	};
	42
	43	apb@80000000 {
	44	compatible = "simple-bus";
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	reg = <0x80000000 0x80000>;
	48	ranges;
	49
	50	apbh@80000000 {
	51	compatible = "simple-bus";
	52	#address-cells = <1>;
	53	#size-cells = <1>;
	54	reg = <0x80000000 0x40000>;
	55	ranges;
	56
	57	icoll: interrupt-controller@80000000 {
83a84efc	58	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	59	interrupt-controller;
	60	#interrupt-cells = <1>;
	61	reg = <0x80000000 0x2000>;
	62	};
	63
f30fb03d	64	dma_apbh: dma-apbh@80004000 {
84f3570a	65	compatible = "fsl,imx23-dma-apbh";
640bf060	66	reg = <0x80004000 0x2000>;
f30fb03d SG	67	interrupts = <0 14 20 0
	68	13 13 13 13>;
	69	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	70	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	71	#dma-cells = <1>;
	72	dma-channels = <8>;
53f9443d	73	clocks = <&clks 15>;
2954ff39 SG	74	};
	75
	76	ecc@80008000 {
640bf060	77	reg = <0x80008000 0x2000>;
2954ff39 SG	78	status = "disabled";
	79	};
	80
a217c46c	81	gpmi-nand@8000c000 {
b9f25f86 HS	82	compatible = "fsl,imx23-gpmi-nand";
	83	#address-cells = <1>;
	84	#size-cells = <1>;
640bf060	85	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	86	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	87	interrupts = <56>;
7f2b9288 SG	88	interrupt-names = "bch";
53f9443d	89	clocks = <&clks 34>;
b6442559	90	clock-names = "gpmi_io";
f30fb03d SG	91	dmas = <&dma_apbh 4>;
f30fb03d SG	92	dma-names = "rx-tx";
2954ff39 SG	93	status = "disabled";
	94	};
	95
	96	ssp0: ssp@80010000 {
640bf060	97	reg = <0x80010000 0x2000>;
7f2b9288	98	interrupts = <15>;
53f9443d	99	clocks = <&clks 33>;
f30fb03d SG	100	dmas = <&dma_apbh 1>;
f30fb03d SG	101	dma-names = "rx-tx";
2954ff39 SG	102	status = "disabled";
	103	};
	104
	105	etm@80014000 {
640bf060	106	reg = <0x80014000 0x2000>;
2954ff39 SG	107	status = "disabled";
	108	};
	109
	110	pinctrl@80018000 {
	111	#address-cells = <1>;
	112	#size-cells = <0>;
ce4c6f9b	113	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	114	reg = <0x80018000 0x2000>;
2954ff39	115
ce4c6f9b SG	116	gpio0: gpio@0 {
ce4c6f9b SG	117	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	118	reg = <0>;
ce4c6f9b SG	119	interrupts = <16>;
	120	gpio-controller;
	121	#gpio-cells = <2>;
	122	interrupt-controller;
	123	#interrupt-cells = <2>;
	124	};
	125
	126	gpio1: gpio@1 {
	127	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	128	reg = <1>;
ce4c6f9b SG	129	interrupts = <17>;
	130	gpio-controller;
	131	#gpio-cells = <2>;
	132	interrupt-controller;
	133	#interrupt-cells = <2>;
	134	};
	135
	136	gpio2: gpio@2 {
	137	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	138	reg = <2>;
ce4c6f9b SG	139	interrupts = <18>;
	140	gpio-controller;
	141	#gpio-cells = <2>;
	142	interrupt-controller;
	143	#interrupt-cells = <2>;
	144	};
	145
2954ff39 SG	146	duart_pins_a: duart@0 {
2954ff39 SG	147	reg = <0>;
f14da767	148	fsl,pinmux-ids = <
bc3875f1 LW	149	MX23_PAD_PWM0__DUART_RX
bc3875f1 LW	150	MX23_PAD_PWM1__DUART_TX
f14da767	151	>;
4191c340 LW	152	fsl,drive-strength = <MXS_DRIVE_4mA>;
	153	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	154	fsl,pull-up = <MXS_PULL_DISABLE>;
2954ff39	155	};
be1ce308	156
a4508394 SG	157	auart0_pins_a: auart0@0 {
	158	reg = <0>;
	159	fsl,pinmux-ids = <
bc3875f1 LW	160	MX23_PAD_AUART1_RX__AUART1_RX
	161	MX23_PAD_AUART1_TX__AUART1_TX
	162	MX23_PAD_AUART1_CTS__AUART1_CTS
	163	MX23_PAD_AUART1_RTS__AUART1_RTS
a4508394	164	>;
4191c340 LW	165	fsl,drive-strength = <MXS_DRIVE_4mA>;
	166	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	167	fsl,pull-up = <MXS_PULL_DISABLE>;
a4508394 SG	168	};
a4508394 SG	169
98916a2f FE	170	auart0_2pins_a: auart0-2pins@0 {
	171	reg = <0>;
	172	fsl,pinmux-ids = <
bc3875f1 LW	173	MX23_PAD_I2C_SCL__AUART1_TX
bc3875f1 LW	174	MX23_PAD_I2C_SDA__AUART1_RX
98916a2f	175	>;
4191c340 LW	176	fsl,drive-strength = <MXS_DRIVE_4mA>;
	177	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	178	fsl,pull-up = <MXS_PULL_DISABLE>;
98916a2f FE	179	};
98916a2f FE	180
d33c731b MV	181	auart1_2pins_a: auart1-2pins@0 {
	182	reg = <0>;
	183	fsl,pinmux-ids = <
	184	MX23_PAD_GPMI_D14__AUART2_RX
	185	MX23_PAD_GPMI_D15__AUART2_TX
	186	>;
	187	fsl,drive-strength = <MXS_DRIVE_4mA>;
	188	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	189	fsl,pull-up = <MXS_PULL_DISABLE>;
	190	};
	191
b9f25f86 HS	192	gpmi_pins_a: gpmi-nand@0 {
	193	reg = <0>;
	194	fsl,pinmux-ids = <
bc3875f1 LW	195	MX23_PAD_GPMI_D00__GPMI_D00
	196	MX23_PAD_GPMI_D01__GPMI_D01
	197	MX23_PAD_GPMI_D02__GPMI_D02
	198	MX23_PAD_GPMI_D03__GPMI_D03
	199	MX23_PAD_GPMI_D04__GPMI_D04
	200	MX23_PAD_GPMI_D05__GPMI_D05
	201	MX23_PAD_GPMI_D06__GPMI_D06
	202	MX23_PAD_GPMI_D07__GPMI_D07
	203	MX23_PAD_GPMI_CLE__GPMI_CLE
	204	MX23_PAD_GPMI_ALE__GPMI_ALE
	205	MX23_PAD_GPMI_RDY0__GPMI_RDY0
	206	MX23_PAD_GPMI_RDY1__GPMI_RDY1
	207	MX23_PAD_GPMI_WPN__GPMI_WPN
	208	MX23_PAD_GPMI_WRN__GPMI_WRN
	209	MX23_PAD_GPMI_RDN__GPMI_RDN
	210	MX23_PAD_GPMI_CE1N__GPMI_CE1N
	211	MX23_PAD_GPMI_CE0N__GPMI_CE0N
b9f25f86	212	>;
4191c340 LW	213	fsl,drive-strength = <MXS_DRIVE_4mA>;
	214	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	215	fsl,pull-up = <MXS_PULL_DISABLE>;
b9f25f86 HS	216	};
b9f25f86 HS	217
74aeda35 FE	218	gpmi_pins_fixup: gpmi-pins-fixup@0 {
74aeda35 FE	219	reg = <0>;
b9f25f86	220	fsl,pinmux-ids = <
bc3875f1 LW	221	MX23_PAD_GPMI_WPN__GPMI_WPN
	222	MX23_PAD_GPMI_WRN__GPMI_WRN
	223	MX23_PAD_GPMI_RDN__GPMI_RDN
b9f25f86	224	>;
4191c340	225	fsl,drive-strength = <MXS_DRIVE_12mA>;
b9f25f86 HS	226	};
b9f25f86 HS	227
72beabae SG	228	mmc0_4bit_pins_a: mmc0-4bit@0 {
	229	reg = <0>;
	230	fsl,pinmux-ids = <
bc3875f1 LW	231	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	232	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	233	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	234	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	235	MX23_PAD_SSP1_CMD__SSP1_CMD
	236	MX23_PAD_SSP1_SCK__SSP1_SCK
72beabae	237	>;
4191c340 LW	238	fsl,drive-strength = <MXS_DRIVE_8mA>;
	239	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	240	fsl,pull-up = <MXS_PULL_ENABLE>;
72beabae SG	241	};
72beabae SG	242
be1ce308 SG	243	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	244	reg = <0>;
f14da767	245	fsl,pinmux-ids = <
bc3875f1 LW	246	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	247	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	248	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	249	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	250	MX23_PAD_GPMI_D08__SSP1_DATA4
	251	MX23_PAD_GPMI_D09__SSP1_DATA5
	252	MX23_PAD_GPMI_D10__SSP1_DATA6
	253	MX23_PAD_GPMI_D11__SSP1_DATA7
	254	MX23_PAD_SSP1_CMD__SSP1_CMD
	255	MX23_PAD_SSP1_DETECT__SSP1_DETECT
	256	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	257	>;
4191c340 LW	258	fsl,drive-strength = <MXS_DRIVE_8mA>;
	259	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	260	fsl,pull-up = <MXS_PULL_ENABLE>;
be1ce308 SG	261	};
be1ce308 SG	262
74aeda35 FE	263	mmc0_pins_fixup: mmc0-pins-fixup@0 {
74aeda35 FE	264	reg = <0>;
f14da767	265	fsl,pinmux-ids = <
bc3875f1 LW	266	MX23_PAD_SSP1_DETECT__SSP1_DETECT
bc3875f1 LW	267	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	268	>;
4191c340	269	fsl,pull-up = <MXS_PULL_DISABLE>;
be1ce308	270	};
52f7176b	271
1ebcb168 MV	272	mmc1_4bit_pins_a: mmc1-4bit@0 {
	273	reg = <0>;
	274	fsl,pinmux-ids = <
	275	MX23_PAD_GPMI_D00__SSP2_DATA0
	276	MX23_PAD_GPMI_D01__SSP2_DATA1
	277	MX23_PAD_GPMI_D02__SSP2_DATA2
	278	MX23_PAD_GPMI_D03__SSP2_DATA3
	279	MX23_PAD_GPMI_RDY1__SSP2_CMD
	280	MX23_PAD_GPMI_WRN__SSP2_SCK
	281	>;
	282	fsl,drive-strength = <MXS_DRIVE_8mA>;
	283	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	284	fsl,pull-up = <MXS_PULL_ENABLE>;
	285	};
	286
	287	mmc1_8bit_pins_a: mmc1-8bit@0 {
	288	reg = <0>;
	289	fsl,pinmux-ids = <
	290	MX23_PAD_GPMI_D00__SSP2_DATA0
	291	MX23_PAD_GPMI_D01__SSP2_DATA1
	292	MX23_PAD_GPMI_D02__SSP2_DATA2
	293	MX23_PAD_GPMI_D03__SSP2_DATA3
	294	MX23_PAD_GPMI_D04__SSP2_DATA4
	295	MX23_PAD_GPMI_D05__SSP2_DATA5
	296	MX23_PAD_GPMI_D06__SSP2_DATA6
	297	MX23_PAD_GPMI_D07__SSP2_DATA7
	298	MX23_PAD_GPMI_RDY1__SSP2_CMD
	299	MX23_PAD_GPMI_WRN__SSP2_SCK
	300	>;
	301	fsl,drive-strength = <MXS_DRIVE_8mA>;
	302	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	303	fsl,pull-up = <MXS_PULL_ENABLE>;
	304	};
	305
52f7176b SG	306	pwm2_pins_a: pwm2@0 {
	307	reg = <0>;
	308	fsl,pinmux-ids = <
bc3875f1	309	MX23_PAD_PWM2__PWM2
52f7176b	310	>;
4191c340 LW	311	fsl,drive-strength = <MXS_DRIVE_4mA>;
	312	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	313	fsl,pull-up = <MXS_PULL_DISABLE>;
52f7176b	314	};
a915ee42 SG	315
	316	lcdif_24bit_pins_a: lcdif-24bit@0 {
	317	reg = <0>;
	318	fsl,pinmux-ids = <
bc3875f1 LW	319	MX23_PAD_LCD_D00__LCD_D00
	320	MX23_PAD_LCD_D01__LCD_D01
	321	MX23_PAD_LCD_D02__LCD_D02
	322	MX23_PAD_LCD_D03__LCD_D03
	323	MX23_PAD_LCD_D04__LCD_D04
	324	MX23_PAD_LCD_D05__LCD_D05
	325	MX23_PAD_LCD_D06__LCD_D06
	326	MX23_PAD_LCD_D07__LCD_D07
	327	MX23_PAD_LCD_D08__LCD_D08
	328	MX23_PAD_LCD_D09__LCD_D09
	329	MX23_PAD_LCD_D10__LCD_D10
	330	MX23_PAD_LCD_D11__LCD_D11
	331	MX23_PAD_LCD_D12__LCD_D12
	332	MX23_PAD_LCD_D13__LCD_D13
	333	MX23_PAD_LCD_D14__LCD_D14
	334	MX23_PAD_LCD_D15__LCD_D15
	335	MX23_PAD_LCD_D16__LCD_D16
	336	MX23_PAD_LCD_D17__LCD_D17
	337	MX23_PAD_GPMI_D08__LCD_D18
	338	MX23_PAD_GPMI_D09__LCD_D19
	339	MX23_PAD_GPMI_D10__LCD_D20
	340	MX23_PAD_GPMI_D11__LCD_D21
	341	MX23_PAD_GPMI_D12__LCD_D22
	342	MX23_PAD_GPMI_D13__LCD_D23
	343	MX23_PAD_LCD_DOTCK__LCD_DOTCK
	344	MX23_PAD_LCD_ENABLE__LCD_ENABLE
	345	MX23_PAD_LCD_HSYNC__LCD_HSYNC
	346	MX23_PAD_LCD_VSYNC__LCD_VSYNC
a915ee42	347	>;
4191c340 LW	348	fsl,drive-strength = <MXS_DRIVE_4mA>;
	349	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	350	fsl,pull-up = <MXS_PULL_DISABLE>;
a915ee42	351	};
a0487864 FB	352
	353	spi2_pins_a: spi2@0 {
	354	reg = <0>;
	355	fsl,pinmux-ids = <
bc3875f1 LW	356	MX23_PAD_GPMI_WRN__SSP2_SCK
	357	MX23_PAD_GPMI_RDY1__SSP2_CMD
	358	MX23_PAD_GPMI_D00__SSP2_DATA0
	359	MX23_PAD_GPMI_D03__SSP2_DATA3
a0487864	360	>;
4191c340 LW	361	fsl,drive-strength = <MXS_DRIVE_8mA>;
	362	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	363	fsl,pull-up = <MXS_PULL_ENABLE>;
a0487864	364	};
71a34d82 HG	365
	366	i2c_pins_a: i2c@0 {
	367	reg = <0>;
	368	fsl,pinmux-ids = <
	369	MX23_PAD_I2C_SCL__I2C_SCL
	370	MX23_PAD_I2C_SDA__I2C_SDA
	371	>;
	372	fsl,drive-strength = <MXS_DRIVE_8mA>;
	373	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	374	fsl,pull-up = <MXS_PULL_ENABLE>;
	375	};
	376
	377	i2c_pins_b: i2c@1 {
	378	reg = <1>;
	379	fsl,pinmux-ids = <
	380	MX23_PAD_LCD_ENABLE__I2C_SCL
	381	MX23_PAD_LCD_HSYNC__I2C_SDA
	382	>;
	383	fsl,drive-strength = <MXS_DRIVE_8mA>;
	384	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	385	fsl,pull-up = <MXS_PULL_ENABLE>;
	386	};
	387
	388	i2c_pins_c: i2c@2 {
	389	reg = <2>;
	390	fsl,pinmux-ids = <
	391	MX23_PAD_SSP1_DATA1__I2C_SCL
	392	MX23_PAD_SSP1_DATA2__I2C_SDA
	393	>;
	394	fsl,drive-strength = <MXS_DRIVE_8mA>;
	395	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	396	fsl,pull-up = <MXS_PULL_ENABLE>;
	397	};
2954ff39 SG	398	};
	399
	400	digctl@8001c000 {
38d6590f	401	compatible = "fsl,imx23-digctl";
2954ff39 SG	402	reg = <0x8001c000 2000>;
	403	status = "disabled";
	404	};
	405
	406	emi@80020000 {
640bf060	407	reg = <0x80020000 0x2000>;
2954ff39 SG	408	status = "disabled";
	409	};
	410
f30fb03d	411	dma_apbx: dma-apbx@80024000 {
84f3570a	412	compatible = "fsl,imx23-dma-apbx";
640bf060	413	reg = <0x80024000 0x2000>;
f30fb03d SG	414	interrupts = <7 5 9 26
	415	19 0 25 23
	416	60 58 9 0
	417	0 0 0 0>;
	418	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	419	"saif0", "empty", "auart0-rx", "auart0-tx",
	420	"auart1-rx", "auart1-tx", "saif1", "empty",
	421	"empty", "empty", "empty", "empty";
	422	#dma-cells = <1>;
	423	dma-channels = <16>;
53f9443d	424	clocks = <&clks 16>;
2954ff39 SG	425	};
	426
	427	dcp@80028000 {
7d56a28f	428	compatible = "fsl,imx23-dcp";
640bf060	429	reg = <0x80028000 0x2000>;
7d56a28f MV	430	interrupts = <53 54>;
7d56a28f MV	431	status = "okay";
2954ff39 SG	432	};
	433
	434	pxp@8002a000 {
640bf060	435	reg = <0x8002a000 0x2000>;
2954ff39 SG	436	status = "disabled";
	437	};
	438
	439	ocotp@8002c000 {
a7be1e68 SW	440	compatible = "fsl,imx23-ocotp", "fsl,ocotp";
	441	#address-cells = <1>;
	442	#size-cells = <1>;
640bf060	443	reg = <0x8002c000 0x2000>;
a7be1e68	444	clocks = <&clks 15>;
2954ff39 SG	445	};
	446
	447	axi-ahb@8002e000 {
640bf060	448	reg = <0x8002e000 0x2000>;
2954ff39 SG	449	status = "disabled";
	450	};
	451
	452	lcdif@80030000 {
a915ee42	453	compatible = "fsl,imx23-lcdif";
2954ff39	454	reg = <0x80030000 2000>;
a915ee42	455	interrupts = <46 45>;
53f9443d	456	clocks = <&clks 38>;
2954ff39 SG	457	status = "disabled";
	458	};
	459
	460	ssp1: ssp@80034000 {
640bf060	461	reg = <0x80034000 0x2000>;
7f2b9288	462	interrupts = <2>;
53f9443d	463	clocks = <&clks 33>;
f30fb03d SG	464	dmas = <&dma_apbh 2>;
f30fb03d SG	465	dma-names = "rx-tx";
2954ff39 SG	466	status = "disabled";
	467	};
	468
	469	tvenc@80038000 {
640bf060	470	reg = <0x80038000 0x2000>;
2954ff39 SG	471	status = "disabled";
2954ff39 SG	472	};
46311707	473	};
2954ff39 SG	474
	475	apbx@80040000 {
	476	compatible = "simple-bus";
	477	#address-cells = <1>;
	478	#size-cells = <1>;
	479	reg = <0x80040000 0x40000>;
	480	ranges;
	481
53f9443d	482	clks: clkctrl@80040000 {
8f7cf881	483	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	484	reg = <0x80040000 0x2000>;
53f9443d	485	#clock-cells = <1>;
2954ff39 SG	486	};
	487
	488	saif0: saif@80042000 {
640bf060	489	reg = <0x80042000 0x2000>;
f30fb03d SG	490	dmas = <&dma_apbx 4>;
f30fb03d SG	491	dma-names = "rx-tx";
2954ff39 SG	492	status = "disabled";
	493	};
	494
	495	power@80044000 {
640bf060	496	reg = <0x80044000 0x2000>;
2954ff39 SG	497	status = "disabled";
	498	};
	499
	500	saif1: saif@80046000 {
640bf060	501	reg = <0x80046000 0x2000>;
f30fb03d SG	502	dmas = <&dma_apbx 10>;
f30fb03d SG	503	dma-names = "rx-tx";
2954ff39 SG	504	status = "disabled";
	505	};
	506
	507	audio-out@80048000 {
640bf060	508	reg = <0x80048000 0x2000>;
f30fb03d SG	509	dmas = <&dma_apbx 1>;
f30fb03d SG	510	dma-names = "tx";
2954ff39 SG	511	status = "disabled";
	512	};
	513
	514	audio-in@8004c000 {
640bf060	515	reg = <0x8004c000 0x2000>;
f30fb03d SG	516	dmas = <&dma_apbx 0>;
f30fb03d SG	517	dma-names = "rx";
2954ff39 SG	518	status = "disabled";
	519	};
	520
bd798f9c	521	lradc: lradc@80050000 {
1f45188c	522	compatible = "fsl,imx23-lradc";
640bf060	523	reg = <0x80050000 0x2000>;
1f45188c	524	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39	525	status = "disabled";
18da755d	526	clocks = <&clks 26>;
e8e94ed6	527	#io-channel-cells = <1>;
2954ff39 SG	528	};
	529
	530	spdif@80054000 {
	531	reg = <0x80054000 2000>;
f30fb03d SG	532	dmas = <&dma_apbx 2>;
f30fb03d SG	533	dma-names = "tx";
2954ff39 SG	534	status = "disabled";
	535	};
	536
71a34d82 HG	537	i2c: i2c@80058000 {
	538	#address-cells = <1>;
	539	#size-cells = <0>;
	540	compatible = "fsl,imx23-i2c";
640bf060	541	reg = <0x80058000 0x2000>;
71a34d82 HG	542	interrupts = <27>;
71a34d82 HG	543	clock-frequency = <100000>;
f30fb03d SG	544	dmas = <&dma_apbx 3>;
f30fb03d SG	545	dma-names = "rx-tx";
2954ff39 SG	546	status = "disabled";
	547	};
	548
	549	rtc@8005c000 {
f98c990c	550	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	551	reg = <0x8005c000 0x2000>;
f98c990c	552	interrupts = <22>;
2954ff39 SG	553	};
2954ff39 SG	554
52f7176b SG	555	pwm: pwm@80064000 {
52f7176b SG	556	compatible = "fsl,imx23-pwm";
640bf060	557	reg = <0x80064000 0x2000>;
53f9443d	558	clocks = <&clks 30>;
52f7176b SG	559	#pwm-cells = <2>;
52f7176b SG	560	fsl,pwm-number = <5>;
2954ff39 SG	561	status = "disabled";
	562	};
	563
	564	timrot@80068000 {
eeca6e60	565	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	566	reg = <0x80068000 0x2000>;
eeca6e60	567	interrupts = <28 29 30 31>;
2efb9504	568	clocks = <&clks 28>;
2954ff39 SG	569	};
	570
	571	auart0: serial@8006c000 {
a4508394	572	compatible = "fsl,imx23-auart";
2954ff39	573	reg = <0x8006c000 0x2000>;
7f2b9288	574	interrupts = <24>;
53f9443d	575	clocks = <&clks 32>;
f30fb03d SG	576	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	577	dma-names = "rx", "tx";
2954ff39 SG	578	status = "disabled";
	579	};
	580
	581	auart1: serial@8006e000 {
a4508394	582	compatible = "fsl,imx23-auart";
2954ff39	583	reg = <0x8006e000 0x2000>;
7f2b9288	584	interrupts = <59>;
53f9443d	585	clocks = <&clks 32>;
f30fb03d SG	586	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	587	dma-names = "rx", "tx";
2954ff39 SG	588	status = "disabled";
	589	};
	590
	591	duart: serial@80070000 {
	592	compatible = "arm,pl011", "arm,primecell";
	593	reg = <0x80070000 0x2000>;
	594	interrupts = <0>;
53f9443d SG	595	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	596	clock-names = "uart", "apb_pclk";
2954ff39 SG	597	status = "disabled";
	598	};
	599
d6475317 FE	600	usbphy0: usbphy@8007c000 {
d6475317 FE	601	compatible = "fsl,imx23-usbphy";
2954ff39	602	reg = <0x8007c000 0x2000>;
d6475317	603	clocks = <&clks 41>;
2954ff39 SG	604	status = "disabled";
	605	};
	606	};
	607	};
	608
	609	ahb@80080000 {
	610	compatible = "simple-bus";
	611	#address-cells = <1>;
	612	#size-cells = <1>;
	613	reg = <0x80080000 0x80000>;
	614	ranges;
	615
d6475317 FE	616	usb0: usb@80080000 {
d6475317 FE	617	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	618	reg = <0x80080000 0x40000>;
d6475317 FE	619	interrupts = <11>;
	620	fsl,usbphy = <&usbphy0>;
	621	clocks = <&clks 40>;
2954ff39 SG	622	status = "disabled";
	623	};
	624	};
bd798f9c	625
0b452ccc	626	iio-hwmon {
bd798f9c AB	627	compatible = "iio-hwmon";
	628	io-channels = <&lradc 8>;
	629	};
2954ff39	630	};