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2954ff39 SG |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | interrupt-parent = <&icoll>; | |
16 | ||
ce4c6f9b SG |
17 | aliases { |
18 | gpio0 = &gpio0; | |
19 | gpio1 = &gpio1; | |
20 | gpio2 = &gpio2; | |
21 | }; | |
22 | ||
2954ff39 SG |
23 | cpus { |
24 | cpu@0 { | |
25 | compatible = "arm,arm926ejs"; | |
26 | }; | |
27 | }; | |
28 | ||
29 | apb@80000000 { | |
30 | compatible = "simple-bus"; | |
31 | #address-cells = <1>; | |
32 | #size-cells = <1>; | |
33 | reg = <0x80000000 0x80000>; | |
34 | ranges; | |
35 | ||
36 | apbh@80000000 { | |
37 | compatible = "simple-bus"; | |
38 | #address-cells = <1>; | |
39 | #size-cells = <1>; | |
40 | reg = <0x80000000 0x40000>; | |
41 | ranges; | |
42 | ||
43 | icoll: interrupt-controller@80000000 { | |
44 | compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; | |
45 | interrupt-controller; | |
46 | #interrupt-cells = <1>; | |
47 | reg = <0x80000000 0x2000>; | |
48 | }; | |
49 | ||
50 | dma-apbh@80004000 { | |
84f3570a | 51 | compatible = "fsl,imx23-dma-apbh"; |
2954ff39 | 52 | reg = <0x80004000 2000>; |
2954ff39 SG |
53 | }; |
54 | ||
55 | ecc@80008000 { | |
56 | reg = <0x80008000 2000>; | |
57 | status = "disabled"; | |
58 | }; | |
59 | ||
60 | bch@8000a000 { | |
61 | reg = <0x8000a000 2000>; | |
62 | status = "disabled"; | |
63 | }; | |
64 | ||
a217c46c | 65 | gpmi-nand@8000c000 { |
2954ff39 SG |
66 | reg = <0x8000c000 2000>; |
67 | status = "disabled"; | |
68 | }; | |
69 | ||
70 | ssp0: ssp@80010000 { | |
71 | reg = <0x80010000 2000>; | |
be1ce308 SG |
72 | interrupts = <15 14>; |
73 | fsl,ssp-dma-channel = <1>; | |
2954ff39 SG |
74 | status = "disabled"; |
75 | }; | |
76 | ||
77 | etm@80014000 { | |
78 | reg = <0x80014000 2000>; | |
79 | status = "disabled"; | |
80 | }; | |
81 | ||
82 | pinctrl@80018000 { | |
83 | #address-cells = <1>; | |
84 | #size-cells = <0>; | |
ce4c6f9b | 85 | compatible = "fsl,imx23-pinctrl", "simple-bus"; |
2954ff39 SG |
86 | reg = <0x80018000 2000>; |
87 | ||
ce4c6f9b SG |
88 | gpio0: gpio@0 { |
89 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
90 | interrupts = <16>; | |
91 | gpio-controller; | |
92 | #gpio-cells = <2>; | |
93 | interrupt-controller; | |
94 | #interrupt-cells = <2>; | |
95 | }; | |
96 | ||
97 | gpio1: gpio@1 { | |
98 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
99 | interrupts = <17>; | |
100 | gpio-controller; | |
101 | #gpio-cells = <2>; | |
102 | interrupt-controller; | |
103 | #interrupt-cells = <2>; | |
104 | }; | |
105 | ||
106 | gpio2: gpio@2 { | |
107 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
108 | interrupts = <18>; | |
109 | gpio-controller; | |
110 | #gpio-cells = <2>; | |
111 | interrupt-controller; | |
112 | #interrupt-cells = <2>; | |
113 | }; | |
114 | ||
2954ff39 SG |
115 | duart_pins_a: duart@0 { |
116 | reg = <0>; | |
f14da767 SG |
117 | fsl,pinmux-ids = < |
118 | 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ | |
119 | 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ | |
120 | >; | |
2954ff39 SG |
121 | fsl,drive-strength = <0>; |
122 | fsl,voltage = <1>; | |
123 | fsl,pull-up = <0>; | |
124 | }; | |
be1ce308 | 125 | |
72beabae SG |
126 | mmc0_4bit_pins_a: mmc0-4bit@0 { |
127 | reg = <0>; | |
128 | fsl,pinmux-ids = < | |
129 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
130 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
131 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
132 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
133 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
134 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
135 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
136 | >; | |
137 | fsl,drive-strength = <1>; | |
138 | fsl,voltage = <1>; | |
139 | fsl,pull-up = <1>; | |
140 | }; | |
141 | ||
be1ce308 SG |
142 | mmc0_8bit_pins_a: mmc0-8bit@0 { |
143 | reg = <0>; | |
f14da767 SG |
144 | fsl,pinmux-ids = < |
145 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
146 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
147 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
148 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
149 | 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ | |
150 | 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ | |
151 | 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ | |
152 | 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ | |
153 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
154 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
155 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
156 | >; | |
be1ce308 SG |
157 | fsl,drive-strength = <1>; |
158 | fsl,voltage = <1>; | |
159 | fsl,pull-up = <1>; | |
160 | }; | |
161 | ||
162 | mmc0_pins_fixup: mmc0-pins-fixup { | |
f14da767 SG |
163 | fsl,pinmux-ids = < |
164 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
165 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
166 | >; | |
be1ce308 SG |
167 | fsl,pull-up = <0>; |
168 | }; | |
2954ff39 SG |
169 | }; |
170 | ||
171 | digctl@8001c000 { | |
172 | reg = <0x8001c000 2000>; | |
173 | status = "disabled"; | |
174 | }; | |
175 | ||
176 | emi@80020000 { | |
177 | reg = <0x80020000 2000>; | |
178 | status = "disabled"; | |
179 | }; | |
180 | ||
181 | dma-apbx@80024000 { | |
84f3570a | 182 | compatible = "fsl,imx23-dma-apbx"; |
2954ff39 | 183 | reg = <0x80024000 2000>; |
2954ff39 SG |
184 | }; |
185 | ||
186 | dcp@80028000 { | |
187 | reg = <0x80028000 2000>; | |
188 | status = "disabled"; | |
189 | }; | |
190 | ||
191 | pxp@8002a000 { | |
192 | reg = <0x8002a000 2000>; | |
193 | status = "disabled"; | |
194 | }; | |
195 | ||
196 | ocotp@8002c000 { | |
197 | reg = <0x8002c000 2000>; | |
198 | status = "disabled"; | |
199 | }; | |
200 | ||
201 | axi-ahb@8002e000 { | |
202 | reg = <0x8002e000 2000>; | |
203 | status = "disabled"; | |
204 | }; | |
205 | ||
206 | lcdif@80030000 { | |
207 | reg = <0x80030000 2000>; | |
208 | status = "disabled"; | |
209 | }; | |
210 | ||
211 | ssp1: ssp@80034000 { | |
212 | reg = <0x80034000 2000>; | |
be1ce308 SG |
213 | interrupts = <2 20>; |
214 | fsl,ssp-dma-channel = <2>; | |
2954ff39 SG |
215 | status = "disabled"; |
216 | }; | |
217 | ||
218 | tvenc@80038000 { | |
219 | reg = <0x80038000 2000>; | |
220 | status = "disabled"; | |
221 | }; | |
222 | }; | |
223 | ||
224 | apbx@80040000 { | |
225 | compatible = "simple-bus"; | |
226 | #address-cells = <1>; | |
227 | #size-cells = <1>; | |
228 | reg = <0x80040000 0x40000>; | |
229 | ranges; | |
230 | ||
231 | clkctl@80040000 { | |
232 | reg = <0x80040000 2000>; | |
233 | status = "disabled"; | |
234 | }; | |
235 | ||
236 | saif0: saif@80042000 { | |
237 | reg = <0x80042000 2000>; | |
238 | status = "disabled"; | |
239 | }; | |
240 | ||
241 | power@80044000 { | |
242 | reg = <0x80044000 2000>; | |
243 | status = "disabled"; | |
244 | }; | |
245 | ||
246 | saif1: saif@80046000 { | |
247 | reg = <0x80046000 2000>; | |
248 | status = "disabled"; | |
249 | }; | |
250 | ||
251 | audio-out@80048000 { | |
252 | reg = <0x80048000 2000>; | |
253 | status = "disabled"; | |
254 | }; | |
255 | ||
256 | audio-in@8004c000 { | |
257 | reg = <0x8004c000 2000>; | |
258 | status = "disabled"; | |
259 | }; | |
260 | ||
261 | lradc@80050000 { | |
262 | reg = <0x80050000 2000>; | |
263 | status = "disabled"; | |
264 | }; | |
265 | ||
266 | spdif@80054000 { | |
267 | reg = <0x80054000 2000>; | |
268 | status = "disabled"; | |
269 | }; | |
270 | ||
271 | i2c@80058000 { | |
272 | reg = <0x80058000 2000>; | |
273 | status = "disabled"; | |
274 | }; | |
275 | ||
276 | rtc@8005c000 { | |
277 | reg = <0x8005c000 2000>; | |
278 | status = "disabled"; | |
279 | }; | |
280 | ||
281 | pwm@80064000 { | |
282 | reg = <0x80064000 2000>; | |
283 | status = "disabled"; | |
284 | }; | |
285 | ||
286 | timrot@80068000 { | |
287 | reg = <0x80068000 2000>; | |
288 | status = "disabled"; | |
289 | }; | |
290 | ||
291 | auart0: serial@8006c000 { | |
292 | reg = <0x8006c000 0x2000>; | |
293 | status = "disabled"; | |
294 | }; | |
295 | ||
296 | auart1: serial@8006e000 { | |
297 | reg = <0x8006e000 0x2000>; | |
298 | status = "disabled"; | |
299 | }; | |
300 | ||
301 | duart: serial@80070000 { | |
302 | compatible = "arm,pl011", "arm,primecell"; | |
303 | reg = <0x80070000 0x2000>; | |
304 | interrupts = <0>; | |
305 | status = "disabled"; | |
306 | }; | |
307 | ||
308 | usbphy@8007c000 { | |
309 | reg = <0x8007c000 0x2000>; | |
310 | status = "disabled"; | |
311 | }; | |
312 | }; | |
313 | }; | |
314 | ||
315 | ahb@80080000 { | |
316 | compatible = "simple-bus"; | |
317 | #address-cells = <1>; | |
318 | #size-cells = <1>; | |
319 | reg = <0x80080000 0x80000>; | |
320 | ranges; | |
321 | ||
322 | usbctrl@80080000 { | |
323 | reg = <0x80080000 0x10000>; | |
324 | status = "disabled"; | |
325 | }; | |
326 | }; | |
327 | }; |