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1355bbc4 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5440 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
86feafeb | 12 | #include <dt-bindings/clock/exynos5440.h> |
04a88672 | 13 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
c473c9a1 | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
1355bbc4 KK |
15 | |
16 | / { | |
8bdb31b4 | 17 | compatible = "samsung,exynos5440", "samsung,exynos5"; |
1355bbc4 KK |
18 | |
19 | interrupt-parent = <&gic>; | |
12676ee1 JMC |
20 | #address-cells = <1>; |
21 | #size-cells = <1>; | |
1355bbc4 | 22 | |
dabd3f9d | 23 | aliases { |
1e64f48e TF |
24 | serial0 = &serial_0; |
25 | serial1 = &serial_1; | |
dabd3f9d | 26 | spi0 = &spi_0; |
5c7311b5 ADK |
27 | tmuctrl0 = &tmuctrl_0; |
28 | tmuctrl1 = &tmuctrl_1; | |
29 | tmuctrl2 = &tmuctrl_2; | |
dabd3f9d G |
30 | }; |
31 | ||
644a79a8 | 32 | clock: clock-controller@160000 { |
d8bafc87 TA |
33 | compatible = "samsung,exynos5440-clock"; |
34 | reg = <0x160000 0x1000>; | |
35 | #clock-cells = <1>; | |
36 | }; | |
37 | ||
0572b725 | 38 | gic: interrupt-controller@2E0000 { |
1355bbc4 KK |
39 | compatible = "arm,cortex-a15-gic"; |
40 | #interrupt-cells = <3>; | |
41 | interrupt-controller; | |
3279dd36 | 42 | reg = <0x2E1000 0x1000>, |
387720c9 | 43 | <0x2E2000 0x2000>, |
3279dd36 GM |
44 | <0x2E4000 0x2000>, |
45 | <0x2E6000 0x2000>; | |
04a88672 KK |
46 | interrupts = <GIC_PPI 9 |
47 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; | |
1355bbc4 KK |
48 | }; |
49 | ||
50 | cpus { | |
f5108e1c KK |
51 | #address-cells = <1>; |
52 | #size-cells = <0>; | |
53 | ||
1355bbc4 | 54 | cpu@0 { |
88e41848 | 55 | device_type = "cpu"; |
1355bbc4 | 56 | compatible = "arm,cortex-a15"; |
f5108e1c | 57 | reg = <0>; |
1355bbc4 KK |
58 | }; |
59 | cpu@1 { | |
88e41848 | 60 | device_type = "cpu"; |
1355bbc4 | 61 | compatible = "arm,cortex-a15"; |
f5108e1c | 62 | reg = <1>; |
1355bbc4 KK |
63 | }; |
64 | cpu@2 { | |
88e41848 | 65 | device_type = "cpu"; |
1355bbc4 | 66 | compatible = "arm,cortex-a15"; |
f5108e1c | 67 | reg = <2>; |
1355bbc4 KK |
68 | }; |
69 | cpu@3 { | |
88e41848 | 70 | device_type = "cpu"; |
1355bbc4 | 71 | compatible = "arm,cortex-a15"; |
f5108e1c | 72 | reg = <3>; |
1355bbc4 KK |
73 | }; |
74 | }; | |
75 | ||
4c46f51a SP |
76 | arm-pmu { |
77 | compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; | |
04a88672 KK |
78 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
79 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
80 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
81 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; | |
4c46f51a SP |
82 | }; |
83 | ||
f5108e1c KK |
84 | timer { |
85 | compatible = "arm,cortex-a15-timer", | |
86 | "arm,armv7-timer"; | |
04a88672 KK |
87 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
88 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
89 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
90 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
f5108e1c KK |
91 | clock-frequency = <50000000>; |
92 | }; | |
93 | ||
7f7b8ed0 ADK |
94 | cpufreq@160000 { |
95 | compatible = "samsung,exynos5440-cpufreq"; | |
96 | reg = <0x160000 0x1000>; | |
04a88672 | 97 | interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; |
7f7b8ed0 ADK |
98 | operating-points = < |
99 | /* KHz uV */ | |
afbbf927 ADK |
100 | 1500000 1100000 |
101 | 1400000 1075000 | |
102 | 1300000 1050000 | |
7f7b8ed0 | 103 | 1200000 1025000 |
afbbf927 | 104 | 1100000 1000000 |
7f7b8ed0 | 105 | 1000000 975000 |
afbbf927 | 106 | 900000 950000 |
7f7b8ed0 ADK |
107 | 800000 925000 |
108 | >; | |
109 | }; | |
110 | ||
1e64f48e | 111 | serial_0: serial@B0000 { |
1355bbc4 KK |
112 | compatible = "samsung,exynos4210-uart"; |
113 | reg = <0xB0000 0x1000>; | |
04a88672 | 114 | interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 115 | clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; |
6a0338c2 | 116 | clock-names = "uart", "clk_uart_baud0"; |
1355bbc4 KK |
117 | }; |
118 | ||
1e64f48e | 119 | serial_1: serial@C0000 { |
1355bbc4 KK |
120 | compatible = "samsung,exynos4210-uart"; |
121 | reg = <0xC0000 0x1000>; | |
04a88672 | 122 | interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 123 | clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; |
6a0338c2 | 124 | clock-names = "uart", "clk_uart_baud0"; |
1355bbc4 KK |
125 | }; |
126 | ||
dabd3f9d G |
127 | spi_0: spi@D0000 { |
128 | compatible = "samsung,exynos5440-spi"; | |
129 | reg = <0xD0000 0x100>; | |
04a88672 | 130 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
1355bbc4 KK |
131 | #address-cells = <1>; |
132 | #size-cells = <0>; | |
dabd3f9d G |
133 | samsung,spi-src-clk = <0>; |
134 | num-cs = <1>; | |
86feafeb | 135 | clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>; |
6a0338c2 | 136 | clock-names = "spi", "spi_busclk0"; |
1355bbc4 KK |
137 | }; |
138 | ||
4185c53f | 139 | pin_ctrl: pinctrl@E0000 { |
f6925432 | 140 | compatible = "samsung,exynos5440-pinctrl"; |
1355bbc4 | 141 | reg = <0xE0000 0x1000>; |
04a88672 KK |
142 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, |
143 | <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, | |
144 | <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
145 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
146 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
147 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
148 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
149 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; | |
1355bbc4 KK |
150 | interrupt-controller; |
151 | #interrupt-cells = <2>; | |
b1ce101b TA |
152 | #gpio-cells = <2>; |
153 | ||
154 | fan: fan { | |
155 | samsung,exynos5440-pin-function = <1>; | |
156 | }; | |
157 | ||
158 | hdd_led0: hdd_led0 { | |
159 | samsung,exynos5440-pin-function = <2>; | |
160 | }; | |
161 | ||
162 | hdd_led1: hdd_led1 { | |
163 | samsung,exynos5440-pin-function = <3>; | |
164 | }; | |
165 | ||
166 | uart1: uart1 { | |
167 | samsung,exynos5440-pin-function = <4>; | |
168 | }; | |
1355bbc4 KK |
169 | }; |
170 | ||
171 | i2c@F0000 { | |
49498c56 | 172 | compatible = "samsung,exynos5440-i2c"; |
1355bbc4 | 173 | reg = <0xF0000 0x1000>; |
04a88672 | 174 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
1355bbc4 KK |
175 | #address-cells = <1>; |
176 | #size-cells = <0>; | |
86feafeb | 177 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 178 | clock-names = "i2c"; |
1355bbc4 KK |
179 | }; |
180 | ||
181 | i2c@100000 { | |
49498c56 | 182 | compatible = "samsung,exynos5440-i2c"; |
1355bbc4 | 183 | reg = <0x100000 0x1000>; |
04a88672 | 184 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
1355bbc4 KK |
185 | #address-cells = <1>; |
186 | #size-cells = <0>; | |
86feafeb | 187 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 188 | clock-names = "i2c"; |
1355bbc4 KK |
189 | }; |
190 | ||
64f5d1eb | 191 | watchdog@110000 { |
7e93df35 | 192 | compatible = "samsung,s3c6410-wdt"; |
1355bbc4 | 193 | reg = <0x110000 0x1000>; |
04a88672 | 194 | interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 195 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 196 | clock-names = "watchdog"; |
1355bbc4 KK |
197 | }; |
198 | ||
8dccafaa | 199 | gmac: ethernet@230000 { |
6753c0ad | 200 | compatible = "snps,dwmac-3.70a", "snps,dwmac"; |
c038c4d8 BA |
201 | reg = <0x00230000 0x8000>; |
202 | interrupt-parent = <&gic>; | |
c92a4fb2 | 203 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
c038c4d8 BA |
204 | interrupt-names = "macirq"; |
205 | phy-mode = "sgmii"; | |
86feafeb | 206 | clocks = <&clock CLK_GMAC0>; |
c038c4d8 BA |
207 | clock-names = "stmmaceth"; |
208 | }; | |
209 | ||
1355bbc4 KK |
210 | amba { |
211 | #address-cells = <1>; | |
212 | #size-cells = <1>; | |
2ef7d5f3 | 213 | compatible = "simple-bus"; |
1355bbc4 KK |
214 | interrupt-parent = <&gic>; |
215 | ranges; | |
1355bbc4 KK |
216 | }; |
217 | ||
4185c53f | 218 | rtc@130000 { |
1355bbc4 KK |
219 | compatible = "samsung,s3c6410-rtc"; |
220 | reg = <0x130000 0x1000>; | |
04a88672 KK |
221 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, |
222 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
86feafeb | 223 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 224 | clock-names = "rtc"; |
1355bbc4 | 225 | }; |
1a12f52e | 226 | |
5c7311b5 ADK |
227 | tmuctrl_0: tmuctrl@160118 { |
228 | compatible = "samsung,exynos5440-tmu"; | |
229 | reg = <0x160118 0x230>, <0x160368 0x10>; | |
04a88672 | 230 | interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 231 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 232 | clock-names = "tmu_apbif"; |
9843a223 | 233 | #include "exynos5440-tmu-sensor-conf.dtsi" |
5c7311b5 ADK |
234 | }; |
235 | ||
236 | tmuctrl_1: tmuctrl@16011C { | |
237 | compatible = "samsung,exynos5440-tmu"; | |
238 | reg = <0x16011C 0x230>, <0x160368 0x10>; | |
04a88672 | 239 | interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 240 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 241 | clock-names = "tmu_apbif"; |
9843a223 | 242 | #include "exynos5440-tmu-sensor-conf.dtsi" |
5c7311b5 ADK |
243 | }; |
244 | ||
245 | tmuctrl_2: tmuctrl@160120 { | |
246 | compatible = "samsung,exynos5440-tmu"; | |
247 | reg = <0x160120 0x230>, <0x160368 0x10>; | |
04a88672 | 248 | interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 249 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 250 | clock-names = "tmu_apbif"; |
9843a223 LM |
251 | #include "exynos5440-tmu-sensor-conf.dtsi" |
252 | }; | |
253 | ||
254 | thermal-zones { | |
255 | cpu0_thermal: cpu0-thermal { | |
256 | thermal-sensors = <&tmuctrl_0>; | |
257 | #include "exynos5440-trip-points.dtsi" | |
258 | }; | |
259 | cpu1_thermal: cpu1-thermal { | |
260 | thermal-sensors = <&tmuctrl_1>; | |
261 | #include "exynos5440-trip-points.dtsi" | |
262 | }; | |
263 | cpu2_thermal: cpu2-thermal { | |
264 | thermal-sensors = <&tmuctrl_2>; | |
265 | #include "exynos5440-trip-points.dtsi" | |
266 | }; | |
5c7311b5 ADK |
267 | }; |
268 | ||
1a12f52e G |
269 | sata@210000 { |
270 | compatible = "snps,exynos5440-ahci"; | |
271 | reg = <0x210000 0x10000>; | |
04a88672 | 272 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 273 | clocks = <&clock CLK_SATA>; |
1a12f52e G |
274 | clock-names = "sata"; |
275 | }; | |
276 | ||
a3808905 TA |
277 | ohci@220000 { |
278 | compatible = "samsung,exynos5440-ohci"; | |
279 | reg = <0x220000 0x1000>; | |
04a88672 | 280 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 281 | clocks = <&clock CLK_USB>; |
a3808905 TA |
282 | clock-names = "usbhost"; |
283 | }; | |
284 | ||
285 | ehci@221000 { | |
286 | compatible = "samsung,exynos5440-ehci"; | |
287 | reg = <0x221000 0x1000>; | |
04a88672 | 288 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
86feafeb | 289 | clocks = <&clock CLK_USB>; |
a3808905 | 290 | clock-names = "usbhost"; |
1355bbc4 | 291 | }; |
406a9324 | 292 | |
2c221f5d JC |
293 | pcie_phy0: pcie-phy@270000 { |
294 | #phy-cells = <0>; | |
295 | compatible = "samsung,exynos5440-pcie-phy"; | |
296 | reg = <0x270000 0x1000>, <0x271000 0x40>; | |
297 | }; | |
298 | ||
299 | pcie_phy1: pcie-phy@272000 { | |
300 | #phy-cells = <0>; | |
301 | compatible = "samsung,exynos5440-pcie-phy"; | |
302 | reg = <0x272000 0x1000>, <0x271040 0x40>; | |
303 | }; | |
304 | ||
7c23e7e1 | 305 | pcie_0: pcie@290000 { |
406a9324 | 306 | compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; |
2c221f5d JC |
307 | reg = <0x290000 0x1000>, <0x40000000 0x1000>; |
308 | reg-names = "elbi", "config"; | |
04a88672 KK |
309 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, |
310 | <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, | |
311 | <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; | |
86feafeb | 312 | clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>; |
406a9324 JH |
313 | clock-names = "pcie", "pcie_bus"; |
314 | #address-cells = <3>; | |
315 | #size-cells = <2>; | |
316 | device_type = "pci"; | |
2c221f5d JC |
317 | phys = <&pcie_phy0>; |
318 | ranges = <0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ | |
406a9324 | 319 | 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ |
5911fc65 | 320 | bus-range = <0x00 0xff>; |
406a9324 JH |
321 | #interrupt-cells = <1>; |
322 | interrupt-map-mask = <0 0 0 0>; | |
323 | interrupt-map = <0x0 0 &gic 53>; | |
4b1ced84 | 324 | num-lanes = <4>; |
331d7d6a | 325 | status = "disabled"; |
406a9324 JH |
326 | }; |
327 | ||
7c23e7e1 | 328 | pcie_1: pcie@2a0000 { |
406a9324 | 329 | compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; |
2c221f5d JC |
330 | reg = <0x2a0000 0x1000>, <0x60000000 0x1000>; |
331 | reg-names = "elbi", "config"; | |
04a88672 KK |
332 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, |
333 | <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, | |
334 | <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
86feafeb | 335 | clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>; |
406a9324 JH |
336 | clock-names = "pcie", "pcie_bus"; |
337 | #address-cells = <3>; | |
338 | #size-cells = <2>; | |
339 | device_type = "pci"; | |
2c221f5d JC |
340 | phys = <&pcie_phy1>; |
341 | ranges = <0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ | |
406a9324 | 342 | 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ |
5911fc65 | 343 | bus-range = <0x00 0xff>; |
406a9324 JH |
344 | #interrupt-cells = <1>; |
345 | interrupt-map-mask = <0 0 0 0>; | |
346 | interrupt-map = <0x0 0 &gic 56>; | |
4b1ced84 | 347 | num-lanes = <4>; |
331d7d6a | 348 | status = "disabled"; |
406a9324 | 349 | }; |
1355bbc4 | 350 | }; |