ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
[linux-2.6-block.git] / arch / arm / boot / dts / exynos5422-odroidxu4.dts
CommitLineData
cc4637f7 1// SPDX-License-Identifier: GPL-2.0
66583560
KK
2/*
3 * Hardkernel Odroid XU4 board device tree source
4 *
5 * Copyright (c) 2015 Krzysztof Kozlowski
6 * Copyright (c) 2014 Collabora Ltd.
7 * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com
cc4637f7 9 */
66583560
KK
10
11/dts-v1/;
fe6b204d 12#include <dt-bindings/sound/samsung-i2s.h>
66583560
KK
13#include "exynos5422-odroidxu3-common.dtsi"
14
15/ {
16 model = "Hardkernel Odroid XU4";
17 compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
18 "samsung,exynos5";
19
20 pwmleds {
21 compatible = "pwm-leds";
22
23 blueled {
24 label = "blue:heartbeat";
25 pwms = <&pwm 2 2000000 0>;
26 pwm-names = "pwm2";
27 max_brightness = <255>;
28 linux,default-trigger = "heartbeat";
29 };
30 };
fe6b204d
SN
31
32 sound: sound {
33 compatible = "samsung,odroid-xu3-audio";
34 model = "Odroid-XU4";
35
8ac686d7 36 assigned-clocks = <&clock CLK_MOUT_EPLL>,
fe6b204d
SN
37 <&clock CLK_MOUT_MAU_EPLL>,
38 <&clock CLK_MOUT_USER_MAU_EPLL>,
39 <&clock_audss EXYNOS_MOUT_AUDSS>,
40 <&clock_audss EXYNOS_MOUT_I2S>,
41 <&clock_audss EXYNOS_DOUT_SRP>,
42 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
43 <&clock_audss EXYNOS_DOUT_I2S>;
44
8ac686d7 45 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
fe6b204d
SN
46 <&clock CLK_MOUT_EPLL>,
47 <&clock CLK_MOUT_MAU_EPLL>,
48 <&clock CLK_MAU_EPLL>,
49 <&clock_audss EXYNOS_MOUT_AUDSS>;
50
51 assigned-clock-rates = <0>,
52 <0>,
53 <0>,
54 <0>,
55 <0>,
fe6b204d
SN
56 <196608001>,
57 <(196608002 / 2)>,
58 <196608000>;
59
60 cpu {
61 sound-dai = <&i2s0 0>;
62 };
63
64 codec {
65 sound-dai = <&hdmi>;
66 };
67 };
68};
69
70&clock_audss {
71 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
72 <&clock CLK_FOUT_EPLL>;
73 assigned-clock-rates = <(196608000 / 256)>,
74 <196608000>;
75};
76
77&i2s0 {
78 status = "okay";
8ac686d7
SN
79 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
80 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
66583560
KK
81};
82
83&pwm {
84 /*
85 * PWM 0 -- fan
86 * PWM 2 -- Blue LED
87 */
88 pinctrl-0 = <&pwm0_out &pwm2_out>;
89 pinctrl-names = "default";
90 samsung,pwm-outputs = <0>, <2>;
91 status = "okay";
92};
93
94&usbdrd_dwc3_1 {
95 dr_mode = "host";
96};